CN115016592A - Band-gap reference source circuit - Google Patents
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- CN115016592A CN115016592A CN202210760274.5A CN202210760274A CN115016592A CN 115016592 A CN115016592 A CN 115016592A CN 202210760274 A CN202210760274 A CN 202210760274A CN 115016592 A CN115016592 A CN 115016592A
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- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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Abstract
The invention relates to a band-gap reference source circuit. The band gap reference source circuit comprises a positive temperature coefficient current generating module, a temperature coefficient current generating module and a current adding module, wherein the positive temperature coefficient current generating module is configured to generate positive temperature coefficient current which is not influenced by current gain of a triode; the negative temperature coefficient current generation module is configured to generate a negative temperature coefficient current which is not influenced by the current gain of the triode; the current adding module is arranged between the positive temperature coefficient current generating module and the negative temperature coefficient current generating module, is respectively electrically connected with the positive temperature coefficient current generating module and the negative temperature coefficient current generating module, and is configured to add the positive temperature coefficient current generated by the positive temperature coefficient current generating module and the negative temperature coefficient current generated by the negative temperature coefficient current generating module, so that band gap reference voltage which is not influenced by current gain of the triode and can be adjusted in amplitude is output, and sub-1V reference voltage and plus-2V reference voltage can be provided.
Description
Technical Field
The invention relates to the field of analog integrated circuits, in particular to a band-gap reference source circuit which can provide band-gap reference voltage which is not influenced by current gain of a triode and can be adjusted in amplitude.
Background
The reference voltage and reference current circuit is widely used in various analog integrated circuits and digital integrated circuit modules, such as an ADC, a DAC, a high-speed comparator, a phase-locked loop, a low-voltage linear regulator, and the like. The reference voltage (current) circuit can provide a voltage (current) which changes little with the voltage and temperature changes, namely, a reference voltage (current).
As is well known, the negative temperature coefficient voltage is also referred to as a ctat (complementary to absolute temperature) voltage. The positive temperature coefficient voltage is also referred to as a ptat (proportional to absolute temperature) voltage. FIG. 1 shows a schematic diagram of a conventional bandgap reference voltage circuit in which the base-emitter voltage V of the transistor BE With negative temperature coefficient, the voltage difference between base-emitter voltages of two triodes is delta V BE Having a positive temperature coefficient, the reference voltage is obtained by adding a positive temperature coefficient voltage to a negative temperature coefficient voltage weight. Fig. 2 shows a schematic diagram of a circuit for obtaining a positive temperature coefficient voltage. In the circuit shown in fig. 2, two transistors of the same type Q1 'and Q2' are shown, assuming biased collector currents of nI respectively 0 And I 0 Q2 'is formed by m transistors connected in parallel with Q1', and ignoring the base current, we can write:
where k is the boltzmann constant, T is the temperature value in kelvin, q is the electronic charge, m is a positive integer greater than 2, and n is a positive number. Thus, it can be seen that Δ V BE Is a positive temperature coefficient voltage with a temperature coefficient equal to (k/q) ln (mn). The traditional band-gap reference voltage circuit has the advantages of low temperature drift, high power supply rejection ratio, capability of being combined with a CMOS (complementary metal oxide semiconductor) process and the like, and is applied in a large scale.
However, the reference voltage outputted by such a mode of adding a positive temperature coefficient (PTAT) voltage to a negative temperature Coefficient (CTAT) voltage can only be about 1.2V due to the limitation of the bandgap voltage and temperature characteristics of the silicon material itself in the integrated circuit process, which severely limits its application in low voltage circuits. Furthermore, when applied to ADCs and DACs, the measurement range of the ADC or DAC is reduced because a larger reference voltage (e.g., greater than 1.2V) cannot be provided. Therefore, a bandgap reference source circuit capable of generating a plurality of reference voltages and having a reference voltage amplitude not limited to only 1.2V is in urgent need of research.
The prior sub-1V band-gap reference source circuit uses the PTAT voltage delta V of the traditional band-gap reference source circuit BE And CTAT voltage V BE Converted to a PTAT current and a CTAT current, then weighted and added to obtain a reference current, which is multiplied by a resistor to obtain a reference voltage. However, since the limited current gain β of the transistor has a complicated temperature coefficient, the reference voltage generated by this scheme has a certain error due to temperature drift. As shown in the following equation, the current gain β itself can be seen to have a complex temperature coefficient:
wherein the nominal common emitter current gain beta F0 And temperature index X TB Obtained by fitting the measured data, T r Is the reference temperature. If the bias current of a transistor is injected through the emitter, then the collector current is a fraction of the emitter current, and
α F is the common base circuit gain. If α is F With large temperature variation, then V is generated BE This must be taken into account when considering the negative temperature coefficient voltage. Therefore, in order to make V BE The temperature coefficient of (b) is as close to the first order coefficient as possible, so as to avoid the influence of the current gain β itself.
The solution disclosed in patent application US8665130 (entitled "ADC" for a temperature sensor, a non-contact transmitter, and a method of converting analog signals to digital signals ") can only extract voltages V that are not affected by β, respectively BE And a differential pressure Δ V unaffected by β BE And Δ V BE Is obtained by the ADC without generating V ref (outputting the bandgap reference voltage). In addition, since the voltage is a direct current voltage, the scheme cannot be directly added by using an adder, and the voltage is added to obtain V ref Must be about 1.2V, and the generated V cannot be controlled ref And thus cannot generate a reference voltage of sub-1V or plus-2V.
Furthermore, the solution disclosed in patent application CN102253684 (entitled "a bandgap reference circuit using current subtraction technique") can only extract the CTAT current affected by β, and cannot extract the CTAT current unaffected by β.
Therefore, there is a need for a bandgap reference source circuit that can provide a bandgap reference voltage that is not affected by the triode limited current gain β and that is adjustable in amplitude.
The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
Disclosure of Invention
In order to solve the technical problems in the prior art, the embodiment of the invention provides a bandgap reference source circuit of a bandgap reference voltage, which is not affected by the limited current gain β of a triode and has adjustable amplitude.
The technical problems to be solved by the present invention are not limited to the above-mentioned problems, and any other technical problems not mentioned herein will be clearly understood by those skilled in the art to which the present invention pertains through the following description.
According to an embodiment of the present invention, a bandgap reference source circuit includes: a positive temperature coefficient current generating module configured to generate a positive temperature coefficient current that is not affected by a current gain of the transistor; a negative temperature coefficient current generation module configured to generate a negative temperature coefficient current that is not affected by a current gain of the transistor; and the current adding module is arranged between the positive temperature coefficient current generating module and the negative temperature coefficient current generating module, is respectively electrically connected with the positive temperature coefficient current generating module and the negative temperature coefficient current generating module, and is configured to add the positive temperature coefficient current generated by the positive temperature coefficient current generating module and the negative temperature coefficient current generated by the negative temperature coefficient current generating module, so that band-gap reference voltage which is not influenced by current gain of the triode and has adjustable amplitude is output.
Preferably, the negative temperature coefficient current generation module includes: a negative temperature coefficient voltage generation submodule configured to generate a negative temperature coefficient voltage that is not affected by a current gain of the transistor; and the negative temperature coefficient current generation submodule is electrically connected with the negative temperature coefficient voltage generation submodule and is configured to generate negative temperature coefficient current which is not influenced by the current gain of the triode by the negative temperature coefficient voltage generated by the negative temperature coefficient voltage generation submodule.
Preferably, the negative temperature coefficient voltage generation submodule comprises a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a first operational amplifier, a first triode, a second triode, a third triode, a first resistor and a second resistor, the negative temperature coefficient current generation submodule comprises a fourth PMOS transistor, a second operational amplifier and a third resistor, the sources of the first PMOS transistor, the second PMOS transistor, the third PMOS transistor and the fourth PMOS transistor are respectively connected with a power supply VDD, the gate of the first PMOS transistor is respectively connected with the gate of the second PMOS transistor, the gate of the third PMOS transistor and the output of the first operational amplifier, the drain of the first PMOS transistor is respectively connected with the negative input end of the first operational amplifier and the emitter of the first triode, the drain of the second PMOS transistor is respectively connected with the positive input end of the first operational amplifier and the first end of the second resistor, the drain of the third PMOS transistor is respectively connected with the emitter of the third PMOS transistor and the negative input end of the second operational amplifier, the drain electrode of the fourth PMOS tube is respectively connected with the positive input end of the second operational amplifier and the first end of the third resistor, the base electrode of the first triode is connected with the first end of the first resistor, the emitting electrode of the second triode is connected with the second end of the second resistor, and the collector electrode of the first triode, the second end of the first resistor, the base electrode and the collector electrode of the second triode, the base electrode and the collector electrode of the third triode and the second end of the third resistor are respectively grounded.
Preferably, the positive temperature coefficient current generating module includes a fifth PMOS transistor, a sixth PMOS transistor, a seventh PMOS transistor, a third operational amplifier, a fourth triode, a fifth triode, a fourth resistor, and a fifth resistor, sources of the fifth PMOS transistor, the sixth PMOS transistor, and the seventh PMOS transistor are respectively connected to VDD, a drain of the fifth PMOS transistor is respectively connected to the first end of the fourth resistor and the base of the fourth triode, a drain of the sixth PMOS transistor is respectively connected to the positive input terminal of the third operational amplifier and the emitter of the fourth triode, a drain of the seventh PMOS transistor is respectively connected to the negative input terminal of the third operational amplifier and the emitter of the fifth triode, a base of the fifth triode is connected to the first end of the fifth resistor, and a collector of the fourth triode, a collector of the fifth triode, a second end of the fourth resistor, and a second end of the fifth resistor are respectively grounded.
Preferably, the current adding module includes an eighth PMOS transistor, a ninth PMOS transistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a first switch, a second switch, a third switch, and a reference voltage output terminal, sources of the eighth PMOS transistor and the ninth PMOS transistor are respectively connected to the VDD, a gate of the eighth PMOS transistor is respectively connected to a gate of the fourth PMOS transistor and an output terminal of the second operational amplifier, a gate of the ninth PMOS transistor is respectively connected to a gate of the fifth PMOS transistor, a gate of the sixth PMOS transistor, a gate of the seventh PMOS transistor, and an output terminal of the third operational amplifier, a drain of the eighth PMOS transistor is respectively connected to a drain of the ninth PMOS transistor, and the sixth resistor, the seventh resistor, the eighth resistor, and the ninth resistor connected in series, the first switch is connected in parallel to the sixth resistor, the second switch is connected in parallel to the seventh resistor, the third switch is connected in parallel to the eighth resistor, and the reference voltage output terminal is connected to a connection point of the drain of the eighth PMOS transistor and the ninth PMOS transistor Between the resistor and the connection point of the first switch.
By adopting the technical scheme, the invention has the following beneficial effects: the reference voltage of sub-1V or plus-2V can be provided. The negative temperature coefficient current circuit and the positive temperature coefficient current circuit can respectively generate negative temperature coefficient current and positive temperature coefficient current which are not influenced by the limited current gain beta, and the limited current gain beta has a complex temperature coefficient, so that the temperature coefficient of reference voltage generated by adding the currents which are not influenced by the limited current gain beta and passing through a resistor is extremely low, ideal reference voltage is generated, and meanwhile, a complex high-order temperature coefficient compensation circuit is not used.
Drawings
Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. For purposes of clarity, the same reference numbers will be used in different drawings to identify the same elements. It is noted that the drawings are merely schematic and are not necessarily drawn to scale. In these drawings:
FIG. 1 shows a schematic diagram of a conventional bandgap reference voltage circuit;
FIG. 2 shows a schematic diagram of a circuit for obtaining a positive temperature coefficient voltage;
FIG. 3 shows a block diagram of a bandgap reference source circuit according to an embodiment of the present invention;
FIG. 4 shows a circuit diagram of a negative temperature coefficient current generating module according to an embodiment of the invention;
fig. 5 shows a circuit diagram of a positive temperature coefficient current generating module according to an embodiment of the present invention;
FIG. 6 shows a circuit diagram of a current summing module according to an embodiment of the invention;
FIG. 7 shows an overall circuit diagram of a bandgap reference source circuit according to an embodiment of the present invention;
FIG. 8 is a schematic diagram showing the comparison of the PTC voltage and the PTC voltage generated by the bandgap reference source circuit without being affected by the transistor current gain and the PTC current generated by the conventional bandgap reference source circuit;
FIGS. 9A and 9B show graphs of reference voltage versus temperature for a bandgap reference source circuit simulation output in accordance with an embodiment of the present invention;
FIG. 10 is a graph showing the variation of a reference voltage with temperature of a simulation output of a conventional bandgap reference source circuit;
FIG. 11A shows a schematic diagram of a reference voltage output by a bandgap reference source circuit independent of triode current gain according to an embodiment of the invention;
fig. 11B shows a schematic diagram of a reference voltage output by a conventional bandgap reference source circuit.
Detailed Description
Various modifications and various exemplary embodiments can be made in the present invention, such that certain exemplary embodiments are shown in the drawings and described in detail in the specification. It should be understood, however, that there is no intent to limit the invention to the particular forms disclosed, but on the contrary, the invention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.
In describing each of the figures, like reference numerals are used for like components. The terms "first," "second," and the like may be used to describe various components, but these components should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first component can be termed a second component, and, similarly, a second component can be termed a first component, without departing from the scope of the present invention. The term "and/or" includes a combination of a plurality of the associated listed items or any one of the plurality of the associated listed items.
The embodiments of the present invention will be described in detail below, which are carried out on the premise of the technical scheme of the present invention, and detailed embodiments and specific operation procedures are given, but the scope of the present invention is not limited to the embodiments described below.
Fig. 3 shows a block diagram of a bandgap reference source circuit according to an embodiment of the present invention. Referring to fig. 3, a bandgap reference source circuit according to an embodiment of the present invention mayTo include: a positive temperature coefficient current generating module 10, a negative temperature coefficient current generating module 20 and a current adding module 30; the positive temperature coefficient current generating module 10 is configured to generate a positive temperature coefficient current that is not affected by the limited gain β of the triode current; the negative temperature coefficient current generating module 20 is configured to generate a negative temperature coefficient current that is not affected by the limited gain β of the transistor current; the current adding module 30 is disposed between the positive temperature coefficient current generating module 10 and the negative temperature coefficient current generating module 20, is electrically connected to the positive temperature coefficient current generating module 10 and the negative temperature coefficient current generating module 20, and is configured to add the positive temperature coefficient current generated by the positive temperature coefficient current generating module 10 and the negative temperature coefficient current generated by the negative temperature coefficient current generating module 20, so as to output a band gap reference voltage V which is not affected by the limited gain β of the triode current and has adjustable amplitude ref 。
According to an embodiment of the present invention, the negative temperature coefficient current generating module 20 may include a negative temperature coefficient voltage generating submodule 201 and a negative temperature coefficient current generating submodule 202, wherein the negative temperature coefficient voltage generating submodule 201 is configured to generate a negative temperature coefficient voltage that is not affected by the triode current finite gain β; the negative temperature coefficient current generation submodule 202 is electrically connected to the negative temperature coefficient voltage generation submodule 201, and is configured to generate a negative temperature coefficient current that is not affected by the current gain of the transistor from the negative temperature coefficient voltage generated by the negative temperature coefficient voltage generation submodule 201.
The input terminal 40 of the bandgap reference source circuit according to the embodiment of the present invention may be electrically connected to the dc power supply VDD directly or indirectly, or may be electrically connected to other start-up circuits. For example, when the direct current is supplied to the positive temperature coefficient current generating module 10, the negative temperature coefficient current generating module 20, and the current adding module 30, the positive temperature coefficient current generating module 10, the negative temperature coefficient current generating module 20, and the current adding module 30 are in an on state; when the direct current is not supplied to the positive temperature coefficient current generating module 10, the negative temperature coefficient current generating module 20, and the current adding module 30, the positive temperature coefficient current generating module 10, the negative temperature coefficient current generating module 20, and the current adding module 30 are in the off state. This is merely an example and any suitable start-up circuit is suitable for use with the present invention.
The embodiments of the present invention will be described in detail below, which are carried out on the premise of the technical scheme of the present invention, and detailed embodiments and specific operation procedures are given, but the scope of the present invention is not limited to the embodiments described below.
Fig. 4 is a circuit diagram illustrating a negative temperature coefficient current generating module according to an embodiment of the present invention, taking a PMOS transistor and a PNP type triode as examples. Referring to fig. 4, the negative temperature coefficient current generation module 20 includes a negative temperature coefficient voltage generation sub-module 201 and a negative temperature coefficient current generation sub-module 202.
Specifically, the negative temperature coefficient voltage generation sub-module 201 may include: the transistor comprises a first PMOS pipe PM1, a second PMOS pipe PM2, a third PMOS pipe PM3, a first operational amplifier OPA1, a first triode Q1, a second triode Q2, a third triode Q3, a first resistor R1 and a second resistor R2. The negative temperature coefficient current generation sub-module 202 may include a fourth PMOS transistor PM4, a second operational amplifier OPA2, and a third resistor R3.
Wherein, the sources of the first PMOS transistor PM1, the second PMOS transistor PM2 and the third PMOS transistor PM3 are respectively connected to the power supply VDD, the gate of the first PMOS transistor PM1 is respectively connected to the gate of the second PMOS transistor PM2, the gate of the third PMOS transistor PM3 and the output terminal of the first operational amplifier OPA1, the drain of the first PMOS transistor PM1 is respectively connected to the negative input terminal of the first operational amplifier OPA1 and the emitter of the first triode Q1, the drain of the second PMOS transistor PM2 is respectively connected to the positive input terminal of the first operational amplifier OPA1 and the first end of the second resistor R2, the drain of the third PMOS transistor PM3 is respectively connected to the emitter of the third triode Q3, the base of the first triode Q1 is connected to the first end of the first resistor R1, the emitter of the second triode Q2 is connected to the second end of the second resistor R2, the collector of the first transistor Q1, the second end of the first resistor R1, the base and collector of the second transistor Q2, the base and collector of the third transistor Q3, and the second end of the third resistor R3 are respectively grounded.
The source of the fourth PMOS transistor PM4 is connected to the power supply VDD, the drain of the fourth PMOS transistor PM4 is connected to the positive input terminal of the second operational amplifier OPA2 and the first terminal of the third resistor R3, respectively, the negative input terminal of the second operational amplifier OPA2 is connected to the emitter of the third transistor Q3, and the output terminal of the second operational amplifier OPA2 and the gate of the fourth PMOS transistor PM4 are connected to the output terminal of the negative temperature coefficient current generating module, respectively.
In this example, the first PMOS transistor PM1, the second PMOS transistor PM2, the third PMOS transistor PM3, and the fourth PMOS transistor PM4 are P-channel field effect transistors, which are merely an example, and they may be NMOS transistors, etc.
In this example, the first transistor Q1, the second transistor Q2, and the third transistor Q3 are PNP transistors, which are only an example, and they may be NPN transistors, etc.
Referring to fig. 4, when a difference value Vgs between a gate voltage Vg (i.e., the output voltage of the first operational amplifier OPA 1) and a source voltage Vs (i.e., the voltage of the power supply VDD) of the PMOS transistor is smaller than a set threshold, the PMOS transistor is turned on. When the first PMOS transistor PM1, the second PMOS transistor PM2 and the third PMOS transistor PM3 are turned on, the first PMOS transistor PM1, the second PMOS transistor PM2 and the third PMOS transistor PM3 respectively generate drain-source current I ds1 、I ds2 And I ds2 。
In the negative temperature coefficient voltage generation submodule 201, it is assumed that
R2: R1 ═ m:1, where m is a positive integer greater than or equal to 2, W is the width of the channel region between the source and drain in the PMOS transistor, and L is the width of the channel region. Preferably m is 8 or 24.
According to the "virtual short" characteristic of the operational amplifier OPA1, that is, the voltages at the positive input terminal and the negative input terminal of the operational amplifier OPA1 are equal, it can be obtained:
V eb2 +I e2 R2＝I b1 R 1 +V eb1 (0.1)
V eb2 is the voltage between the emitter and the base of the second transistor Q2, V eb1 Is the electricity between the emitter and the base of the first triode Q1Pressure, I b1 Is the base current, I, of the first transistor Q1 e2 Is the emitter current of the second transistor Q2.
Let I ds2 ＝I，R1＝R；
By
R2: R1 ═ m:1, available as
I ds3 ＝I ds1 ＝mI (0.2)
R2＝mR1＝mR (0.3)
And is characterized by a triode device:
wherein, beta F Common emitter current gain.
From the "virtual-off" characteristic of the operational amplifier OPA1, it is possible to obtain:
I e1 ＝I ds1 ＝mI (0.5)
by substituting formula (0.2), formula (0.3) or formula (0.4) for formula (0.1), the compound can be obtained
To obtain
According to the basic characteristics of the triode, the following can be obtained:
I c3 +I b3 ＝I e3 (0.9)
I c3 ＝β F I b3 (0.10)
is obtained from formula (0.9) or (0.10)
Similarly, according to the "virtual-off" characteristic of the operational amplifier OPA2, it is possible to obtain:
I e3 ＝I ds3 ＝mI (0.12)
substituting formula (0.7), formula (0.11), formula (0.12) into formula (0.8):
therefore, the voltage V between the emitter and the base of the third transistor Q3 eb3 Is a negative temperature coefficient voltage V not affected by the limited current gain beta of the triode ctat 。
With further reference to fig. 4, in the negative temperature coefficient current generation submodule 202, the negative input terminal of the second operational amplifier OPA2 is connected to the emitter of the third transistor Q3, i.e. the voltage at the negative input terminal of the second operational amplifier OPA2 is V eb3 . The voltage at the positive input of the second operational amplifier OPA2 is V, depending on the "virtual short" characteristics of the operational amplifier OPA2 eb3 The voltage across the resistor R3 is V eb3 . When the fourth PMOS transistor PM4 is turned on, the fourth PMOS transistor PM4 generates a source leakage current I ds4 Source-drain current I flowing through the fourth PMOS tube PM4 ds4 Can be as follows:
therefore, the source-drain current I generated by the fourth PMOS pipe PM4 ds4 Is a negative temperature coefficient current that is not affected by the limited current gain beta of the transistor.
Therefore, the negative temperature coefficient current generation module according to the embodiment of the invention can generate the negative temperature coefficient current which is not influenced by the current gain of the triode.
Fig. 5 is a circuit diagram illustrating a ptc current generating module according to an embodiment of the present invention, taking a PMOS transistor and a PNP type transistor as examples. Referring to fig. 5, the positive temperature coefficient current generating module may include: the transistor comprises a fifth PMOS pipe PM5, a sixth PMOS pipe PM6, a seventh PMOS pipe PM7, a third operational amplifier OPA3, a fourth triode Q4, a fifth triode Q5, a fourth resistor R4 and a fifth resistor R5.
In this example, the sources of the fifth PMOS transistor PM5, the sixth PMOS transistor PM6 and the seventh PMOS transistor PM7 are respectively connected to the power supply VDD, the drain of the fifth PMOS transistor PM5 is respectively connected to the first end of the fourth resistor R4 and the base of the fourth transistor Q4, the drain of the sixth PMOS transistor PM6 is respectively connected to the positive input terminal of the third operational amplifier OPA3 and the emitter of the fourth transistor Q4, the drain of the seventh PMOS transistor PM7 is respectively connected to the negative input terminal of the third operational amplifier OPA3 and the emitter of the fifth transistor Q5, the base of the fifth transistor Q5 is connected to the first end of the fifth resistor R5, the collector of the fourth transistor Q4 and the collector of the fifth transistor Q5, the second end of the fourth resistor R4 and the second end of the fifth resistor R5 are grounded, respectively, and the output terminal of the third operational amplifier OPA3 is connected to the gates of the fifth PMOS transistor PM5, the sixth PMOS transistor PM6 and the seventh PMOS transistor PM7, and serves as the output terminal of the ptc current generating module.
The fifth PMOS transistor PM5, the sixth PMOS transistor PM6, and the seventh PMOS transistor PM7 are all P-channel field effect transistors, which are only an example here, and they may also be NMOS transistors, etc.
The fourth transistor Q4 and the fifth transistor Q5 are both PNP transistors, which are only an example here, and they may also be NPN transistors or the like.
When the difference value Vgs between the gate voltage Vg (i.e., the output voltage of the third operational amplifier OPA 3) and the source voltage Vs (i.e., the voltage of the power supply VDD) of the PMOS transistor is smaller than the set threshold, the PMOS transistor is turned on. When the fifth PMOS transistor PM5, the sixth PMOS transistor PM6 and the seventh PMOS transistor PM7 are turned on, the fifth PMOS transistor PM5, the sixth PMOS transistor PM6 and the seventh PMOS transistor PM7 respectively generate source leakage current I ds5 、I ds6 And I ds7 。
At this pointIn the examples, suppose
R4: R5 ═ n:1, where n is a positive integer greater than or equal to 2, W is the width of the channel region between the source and drain in the PMOS transistor, and L is the width of the channel region. Preferably, n is 8 or 24.
Suppose the drain-source current I of the sixth PMOS pipe PM6 ds6 ＝I 1 Drain-source current I of seventh PMOS pipe PM7 ds7 ＝I 2 Drain-source current I of fifth PMOS pipe PM5 ds5 ＝I 3 。
According to the "virtual short" characteristic of the operational amplifier OPA3, that is, the voltages at the positive input terminal and the negative input terminal of the operational amplifier OPA3 are equal, it can be obtained:
V eb5 +I b5 R 5 ＝V eb4 +(I b4 +I 3 )R 4 (1.2)
V eb5 is the voltage between the emitter and the base of the fifth transistor Q5, V eb4 Is the voltage between the emitter and the base of the fourth transistor Q5, I b5 Is the base current, I, of the fifth transistor Q5 b4 Is the base current of the fourth transistor Q5.
According to the device characteristics of the triode:
due to the "virtual off" nature of the operational amplifier OPA3,
I e5 ＝I ds7 ＝I 2 ，I e4 ＝I ds6 ＝I 1 (1.4)
the compound (1.4) is substituted by the formula (1.3) to obtain:
the compound (1.5) is substituted by the formula (1.2) to obtain:
according to
The following can be obtained:
I ds7 :I ds6 ＝n:1
namely, it is
I 2 :I 1 ＝n:1 (1.7)
Handle I 2 :I 1 N:1 and R4: R5: n:1 are substituted by formula (1.6):
V eb5 ＝V eb4 +I 3 R 4 (1.8)
further obtaining:
it can be seen that the drain-source current I of the fifth PMOS transistor PM5 ds5 Is a positive temperature coefficient current I which is not influenced by the limited current gain beta of the triode ptat 。
Therefore, the PTC current generating module according to the embodiment of the invention can generate PTC current without being affected by the current gain of the triode.
Fig. 6 is a circuit diagram illustrating a current summing module according to an embodiment of the invention, taking PMOS transistors as an example. Referring to fig. 6, according to an embodiment of the present invention, the current adding module includes an eighth PMOS transistor PM8, a ninth PMOS transistor PM9, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first switch SW1, a second switch SW2, a third switch SW3, and a reference voltage output terminal V ref 。
The source electrodes of the eighth PMOS transistor PM8 and the ninth PMOS transistor PM9 are respectively connected to the power supply VDD; the drain electrode of the eighth PMOS tube PM8 is respectively connected with the drain electrode of the ninth PMOS tube PM9 and a sixth resistor R6, a seventh resistor R7, an eighth resistor R8 and a ninth resistor R9 which are connected in series; the first switch SW1 is connected in parallel with the sixth resistor R6, the second switch SW2 is connected in parallel with the seventh resistor R7, the third switch SW3 is connected in parallel with the eighth resistor R8, and the reference voltage output end is connected between a connection point of the drain of the eighth PMOS transistor PM8 and the drain of the ninth PMOS transistor PM9 and a connection point of the sixth resistor R6 and the first switch SW 1; the gate of the eighth PMOS transistor PM8 is connected to the output terminal of the negative temperature coefficient current generating module (i.e., the gate of the fourth PMOS transistor PM 4); the gate of the ninth PMOS transistor PM9 is connected to the output terminal of the ptc current generating module (i.e., the gate of the fifth PMOS transistor PM 5).
The eighth PMOS transistor PM8 and the ninth PMOS transistor PM9 are both P-channel field effect transistors, which are only an example here, and they may be NMOS transistors or the like.
When the eighth PMOS transistor PM8 and the ninth PMOS transistor PM9 are turned on, the eighth PMOS transistor PM8 and the ninth PMOS transistor PM9 respectively generate source leakage current I ds8 And I ds9 。
In this example, the gate of the eighth PMOS transistor PM8 of the current addition module is connected to the gate of the fourth PMOS transistor PM4 of the negative temperature coefficient current generation module, assuming that
Wherein m is a positive integer greater than or equal to 2. Preferably, m is 8 or 24.
By
The following can be obtained:
I ds8 :I ds4 ＝1:m
namely, it is
Therefore, the source-drain current I generated by the eighth PMOS tube PM8 is shown ds8 Is a negative temperature coefficient current I not influenced by the finite current gain beta of the triode ctat 。
In this example, the gate of the ninth PMOS transistor PM9 of the current summing module and the fifth PMOS transistor PM of the ptc current generating module5 gate connection, suppose
Wherein r is a positive number greater than 1, preferably, r ranges from 1.1 to 2.5.
By
Can obtain the product
I ds9 :I ds5 ＝r:1 (2.2)
Namely, it is
Therefore, the source-drain current I generated by the ninth PMOS pipe PM9 9 Is a negative temperature coefficient current that is not affected by the limited current gain beta of the transistor.
Assuming that a current that varies little with temperature is generated as I 0 I.e. by
Such a current may consist of a positive temperature coefficient current I ptat And negative temperature coefficient current I ctat Are obtained by adding proportions, i.e.
I 0 ＝I ds8 +I ds9 ＝rI ptat +I ctat (2.4)
The requirements are as follows:
namely, it is
To obtain
According to ohm's law:
V ref ＝I 0 ((R6)+(R7)+(R8)+(R9)) (2.8)
substituting the formula (2.1), the formula (2.3) and the formula (2.4) into the formula (2.8) to obtain the compound:
wherein R3, R4, R6, R7, R8 and R9 are resistors of the same type, and
R(T)＝R(T 0 )[1+TC1(T-T0)+TC2(T-T0) 2 ]
wherein, R (T) 0 ) The resistance of the resistor at 25 ℃, TC1 is the first-order temperature coefficient of the resistor, and TC2 is the second-order temperature coefficient of the resistor.
It can be seen that V ref Is not influenced by the temperature coefficient of the resistor, and finally obtains the output band-gap reference voltage V which changes little along with the temperature change ref 。
In addition, by controlling the switches SW1 to SW3 connected in parallel to the resistors R6, R7 and R8, respectively, on and off, short-circuiting of the resistors R6, R7 and R8 is achieved, respectively, thereby finally outputting the bandgap reference voltage V ref Can be adjusted.
Fig. 7 shows an overall circuit diagram of a bandgap reference source circuit according to an embodiment of the present invention. Referring to fig. 7, the bandgap reference source circuit of the present invention adopts a "current addition" technology, and includes a positive temperature coefficient current generating module, a negative temperature coefficient current generating module and a current addition module, wherein the positive temperature coefficient current generating module is composed of three PMOS transistors, two resistors, two triodes and an operational amplifier (OPA), and the negative temperature coefficient current generating module is composed of four PMOS transistors, three resistors, three triodes and two operational amplifiers (OPA). Fig. 8 is a schematic diagram showing the comparison between the positive temperature coefficient voltage and the negative temperature coefficient voltage generated by the bandgap reference source circuit without being affected by the transistor current gain and the positive temperature coefficient current and the negative temperature coefficient current generated by the conventional bandgap reference source circuit with being affected by the transistor current gain. In fig. 8, for convenience of description, the positive temperature coefficient current and the negative temperature coefficient current, which are not affected by the current gain of the transistor, generated by the bandgap reference source circuit according to the embodiment of the present invention are converted into corresponding voltages for description, and it can be seen from fig. 8 that curves of the positive temperature coefficient voltage and the negative temperature coefficient voltage, which are not affected by the current gain of the transistor, generated by the bandgap reference source circuit according to the present invention are symmetrical, so that temperature compensation is achieved, the influence of the limited current gain of the transistor can be eliminated, and the temperature characteristic of the reference source is optimized.
Fig. 9A and 9B show graphs of reference voltage versus temperature for a bandgap reference source circuit simulation output according to an embodiment of the present invention. Fig. 10 shows a graph of the reference voltage of the simulation output of the conventional bandgap reference source circuit as a function of temperature. Fig. 11A shows a schematic diagram of a reference voltage output by a bandgap reference source circuit that is not affected by transistor current gain according to an embodiment of the present invention. Fig. 11B shows a schematic diagram of a reference voltage output by a conventional bandgap reference source circuit. Referring to fig. 9A, 9B, 10, 11A and 11B, the bandgap reference source circuit according to the embodiment of the present invention makes the output bandgap reference voltage adjustable, and can provide a stable reference voltage of sub-1V and a stable reference voltage of plus-2V, not only 1.2V. Further, as shown in fig. 9A, 9B and 10, the bandgap reference source circuit according to the embodiment of the present invention has a fluctuation range of 0 to 0.52mv when outputting a sub-1V reference voltage and a fluctuation range of 0 to 1.745mv when outputting a plus-2V reference voltage, whereas the conventional bandgap reference source circuit is limited to outputting only a 1.2V reference voltage and has a fluctuation range of 0mv to 4.95mv, whereby the bandgap reference source circuit according to the embodiment of the present invention improves the output accuracy of the bandgap reference source in the entire temperature range.
The various embodiments of the invention are not an exhaustive list of all possible combinations, but are intended to describe representative aspects of the invention, and what is described in the various embodiments can be applied independently or in combinations of two or more.
The above description of exemplary embodiments has been presented only to illustrate the technical solutions of the present invention, and is not intended to be exhaustive or to limit the invention to the precise forms described. Obviously, many modifications and variations are possible in light of the above teaching to those skilled in the art. The exemplary embodiments were chosen and described in order to explain certain principles of the present invention and its practical application to thereby enable others skilled in the art to understand, implement and utilize the present invention in various exemplary embodiments and with various alternatives and modifications. It is intended that the scope of the invention be defined by the following claims and their equivalents.
Claims (4)
1. A bandgap reference source circuit unaffected by transistor current gain, comprising:
the current generating module of positive temperature coefficient is not influenced by the current gain of the triode;
the negative temperature coefficient current generation module is not influenced by the current gain of the triode, the negative temperature coefficient current generation module not influenced by the current gain of the triode comprises a negative temperature coefficient voltage generation submodule and a negative temperature coefficient current generation submodule, the negative temperature coefficient voltage generation submodule is configured to generate negative temperature coefficient voltage not influenced by the current gain of the triode, the negative temperature coefficient current generation submodule is electrically connected with the negative temperature coefficient voltage generation submodule and is configured to generate negative temperature coefficient current not influenced by the current gain of the triode by the negative temperature coefficient voltage generated by the negative temperature coefficient voltage generation submodule, the negative temperature coefficient voltage generation submodule comprises a first PMOS tube, a second PMOS tube, a third PMOS tube, a first operational amplifier, a first triode, a second triode, a third triode, a first resistor and a second resistor, the negative temperature coefficient current generation submodule comprises a fourth PMOS tube, a second operational amplifier and a third resistor; and
the current adding and passing through resistor generates voltage module, which is between the positive temperature coefficient current generating module not affected by the current gain of the triode and the negative temperature coefficient current generating module not affected by the current gain of the triode, the current output end of the positive temperature coefficient current generating module not affected by the current gain of the triode is the current input end of the current adding and passing through resistor generates voltage module, the current output end of the negative temperature coefficient current generating module not affected by the current gain of the triode is the current input end of the current adding and passing through resistor generates voltage module, the current adding and passing through resistor generates voltage module is configured to add the positive temperature coefficient current generated by the positive temperature coefficient current generating module not affected by the current gain of the triode and the negative temperature coefficient current generated by the negative temperature coefficient current generating module not affected by the current gain of the triode, and outputting the band-gap reference voltage which is not influenced by the current gain of the triode through at least one resistor, and obtaining the band-gap reference voltage with adjustable output voltage through the opening and closing of the switch.
2. The bandgap reference source circuit of claim 1, wherein,
the source electrodes of the first PMOS tube, the second PMOS tube, the third PMOS tube and the fourth PMOS tube are respectively connected with a power supply VDD, the grid electrode of the first PMOS tube is respectively connected with the grid electrode of the second PMOS tube, the grid electrode of the third PMOS tube and the output end of the first operational amplifier, the drain electrode of the first PMOS tube is respectively connected with the negative input end of the first operational amplifier and the emitting electrode of the first triode, the drain electrode of the second PMOS tube is respectively connected with the positive input end of the first operational amplifier and the first end of the second resistor, the drain electrode of the third PMOS tube is respectively connected with the emitting electrode of the third triode and the negative input end of the second operational amplifier, the drain electrode of the fourth PMOS tube is respectively connected with the positive input end of the second operational amplifier and the first end of the third resistor, the base electrode of the first triode is connected with the first end of the first resistor, the emitting electrode of the second triode is connected with the second end of the second resistor, the collector electrode of the first triode, the second end of the first resistor, And the base electrode and the collector electrode of the second triode, the base electrode and the collector electrode of the third triode and the second end of the third resistor are respectively grounded.
3. The bandgap reference source circuit of claim 1, wherein,
the positive temperature coefficient current generation module which is not influenced by the current gain of the triode comprises: a fifth PMOS tube, a sixth PMOS tube, a seventh PMOS tube, a third operational amplifier, a fourth triode, a fifth triode, a fourth resistor and a fifth resistor,
the source electrodes of the fifth PMOS tube, the sixth PMOS tube and the seventh PMOS tube are respectively connected with a power supply VDD, the drain electrode of the fifth PMOS tube is respectively connected with the first end of the fourth resistor and the base electrode of the fourth triode, the drain electrode of the sixth PMOS tube is respectively connected with the positive input end of the third operational amplifier and the emitter electrode of the fourth triode, the drain electrode of the seventh PMOS tube is respectively connected with the negative input end of the third operational amplifier and the emitter electrode of the fifth triode, the base electrode of the fifth triode is connected with the first end of the fifth resistor, and the collector electrode of the fourth triode, the collector electrode of the fifth triode, the second end of the fourth resistor and the second end of the fifth resistor are respectively grounded.
4. The bandgap reference source circuit of claim 1, wherein,
the current adding voltage generation module through a resistor comprises: an eighth PMOS tube, a ninth PMOS tube, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a first switch, a second switch, a third switch and a reference voltage output end,
the source electrodes of the eighth PMOS tube and the ninth PMOS tube are respectively connected with a power supply VDD, the grid electrode of the eighth PMOS tube is respectively connected with the grid electrode of the fourth PMOS tube and the output end of the second operational amplifier, the grid electrode of the ninth PMOS tube is respectively connected with the grid electrode of the fifth PMOS tube, the grid electrode of the sixth PMOS tube, the grid electrode of the seventh PMOS tube and the output end of the third operational amplifier, the drain electrode of the eighth PMOS tube is respectively connected with the drain electrode of the ninth PMOS tube, and a sixth resistor, a seventh resistor, an eighth resistor and a ninth resistor which are connected in series, the first switch is connected with the sixth resistor in parallel, the second switch is connected with the seventh resistor in parallel, the third switch is connected with the eighth resistor in parallel, and the reference voltage output end is connected between the connection point of the drain electrode of the eighth PMOS tube and the drain electrode of the ninth PMOS tube and the connection point of the sixth resistor and the first switch.
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