CN107728690B - Energy gap reference circuit - Google Patents
Energy gap reference circuit Download PDFInfo
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- CN107728690B CN107728690B CN201610649948.9A CN201610649948A CN107728690B CN 107728690 B CN107728690 B CN 107728690B CN 201610649948 A CN201610649948 A CN 201610649948A CN 107728690 B CN107728690 B CN 107728690B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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Abstract
A bandgap reference circuit includes a first operational amplifier, a second operational amplifier, a first current source, a second current source, a third current source, a first bipolar transistor, a second bipolar transistor, a feedback element, a first resistor, and a second resistor. The first resistor is coupled between an input of the second operational amplifier and a base of the first bipolar transistor. The second resistor is coupled between the base of the first bipolar transistor and the base of the second bipolar transistor. The first to the second operational amplifiers and the first to the third current sources form a negative feedback loop, so that the voltages of the input ends of the operational amplifiers are substantially the same.
Description
Technical Field
The invention relates to an energy gap reference circuit.
Background
The bandgap reference circuit is used for generating accurate output voltage and output current. The output voltage and current generated by the bandgap reference circuit are relatively immune to process, power supply and temperature variations. Therefore, the bandgap reference circuit can be widely used in various analog circuits and digital circuits, which require accurate reference voltage during operation.
Fig. 1 illustrates a conventional bandgap reference circuit 100. Referring to fig. 1, the bandgap reference circuit 100 includes PMOS transistors M1, M2 and M3, an operational amplifier OP, resistors R1 and R2 and bipolar transistors Q1, Q2 and Q3. When the base current is ignored, the output voltage VOUT of the bandgap reference circuit 100 can be expressed as:
wherein VEB3 is the voltage difference between the emitter and the base of the bipolar transistor Q3, VT is the thermal voltage (thermal voltage) at room temperature, and N is the ratio of the current density of the bipolar transistor Q2 to the current density of the bipolar transistor Q1.
After adjusting the resistance ratio of the resistors R2 and R1, the bandgap reference circuit 100 can provide a stable output voltage VOUT with zero temperature coefficient, as shown in equation (1). The voltage VOUT has a voltage level of about 1.25V, which is close to an electron volt (electron volt) of the silicon bandgap (energy gap), i.e., the silicon bandgap reference voltage.
However, in order to be widely used in different applications, the bandgap reference circuit may need to output different voltage levels.
Disclosure of Invention
An objective of the present invention is to provide a bandgap reference circuit for providing a reference current and a reference voltage.
According to an embodiment of the present invention, the bandgap reference circuit includes a first operational amplifier, a second operational amplifier, a first current source, a second current source, a third current source, a first bipolar transistor, a second bipolar transistor, a first feedback transistor, a first resistor, and a second resistor. The first operational amplifier has a first input, a second input and a first output. The second operational amplifier has a third input, a fourth input and a second output. The first current source is coupled between a supply power node and the first input of the first operational amplifier. The second current source is coupled between the supply power node and the second input of the first operational amplifier. The third current source is coupled between the supply power node and the third input of the second operational amplifier. The first bipolar transistor has a base with an emitter coupled to the first current source and a collector coupled to a ground node. The second bipolar transistor has a base, an emitter coupled to the second current source, and a collector coupled to the ground node. The first resistor is coupled between the third input of the second operational amplifier and the base of the first bipolar transistor. The first feedback element is coupled between the third current source and the base of the second bipolar transistor, the first feedback element being controlled by the second output of the second operational amplifier. The second resistor is coupled between the base of the first bipolar transistor and the base of the second bipolar transistor. The fourth input of the second operational amplifier is coupled to one of the first input of the first operational amplifier and the second input of the first operational amplifier.
Drawings
Fig. 1 illustrates a conventional bandgap reference circuit.
FIG. 2 shows a circuit diagram of a bandgap reference circuit incorporating an embodiment of the invention.
FIG. 3 shows a circuit diagram of a bandgap reference circuit incorporating another embodiment of the present invention.
FIG. 4 shows a circuit diagram of a bandgap reference circuit incorporating yet another embodiment of the present invention.
FIG. 5 shows a circuit diagram of a bandgap reference circuit incorporating yet another embodiment of the present invention.
[ notation ] to show
100 bandgap reference circuit
200 energy gap reference circuit
22 current source unit
300 energy gap reference circuit
32 current source unit
400 energy gap reference circuit
42 current source unit
500 energy gap reference circuit
M1, M2, M3 and M4 PMOS transistors
MA, MB, MC feedback transistor
OP operational amplifier
OP1, OP2 and OP3 operational amplifier
Q1, Q2, Q3 bipolar transistor
R1, R2, R3 and R4 resistors
Detailed Description
Fig. 2 shows a circuit diagram of a bandgap reference circuit 200 incorporating an embodiment of the invention. As shown in fig. 2, the bandgap reference circuit 200 includes a current source unit 22, an operational amplifier OP1, an operational amplifier OP2, a bipolar transistor Q1, a bipolar transistor Q2, a feedback transistor MA, a resistor R1, and a resistor R2.
The current source unit 22 provides a plurality of stable bias currents I1, I2, and I3. In the present embodiment, the current source unit 22 is a current mirror configuration, which is composed of three PMOS transistors M1, M2 and M3. Referring to fig. 2, the PMOS transistor M1 has a source coupled to a supply voltage source VDD, a gate coupled to an output terminal of the operational amplifier OP1, and a drain coupled to an inverting input terminal of the operational amplifier OP 1. The PMOS transistor M2 has a source coupled to the supply voltage source VDD, a gate coupled to the output terminal of the operational amplifier OP1, and a drain having a non-inverting input terminal coupled to the operational amplifier OP1 and an inverting input terminal coupled to the operational amplifier OP 2. The PMOS transistor M3 has a source coupled to the supply voltage source VDD, a gate coupled to the output terminal of the operational amplifier OP1, and a drain coupled to a non-inverting input terminal of the operational amplifier OP 2.
The bipolar transistor Q1 has a base, an emitter coupled to the inverting input of the operational amplifier OP1, and a collector coupled to a ground terminal. The bipolar transistor Q2 has a base, an emitter coupled to the non-inverting input of the operational amplifier OP1 and the inverting input of the operational amplifier OP2, and a collector coupled to the ground node.
Referring to fig. 2, the feedback transistor MA is an NMOS transistor having a drain coupled to the non-inverting input of the operational amplifier OP2, a gate coupled to an output of the operational amplifier OP2, and a source coupled to the base of the bipolar transistor Q2. The resistor R1 is coupled between the non-inverting input terminal of the operational amplifier OP2 and the base of the bipolar transistor Q1. The resistor R2 is coupled between the base of the bipolar transistor Q1 and the base of the bipolar transistor Q2.
Referring to fig. 2, the operational amplifier OP1 and the current source unit 22 form a first negative feedback loop, such that the input voltages VD1 and VD2 are substantially the same; the operational amplifier OP2, the feedback transistor MA, and the current source unit 22 form a second negative feedback loop, so that the input voltages VD2 and VD3 are substantially the same.
Since the gates of the transistors M1, M2 and M3 are connected to each other, the sources of the transistors M1, M2 and M3 are coupled to the supply voltage source VDD, and the drain voltages of the transistors M1, M2 and M3 are substantially the same, the current values of the currents I1, I2 and I3 flowing through the PMOS transistors M1, M2 and M3 are proportional to the width-to-length ratio of the transistors.
Referring to fig. 2, the voltages VD1 and VD3 can be expressed as:
VD1＝VREF+VEB1＝VD3＝VREF+I3A×R1 (2)
VREF is a voltage at a summing node N1, VEB1 is a voltage difference between emitter and base of the bipolar transistor Q1, and I3A is a current flowing through the resistor R1.
Accordingly, equation (2) can be rearranged to equation (3):
since the emitter-base Voltage difference of the bipolar transistor Q1 is Complementary To Absolute Temperature (i.e., CTAT Voltage), the current I3A is a CTAT current.
Neglecting the base currents of the bipolar transistors Q1 and Q2, the voltages VD1 and VD2 can be expressed as:
VD1＝VREF+VEB1＝VD2＝VREF+I3B×R2+VEB2 (4)
wherein VEB2 is the emitter-base voltage difference of the bipolar transistor Q2, and I3B is the current flowing through the resistor R2.
Accordingly, equation (4) can be rearranged to equation (5):
since the voltage difference △ VBE is Proportional To Absolute Temperature (i.e., PTAT voltage), the current I3B is a PTAT current.
Referring to fig. 2, the CTAT current I3A flowing through the resistor R1 and the PTAT current I3B flowing through the resistor R2 are summed at the summing node N1 (ignoring the base currents of the bipolar transistors Q1 and Q2). Therefore, by adjusting the resistance values of the resistor R1 and the resistor R2, the bandgap reference circuit 200 can provide a stable output current IREF with zero temperature coefficient. In addition, by adjusting the resistance values of the resistor R1 and the resistor R2, the bandgap reference circuit 200 can also provide a stable output current IREF with a positive temperature coefficient or a negative temperature coefficient. For example, by reducing the resistance of the resistor R2, the bandgap reference circuit 200 can provide a stable output current IREF with a positive temperature coefficient; by reducing the resistance of the resistor R1, the bandgap reference circuit 200 can provide a stable output current IREF with a negative temperature coefficient.
To replicate the current IREF, a PMOS transistor M4 is added to the current source unit 22. Since the output current IREF is substantially the same as the current flowing through the PMOS transistor M3 (when the base currents of the bipolar transistors Q1, Q2 and the input current of the operational amplifier OP2 are neglected), the PMOS transistor M4 provides an output current I4 proportional to the aspect ratio of the transistor.
Referring to FIG. 3, a resistor R3 is coupled between the summing node N1 and the ground node. Thus, the regulated output voltage VREF is generated at the summing node N1. A resistor R4 is coupled between the drain terminal of the PMOS transistor M4 and the ground terminal, thereby generating another regulated output voltage VREF 1. To make the current I4 more accurate, an operational amplifier OP3 and a feedback transistor MB are added to fig. 4. The operational amplifier OP3, the feedback transistor MB and the current source unit 42 form a third negative feedback loop, so that the input voltages VD3 and VD4 are substantially the same.
Referring back to fig. 1, the voltage level of the stable output voltage VOUT provided by the conventional bandgap reference circuit with zero temperature coefficient is about 1.25V. However, the bandgap reference circuit disclosed in the present invention can provide an output voltage with a lower voltage level (e.g. less than 0.6V) because the resistor R4 is directly connected to the ground node, and the resistor R2 in fig. 1 is initially connected to the ground node through the bipolar transistor Q3. In addition, since the voltages VD1, VD2 and VD3 are substantially the same and the gates of the PMOS transistors M1, M2, M3 and M4 are connected to each other, the PMOS transistors M1, M2, M3 and M4 can operate in a saturation region (saturation region) or a linear region (linear region) to provide a proportional current proportional to the aspect ratio of the transistors. Therefore, the bandgap reference circuit 300 can provide an output voltage VREF1 with a wide voltage range. The output voltage VREF1 has a voltage value between 0V and VDD-VSD, M4 according to the resistance of the resistor R4, where VSD, M4 is the source-drain voltage difference of the PMOS transistor M4. That is, the output voltage VREF1 may be very close to the voltage level of the supply voltage source VDD.
Refer to fig. 3. The operational amplifier OP1, the operational amplifier OP2 and the feedback transistor MA make the voltages VD1, VD2 and VD3 substantially the same by a negative feedback loop. However, the present invention should not be limited thereto. For example, the inverting input of the operational amplifier OP2 can be changed from the voltage VD2 in fig. 2 to the voltage VD 1. In another embodiment of the present invention, the feedback transistor MC may be selected as a PMOS transistor, as shown in fig. 5. The non-inverting input of the operational amplifier OP2 receives the voltage VD2, and the inverting input of the operational amplifier OP2 receives the voltage VD 3. In another embodiment of the present invention, the non-inverting input terminal of the operational amplifier OP2 receives the voltage VD1 instead of the voltage VD2 shown in fig. 5. According to another embodiment, the voltages VD1, VD2, and VD3 are substantially the same.
While the technical content and the technical features of the invention have been disclosed, those skilled in the art can make various substitutions and modifications based on the teaching and the disclosure of the invention without departing from the spirit of the invention. Therefore, the scope of the present invention should not be limited to the embodiments disclosed, but includes various alternatives and modifications without departing from the present invention, which is encompassed by the appended claims.
Claims (10)
1. An energy gap reference circuit comprising:
a first operational amplifier having a first input, a second input and a first output;
a second operational amplifier having a third input, a fourth input, and a second output;
a first current source coupled between a supply power node and the first input of the first operational amplifier;
a second current source coupled between the supply power node and the second input of the first operational amplifier;
a third current source coupled between the supply power node and the third input of the second operational amplifier;
a first bipolar transistor having a base, having an emitter coupled to the first current source, and having a collector coupled to a ground node;
a second bipolar transistor having a base, having an emitter coupled to the second current source, and having a collector coupled to the ground node;
a first resistor coupled between the third input of the second operational amplifier and the base of the first bipolar transistor;
a first feedback element coupled between the third current source and the base of the second bipolar transistor, the first feedback element controlled by the second output of the second operational amplifier; and
a second resistor coupled between the base of the first bipolar transistor and the base of the second bipolar transistor;
wherein the fourth input of the second operational amplifier is coupled to one of the first input of the first operational amplifier and the second input of the first operational amplifier.
2. The bandgap reference circuit of claim 1, further comprising:
a third resistor coupled between the base of the first bipolar transistor and the ground node.
3. The bandgap reference circuit of claim 1, further comprising:
a fourth current source coupled to the supply power node;
wherein the fourth current source is configured to replicate current flowing through the third current source.
4. The bandgap reference circuit of claim 3, further comprising:
the fourth resistor is coupled between the fourth current source and the ground node.
5. The bandgap reference circuit of claim 2, further comprising:
the voltage generating unit consists of a fifth current source and a fifth resistor;
wherein the fifth current source is coupled to the supply power node and configured to replicate current flowing through the third current source; and
the fifth resistor is coupled between the fifth current source and the ground node.
6. The bandgap reference circuit of claim 4, further comprising:
a third operational amplifier having a fifth input coupled to the third current source, a sixth input coupled to the fourth current source, and a third output; and
a second feedback element coupled between the fourth current source and the fourth resistor, the second feedback element being controlled by the third output of the third operational amplifier.
7. The bandgap reference circuit of claim 1, wherein a current flowing through said first feedback element and a current flowing through said first resistor are summed to generate a current flowing through said third current source, and a positive temperature coefficient of said current flowing through said third current source is obtained by decreasing a resistance of said second resistor.
8. The bandgap reference circuit of claim 1, wherein a current flowing through said first feedback element and a current flowing through said first resistor are summed to generate a current flowing through said third current source, and a negative temperature coefficient of said current flowing through said third current source is obtained by decreasing a resistance of said first resistor.
9. The bandgap reference circuit of claim 2, wherein the sum of the current flowing through said first feedback element and the current flowing through said first resistor generates a reference voltage at the crossing point of said second resistor and said third resistor, and the positive temperature coefficient of said reference voltage is obtained by reducing the resistance of said second resistor.
10. The bandgap reference circuit as recited in claim 2, wherein the sum of the current flowing through the first feedback element and the current flowing through the first resistor generates a reference voltage at the crossing point of the second resistor and the third resistor, and the negative temperature coefficient of the reference voltage is obtained by reducing the resistance of the first resistor.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610649948.9A CN107728690B (en) | 2016-08-10 | 2016-08-10 | Energy gap reference circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610649948.9A CN107728690B (en) | 2016-08-10 | 2016-08-10 | Energy gap reference circuit |
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| Publication Number | Publication Date |
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| CN107728690A CN107728690A (en) | 2018-02-23 |
| CN107728690B true CN107728690B (en) | 2020-02-28 |
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| KR20210121688A (en) * | 2020-03-31 | 2021-10-08 | 에스케이하이닉스 주식회사 | Reference voltage circuit |
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| US7088085B2 (en) * | 2003-07-03 | 2006-08-08 | Analog-Devices, Inc. | CMOS bandgap current and voltage generator |
| US7321225B2 (en) * | 2004-03-31 | 2008-01-22 | Silicon Laboratories Inc. | Voltage reference generator circuit using low-beta effect of a CMOS bipolar transistor |
| JP2013058155A (en) * | 2011-09-09 | 2013-03-28 | Seiko Instruments Inc | Reference voltage circuit |
| CN103729010B (en) * | 2012-10-15 | 2015-04-29 | 上海聚纳科电子有限公司 | High-precision band-gap reference source circuit |
| TWI521326B (en) * | 2013-12-27 | 2016-02-11 | 慧榮科技股份有限公司 | Bandgap reference generating circuit |
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