CN114978831B - Signal demodulation circuit and coherent demodulator - Google Patents
Signal demodulation circuit and coherent demodulator Download PDFInfo
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- CN114978831B CN114978831B CN202210535184.6A CN202210535184A CN114978831B CN 114978831 B CN114978831 B CN 114978831B CN 202210535184 A CN202210535184 A CN 202210535184A CN 114978831 B CN114978831 B CN 114978831B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0002—Modulated-carrier systems analog front ends; means for connecting modulators, demodulators or transceivers to a transmission line
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- H—ELECTRICITY
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- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/61—Coherent receivers
- H04B10/615—Arrangements affecting the optical part of the receiver
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/61—Coherent receivers
- H04B10/616—Details of the electronic signal processing in coherent optical receivers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/61—Coherent receivers
- H04B10/63—Homodyne, i.e. coherent receivers where the local oscillator is locked in frequency and phase to the carrier signal
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Abstract
The present application relates to a signal demodulation circuit and a coherent demodulator. The signal demodulation circuit comprises a signal receiving module, a conversion module, a modulation module and a processing module, wherein the conversion module is connected with the signal receiving module, the processing module is connected with the conversion module, the modulation module is respectively connected with the processing module and the signal receiving module, and the signal receiving module is also connected with the processing module. According to the method and the device, the low-frequency carrier signal can be obtained by mixing the initial local oscillator signal with the input signal, the low-frequency carrier signal can be subjected to analog-to-digital conversion through the conversion module with the low sampling rate, the modulation signal is generated through the modulation module, the mixing is carried out through the modulation signal and the input signal, the initial carrier signal in the low-frequency carrier signal is offset, and the target signal in the input signal is directly obtained. The conversion module of low sampling rate and low-power consumption can be adopted to this application, and the signal frequency that the processing module that corresponds simultaneously needs analysis, processing is also lower, has correspondingly reduced this application to processing module's performance requirement.
Description
Technical Field
The application belongs to the technical field of coherent demodulators, and particularly relates to a signal demodulation circuit and a coherent demodulator.
Background
With the continuous development of satellite technology, satellites have gained important applications in various industries and fields, such as satellite communication, satellite navigation, satellite remote sensing, weather forecasting, satellite television, and the like. The satellite has irreplaceable advantages in many aspects, for example, communication in desert and sea can only depend on the satellite, and the cheapest way of high-definition television direct broadcasting is also through the satellite. However, most of the satellites are independent individuals at present, and do not form a satellite network with each other.
With the increasing demand, inter-satellite data communication and ultra-high-speed satellite-ground communication become difficult problems to overcome. In order to improve user experience and meet the requirement of large data communication of an actual user, the communication speed needs to be improved, and the ultrahigh-speed demodulation technology needs to be realized for improving the communication speed.
The conventional ultra-high-speed demodulation technology generally directly analyzes an input signal including an initial carrier signal and a target signal and extracts the target signal from the input signal, so that an analog-to-digital conversion module with a high sampling rate is required to completely sample the input signal, a high requirement is imposed on the data processing capacity of a corresponding analysis device, and the analog-to-digital conversion module with the high sampling rate also has high power consumption and is very disadvantageous to a satellite.
Disclosure of Invention
The application aims to provide a signal demodulation circuit and a coherent demodulator, and aims to solve the problem that a sampling module with a high sampling rate is required in the traditional ultra-high-speed demodulation technology.
A first aspect of an embodiment of the present application provides a signal demodulation circuit, including: the device comprises a signal receiving module, a conversion module, a processing module and a modulation module; the signal receiving module is used for receiving an input signal input from the outside, wherein the input signal comprises a target signal and an initial carrier signal; the modulation module is respectively connected with the signal receiving module and the processing module, and is configured to output an initial local oscillator signal to the signal receiving module under the control of the processing module; the signal receiving module is configured to mix the initial local oscillator signal with the input signal to reduce the frequency of the initial carrier signal in the input signal, and obtain and output a low-frequency carrier signal; the conversion module is connected with the signal receiving module and configured to perform analog-to-digital conversion on the low-frequency carrier signal to generate a carrier feedback signal; the processing module is further connected with the conversion module, and is configured to obtain parameters of the low-frequency carrier signal according to the carrier feedback signal, and generate a modulation control signal corresponding to the initial carrier signal by combining the parameters of the initial local oscillator signal; the modulation module is also configured to generate and output a modulation signal with the same frequency and phase as the initial carrier signal to the signal receiving module according to the modulation control signal and stop outputting the initial local oscillator signal; the signal receiving module is further connected to the processing module, and is further configured to mix the modulation signal with the input signal to remove the initial carrier signal from the input signal, and transmit the remaining target signal to the processing module, and the processing module is further configured to demodulate the target signal to obtain a target digital signal.
In one embodiment, the processing module includes: and the analysis unit is connected with the conversion module and is configured to obtain parameters of the low-frequency carrier signal according to the carrier feedback signal and generate a modulation control signal corresponding to the initial carrier signal by combining the parameters of the initial local oscillator signal.
In one embodiment, the processing module further includes: the high-speed receiving unit is connected with the signal receiving module and is configured to receive and demodulate the target signal to obtain the target digital signal.
In one embodiment, a first amplifier is further disposed between the high-speed receiving unit and the signal receiving module, and the first amplifier is configured to shape and amplify the received target signal and transmit the shaped and amplified target signal to the high-speed receiving unit.
In one embodiment, the modulation module includes: a first phase-locked loop connected to the processing module and configured to output a modulation clock signal corresponding to the initial carrier signal according to the modulation control signal; the modulator is respectively connected with the first phase-locked loop and the signal receiving module, and is configured to generate and transmit the modulation signal with the same frequency and phase as the initial carrier signal to the signal receiving module according to the modulation clock signal and the local oscillator signal.
In one embodiment, the modulation module further includes a second amplifier connected between the first phase-locked loop and the modulator, and configured to amplify the modulation clock signal and transmit the amplified modulation clock signal to the modulator, so that the modulation clock matches the modulator.
In one embodiment, the conversion module includes an analog-to-digital conversion unit, the analog-to-digital conversion unit is respectively connected to the signal receiving module and the processing module, and the analog-to-digital conversion unit is configured to perform analog-to-digital conversion on a received signal to generate the carrier feedback signal according to the low-frequency carrier signal; a second phase-locked loop connected with the processing module and the analog-to-digital conversion unit, respectively, the second phase-locked loop configured to provide a sampling clock signal to the analog-to-digital conversion unit.
In one embodiment, the conversion module further includes: the third amplifier is connected between the signal receiving module and the analog-to-digital conversion unit, and is configured to amplify the received signal and transmit the amplified signal to the analog-to-digital conversion unit.
A second aspect of the embodiments of the present application provides a coherent demodulator, including the signal demodulation circuit as described above, where the signal receiving module of the signal demodulation circuit includes a coherent receiver, the coherent receiver is connected to the conversion module through a first optical-to-electrical converter, the coherent receiver is connected to the processing module through a second optical-to-electrical converter, and the coherent receiver is further connected to the modulation module; the input signal and the modulation signal are both optical signals, and the first photoelectric converter and the second photoelectric converter are used for performing photoelectric conversion of the signals.
In one embodiment, the signal receiving module further includes: a fourth amplifier connected to the signal receiving module and configured to receive the input signal inputted from the outside and amplify the input signal; an input optical filter connected between the fourth amplifier and the coherent receiver configured to filter noise in the input signal.
A second aspect of the embodiments of the present application provides a coherent demodulator, including the signal demodulation circuit as described above, where the signal receiving module of the signal demodulation circuit includes a coherent receiver, the coherent receiver is connected to the conversion module through a first optical-to-electrical converter, the coherent receiver is connected to the processing module through a second optical-to-electrical converter, and the coherent receiver is further connected to the modulation module; the input signal and the modulation signal are both optical signals, and the first photoelectric converter and the second photoelectric converter are used for performing photoelectric conversion of the signals.
In one embodiment, the signal receiving module further includes: a fourth amplifier connected to the signal receiving module and configured to receive the input signal inputted from the outside and amplify the input signal; an input optical filter connected between the fourth amplifier and the coherent receiver configured to filter noise in the input signal.
Compared with the prior art, the embodiment of the application has the advantages that: according to the method, the initial local oscillator signal and the input signal are mixed to obtain the low-frequency carrier signal, the parameters of the low-frequency carrier signal can be obtained through the conversion module and the processing module with low sampling rates, the parameters of the low-frequency carrier signal and the parameters of the initial local oscillator signal are finally combined to obtain the parameters of the initial carrier signal, a modulation signal with the same frequency and phase as the initial carrier signal is generated through the modulation module, mixing is carried out through the modulation signal and the input signal, and the initial carrier signal in the input signal is directly filtered and the target signal in the input signal is obtained through a destructive interference mode. The conversion module of this application only need sample the lower low frequency carrier signal of frequency, consequently does not need too high sampling rate, has reduced conversion module's consumption, and the frequency of the signal that the processing module that corresponds simultaneously needs analysis, processing is also lower, has correspondingly reduced the performance requirement to processing module.
Drawings
Fig. 1 is a schematic diagram of a signal demodulation circuit according to a first embodiment of the present application;
fig. 2 is a time domain diagram of a signal output by a signal receiving module according to a first embodiment of the present application after mixing an input signal with an initial local oscillator signal;
fig. 3 is a constellation diagram of a signal output by a signal receiving module according to a first embodiment of the present application after completing frequency mixing of an input signal and an initial local oscillator signal;
FIG. 4 is a time domain diagram of a target digital signal according to a first embodiment of the present application;
fig. 5 is a constellation diagram of a target digital signal according to a first embodiment of the present application;
FIG. 6 is an exemplary circuit schematic of a processing module in the signal demodulation circuit shown in FIG. 1;
FIG. 7 is an exemplary circuit schematic of a conversion module in the signal demodulation circuit shown in FIG. 1;
FIG. 8 is an exemplary circuit schematic of a modulation module in the signal demodulation circuit shown in FIG. 1;
fig. 9 is a schematic structural diagram of a signal demodulation circuit according to a first embodiment of the present application;
FIG. 10 is a graph of bit error rate for a first embodiment of the present application;
fig. 11 is a schematic structural diagram of a coherent demodulator according to a second embodiment of the present application.
The above figures illustrate: 100. a signal receiving module; 110. a coherent receiver; 120. a first photoelectric converter; 130. a second photoelectric converter; 140. a fourth amplifier; 150. an input optical filter; 200. a conversion module; 210. an analog-to-digital conversion unit; 220. a second phase-locked loop; 230. a third amplifier; 300. a processing module; 310. an analysis unit; 320. a high-speed receiving unit; 330. a first amplifier; 400. a modulation module; 410. a first phase-locked loop; 420. a modulator; 430. a second amplifier; 440. an oscillator; 450. an optical filter is modulated.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, refer to an orientation or positional relationship illustrated in the drawings for convenience in describing the present application and to simplify description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
Fig. 1 shows a schematic structural diagram of a signal demodulation circuit provided in a first embodiment of the present application, and for convenience of description, only the parts related to this embodiment are shown, and detailed descriptions are as follows:
a signal demodulation circuit, comprising: signal receiving module 100, conversion module 200, processing module 300 and modulation module 400.
The signal receiving module 100 is configured to receive an input signal input from the outside, where the input signal includes a target signal and an initial carrier signal. The modulation module 400 is connected to the signal receiving module 100 and the processing module 300, respectively, and the modulation module 400 is configured to output an initial local oscillation signal to the signal receiving module 100 under the control of the processing module 300. The signal receiving module 100 is configured to, after receiving the initial local oscillator signal and the input signal, mix the initial local oscillator signal with the input signal to reduce the frequency of the initial carrier signal in the input signal to obtain a low-frequency carrier signal, and output the low-frequency carrier signal and the target signal at the same time. The conversion module 200 is connected to the signal receiving module 100, and configured to perform analog-to-digital conversion on the low-frequency carrier signal output by the signal receiving module 100 to generate a carrier feedback signal. The processing module 300 is further connected to the conversion module 200, and is configured to obtain a parameter of the low-frequency carrier signal according to the carrier feedback signal, and generate a modulation control signal corresponding to the initial carrier signal by combining the parameter of the initial local oscillator signal. The modulation module 400 is further configured to generate and output a modulation signal having the same frequency and phase as the initial carrier signal to the signal receiving module 100 according to the modulation control signal, and stop outputting the initial local oscillator signal. The signal receiving module 100 is further configured to, after receiving the modulation signal, mix the modulation signal with the input signal to remove the initial carrier signal in the input signal, and transmit the target signal remaining in the input signal to the processing module 300. The processing module 300 is further configured to demodulate the target signal, resulting in a target digital signal. The processing module 300 may control the modulation module 400 to directly generate the initial local oscillation signal according to a preset parameter, where the parameter of the initial local oscillation signal may be preset according to an actual situation.
It should be noted that the frequency of the input signal may be as high as several GHz to several tens GHz, in this embodiment, first, after the initial local oscillator signal is mixed with the input signal, and the initial carrier signal is down-converted into the low-frequency carrier signal, the low-frequency carrier signal is only several tens MHz to several hundreds MHz, and the frequency of the target signal may still be as high as several GHz to several tens GHz, as shown in fig. 2 and fig. 3, fig. 2 is a time domain diagram of the signal output by the signal receiving module 100 after the initial local oscillator signal is mixed with the input signal, and fig. 3 is a corresponding constellation diagram, where the signal output by the signal receiving module 100 only includes the target signal and the low-frequency carrier signal. Since the frequency of the low-frequency carrier signal is much smaller than the frequency of the target signal, compared with the conventional technology, in this embodiment, the target signal and the low-frequency carrier signal output by the signal receiving module 100 may be subjected to analog-to-digital conversion by the conversion module 200 with a lower sampling rate, and the related parameters of the low-frequency carrier signal, including the frequency and the phase of the low-frequency carrier signal, may be obtained by performing Fast Fourier Transform (FFT) on the carrier feedback signal by the processing module 300. The processing module 300 may obtain the frequency and the phase of the initial carrier signal through loop tracking according to the parameter of the low-frequency carrier signal and by combining the parameter of the originally output initial local oscillator signal, and may generate a modulation control signal corresponding to the initial carrier signal, so as to control the modulation module 400 to generate a modulation signal having the same frequency and phase as the initial carrier signal, so as to completely eliminate the initial carrier signal in the input signal in the signal receiving module 100, and obtain the target signal. In this embodiment, the waveform formula of the modulation signal is: lo = sin (2 pi f + θ), where θ is the phase of the obtained initial carrier signal, f is the frequency of the initial carrier signal, and Lo is expressed as a modulation signal.
The low sampling rate conversion module 200 of the present embodiment has lower power consumption than a conventional signal demodulation circuit. Meanwhile, the processing module 300 does not need to analyze and disassemble the high-frequency target signal and the initial carrier signal, and the low-frequency carrier signal with low frequency has lower requirements on the data processing capability of the processing module 300.
As shown in fig. 6, in this embodiment, the processing module 300 includes an analyzing unit 310, the analyzing unit 310 is connected to the converting module 200, and the analyzing unit 310 is configured to control the modulating module 400 to directly output the initial local oscillation signal before receiving the carrier feedback signal. The analyzing unit 310 is further configured to obtain parameters of the low-frequency carrier signal according to the carrier feedback signal after receiving the carrier feedback signal, for example, obtain the frequency and the phase of the low-frequency carrier signal, and meanwhile, the analyzing unit 310 may also obtain the frequency and the phase of the initial carrier signal according to the frequency and the phase of the low-frequency carrier signal and by combining the frequency and the phase of the initial local oscillator signal, so that a modulation control signal corresponding to the initial carrier signal may be generated. The processing module 300 further includes a high-speed receiving unit 320, the high-speed receiving unit 320 is connected to the signal receiving module 100, and the high-speed receiving unit 320 is configured to receive and demodulate the target signal to obtain the target digital signal.
Specifically, the processing module 300 may be a Field Programmable Gate Array (FPGA), and the high-speed receiving unit 320 may be a Gigabit Transceiver with Low Power (GTX/GTP). Compared with the conventional ultra-high speed demodulation technology, the analysis unit 310 and the high-speed receiving unit 320 of the embodiment only need to simply process the received signals, and do not need to remove the initial carrier signals in the high-frequency input signals and extract the target signals therein through complicated analysis and a large amount of operations, thereby greatly reducing the data processing pressure of the processing module 300.
It should be noted that the signal transmitted by the signal receiving module 100 to the analyzing unit 310 through the converting module 200 is the same as the signal transmitted to the high-speed receiving unit 320, before the modulated signal is transmitted to the signal receiving module 100, the signal receiving module 100 simultaneously transmits the target signal and the low-frequency carrier signal to the analyzing unit 310 and the high-speed receiving unit 320, and after the modulated signal is transmitted to the signal receiving module 100, that is, after the extraction of the target signal is completed, the signal receiving module 100 simultaneously transmits the target signal to the analyzing unit 310 and the high-speed receiving unit 320.
As shown in fig. 9, in this embodiment, a first amplifier 330 is further disposed between the high-speed receiving unit 320 and the signal receiving module 100, and the first amplifier 330 is configured to shape and amplify the received target signal and transmit the shaped and amplified target signal to the high-speed receiving unit 320, so as to improve the identification rate of the target signal by the high-speed receiving unit 320 and reduce the error rate of the high-speed receiving unit 320. Specifically, the first amplifier 330 may be a limiting amplifier. As shown in fig. 4 and 5, fig. 4 is a time domain diagram of a target digital signal obtained by mixing a modulation signal with an input signal and amplifying the mixed signal by the first amplifier 330 and then demodulating the mixed signal by the high-speed receiving unit 320, and fig. 5 is a corresponding constellation diagram.
The following table is a table of actual signal power and bit error rate statistics:
the table is obtained by detecting the obtained target digital signal with an error detector, and as is clear from the table and fig. 10, the demodulation loss of the present embodiment is about 1dB, which indicates that the signal demodulation circuit of the present embodiment is excellent in performance.
As shown in fig. 7, in the present embodiment, the modulation module 400 includes a first phase-locked loop 410 and a modulator 420. The first phase-locked loop 410 is connected to the processing module 300 (the analyzing unit 310), and the first phase-locked loop 410 is configured to output a modulation clock signal corresponding to the initial carrier signal according to the modulation control signal after receiving the modulation control signal. The modulator 420 is connected to the first phase-locked loop 410 and the signal receiving module 100, and configured to generate and transmit a modulation signal having the same frequency and phase as the initial carrier signal to the signal receiving module 100 according to the modulation clock signal and the oscillation signal, where the initial local oscillation signal stops being output. The modulator 420 may be a phase modulator (PM modulator).
The initial local oscillator signal is directly generated by the modulation module 400 controlled by the processing module 300, and the specific modulation process is similar to that of the modulated signal. Specifically, the processing module 300 (the analyzing unit 310) may generate an initial control signal according to a preset parameter before receiving the carrier feedback signal, the first phase-locked loop 410 is configured to output a corresponding initial clock signal according to the initial control signal after receiving the initial control signal, and the modulator 420 is configured to generate and transmit an initial local oscillator signal to the signal receiving module 100 according to the initial clock signal and the oscillation signal.
As shown in fig. 9, in this embodiment, the modulation module 400 further includes a second amplifier 430, where the second amplifier 430 is connected between the first phase-locked loop 410 and the modulator 420, and configured to amplify the modulation clock signal and transmit the amplified modulation clock signal to the modulator 420, so as to match the power of the modulation clock signal with the modulator 420, thereby avoiding a situation that the modulator 420 cannot be driven due to insufficient output power of the first phase-locked loop 410. In particular, the second amplifier 430 may be a radio frequency driver.
As shown in fig. 8, in this embodiment, the conversion module 200 includes an analog-to-digital conversion unit 210 with a low sampling rate and a second phase-locked loop 220, the analog-to-digital conversion unit 210 is connected to the signal receiving module 100 and the processing module 300 (the analysis unit 310), respectively, and the analog-to-digital conversion unit 210 is configured to perform analog-to-digital conversion on the signal output by the signal receiving module 100 to generate a carrier feedback signal according to a low-frequency carrier signal therein. The second phase locked loop 220 is connected to the processing module 300 and the analog-to-digital conversion unit 210, respectively, the second phase locked loop 220 being configured to provide the sampling clock signal to the analog-to-digital conversion unit 210 under control of the processing module 300. Specifically, the Analog-to-digital conversion unit 210 may be an Analog-to-digital Converter (ADC).
As shown in fig. 9, in this embodiment, the conversion module 200 further includes a third amplifier 230, where the third amplifier 230 is connected between the signal receiving module 100 and the analog-to-digital conversion unit 210, and configured to amplify the received signal and transmit the amplified signal to the analog-to-digital conversion unit 210. Specifically, the third Amplifier 230 may be a Programmable Gain Amplifier (PGA).
Fig. 11 shows a schematic diagram of a coherent demodulator provided in a second embodiment of the present application, and for convenience of illustration, only the relevant parts of the present embodiment are shown, which are detailed as follows:
a coherent demodulator comprises the signal demodulation circuit as the above embodiment, the signal receiving module 100 comprises a coherent receiver 110, the coherent receiver 110 is connected to the conversion module 200 (the third amplifier 230) through the first optical-to-electrical converter 120, the coherent receiver 110 is connected to the processing module 300 (the analysis unit 310) through the second optical-to-electrical converter 130, and the coherent receiver 110 is further connected to the modulation module 400 to receive the initial local oscillation signal or the modulated signal. The input signal, the initial local oscillator signal, and the modulation signal are all optical signals, and the first photoelectric converter 120 and the second photoelectric converter 130 are used for performing photoelectric conversion of the signals. The signal receiving module 100 (coherent receiver 110) is configured to, when receiving the initial local oscillator signal, mix the initial local oscillator signal with the input signal to obtain a target signal and a low-frequency carrier signal, so that the target signal and the low-frequency carrier signal can be transmitted to the conversion module 200 through the first optical-to-electrical converter 120. The coherent receiver 110 is further configured to, upon receiving the modulated signal, mix the modulated signal with the input signal to obtain a target signal, which may be transmitted to the processing module 300 through the second optical-to-electrical converter 130. Specifically, the coherent receiver 110 may be a 90-degree bridge optical connector, and the coherent receiver 110 may mix the input signal with the modulation signal to remove, by means of destructive interference (cancellation), an initial carrier signal in the input signal that is in the same frequency and phase as the modulation signal, so as to obtain the target signal.
It should be noted that the coherent receiver 110 may convert the mixed signal from a single-ended optical signal to a pair of differential optical signals, and transmit the signals to the first optical-to-electrical converter 120 and the second optical-to-electrical converter 130 at the same time. The first photoelectric converter 120 and the second photoelectric converter 130 each include a pair of photoelectric conversion chips, and can convert a pair of received differential optical signals into a pair of differential electrical signals.
As shown in fig. 11, in the present embodiment, the signal receiving module 100 further includes a fourth amplifier 140 and an input optical filter 150. The fourth amplifier 140 is connected to the signal receiving module 100, and configured to receive an input signal input from the outside and amplify the input signal. An input optical filter 150 is connected between the fourth amplifier 140 and the coherent receiver 110 and is configured to filter noise in the input signal. Specifically, the fourth amplifier 140 may be a fiber low noise amplifier.
As shown in fig. 11, in the present embodiment, the modulation module 400 further includes an oscillator 440 and a modulated optical filter 450. The oscillator 440 is connected to the modulator 420 for generating and transmitting an oscillating signal to the modulator 420. The modulated optical filter 450 is connected between the modulator 420 and the coherent receiver 110, and is used for filtering noise in the original local oscillator signal or the modulated signal. Specifically, the oscillator 440 may be a local oscillator laser seed source, and the oscillation signal is also an optical signal.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the embodiments of the present application, and they should be construed as being included in the present application.
Claims (8)
1. A signal demodulation circuit, comprising: the device comprises a signal receiving module, a conversion module, a processing module and a modulation module;
the signal receiving module is used for receiving an externally input signal, wherein the input signal comprises a target signal and an initial carrier signal;
the modulation module is respectively connected with the signal receiving module and the processing module, and is configured to output an initial local oscillator signal to the signal receiving module under the control of the processing module; the signal receiving module is configured to mix the initial local oscillator signal with the input signal to reduce the frequency of the initial carrier signal in the input signal, and obtain and output a low-frequency carrier signal;
the conversion module is connected with the signal receiving module and configured to perform analog-to-digital conversion on the low-frequency carrier signal to generate a carrier feedback signal;
the processing module is further connected with the conversion module, and is configured to obtain parameters of the low-frequency carrier signal according to the carrier feedback signal, and generate a modulation control signal corresponding to the initial carrier signal by combining the parameters of the initial local oscillator signal;
the modulation module is also configured to generate and output a modulation signal with the same frequency and phase as the initial carrier signal to the signal receiving module according to the modulation control signal and stop outputting the initial local oscillator signal;
the signal receiving module is further connected to the processing module and further configured to mix the modulated signal with the input signal to remove the initial carrier signal from the input signal, transmitting the rest of the target signal to the processing module, wherein the processing module is further configured to demodulate the target signal to obtain a target digital signal;
the processing module comprises: the analysis unit is connected with the conversion module and is configured to obtain parameters of the low-frequency carrier signal according to the carrier feedback signal and generate a modulation control signal corresponding to the initial carrier signal by combining the parameters of the initial local oscillator signal;
the high-speed receiving unit is connected with the signal receiving module, and the high-speed receiving unit is configured to receive and demodulate the target signal to obtain the target digital signal.
2. The signal demodulation circuit according to claim 1, wherein a first amplifier is further provided between the high-speed receiving unit and the signal receiving module, and the first amplifier is configured to shape and amplify the received target signal and transmit the shaped and amplified signal to the high-speed receiving unit.
3. The signal demodulation circuit as claimed in claim 1 or 2, wherein said modulation module comprises:
a first phase-locked loop connected to the processing module and configured to output a modulation clock signal corresponding to the initial carrier signal according to the modulation control signal;
the modulator is respectively connected with the first phase-locked loop and the signal receiving module, and is configured to generate and transmit the modulation signal with the same frequency and phase as the initial carrier signal to the signal receiving module according to the modulation clock signal and the local oscillator signal.
4. The signal demodulation circuit of claim 3 wherein the modulation module further comprises a second amplifier connected between the first phase locked loop and the modulator and configured to amplify the modulated clock signal for transmission to the modulator to match the modulated clock to the modulator.
5. The signal demodulation circuit according to claim 1 or 2, wherein the conversion module comprises an analog-to-digital conversion unit, the analog-to-digital conversion unit is respectively connected with the signal receiving module and the processing module, and the analog-to-digital conversion unit is configured to perform analog-to-digital conversion on the received signal to generate the carrier feedback signal according to the low-frequency carrier signal;
a second phase-locked loop connected with the processing module and the analog-to-digital conversion unit, respectively, the second phase-locked loop configured to provide a sampling clock signal to the analog-to-digital conversion unit.
6. The signal demodulation circuit of claim 5 wherein said conversion module further comprises:
the third amplifier is connected between the signal receiving module and the analog-to-digital conversion unit and is configured to amplify the received signal and transmit the amplified signal to the analog-to-digital conversion unit.
7. A coherent demodulator, comprising a signal demodulation circuit according to any one of claims 1 to 6, the signal reception module of the signal demodulation circuit comprising a coherent receiver, the coherent receiver being connected to the conversion module via a first optical-to-electrical converter, the coherent receiver being connected to the processing module via a second optical-to-electrical converter, the coherent receiver being further connected to the modulation module; the input signal and the modulation signal are both optical signals, and the first photoelectric converter and the second photoelectric converter are used for performing photoelectric conversion of the signals.
8. The coherent demodulator of claim 7, wherein the signal receiving module further comprises:
a fourth amplifier connected to the signal receiving module and configured to receive the input signal inputted from the outside and amplify the input signal;
an input optical filter connected between the fourth amplifier and the coherent receiver configured to filter noise in the input signal.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6631170B1 (en) * | 1999-12-03 | 2003-10-07 | Nokia Corporation | Radio frequency receiver |
| CN108183877A (en) * | 2018-01-11 | 2018-06-19 | 成都烨软科技有限公司 | A kind of multi-tone frequency demodulated signal method based on FPGA |
| CN108632194A (en) * | 2018-03-28 | 2018-10-09 | 中国科学院半导体研究所 | Signal demodulating equipment and method for difference interference vibration measuring system |
| CN112468148A (en) * | 2020-11-09 | 2021-03-09 | 浙江大学 | Multi-sampling-rate low-power-consumption micromechanical gyroscope digital signal processing method |
| CN113067599A (en) * | 2021-03-12 | 2021-07-02 | 上海航天电子有限公司 | Semi-digital USB responder device based on anti-fuse FPGA |
-
2022
- 2022-05-17 CN CN202210535184.6A patent/CN114978831B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6631170B1 (en) * | 1999-12-03 | 2003-10-07 | Nokia Corporation | Radio frequency receiver |
| CN108183877A (en) * | 2018-01-11 | 2018-06-19 | 成都烨软科技有限公司 | A kind of multi-tone frequency demodulated signal method based on FPGA |
| CN108632194A (en) * | 2018-03-28 | 2018-10-09 | 中国科学院半导体研究所 | Signal demodulating equipment and method for difference interference vibration measuring system |
| CN112468148A (en) * | 2020-11-09 | 2021-03-09 | 浙江大学 | Multi-sampling-rate low-power-consumption micromechanical gyroscope digital signal processing method |
| CN113067599A (en) * | 2021-03-12 | 2021-07-02 | 上海航天电子有限公司 | Semi-digital USB responder device based on anti-fuse FPGA |
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