CN114975430A - Semiconductor die and method and electronic system for sensing current and temperature - Google Patents

Semiconductor die and method and electronic system for sensing current and temperature Download PDF

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Publication number
CN114975430A
CN114975430A CN202210118923.1A CN202210118923A CN114975430A CN 114975430 A CN114975430 A CN 114975430A CN 202210118923 A CN202210118923 A CN 202210118923A CN 114975430 A CN114975430 A CN 114975430A
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sense
current
terminal
semiconductor die
transistor
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德塔德·彼得斯
萨沙·阿克塞尔·拜尔
托马斯·曼努埃尔·赖特尔
桑迪普·瓦利亚
弗兰克·沃尔特
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Infineon Technologies AG
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Infineon Technologies AG
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    • H—ELECTRICITY
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7815—Vertical DMOS transistors, i.e. VDMOS transistors with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/16—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2607—Circuits therefor
    • G01R31/2621—Circuits therefor for testing field effect transistors, i.e. FET's
    • G01R31/2628—Circuits therefor for testing field effect transistors, i.e. FET's for measuring thermal properties thereof
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/27—Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/52—Testing for short-circuits, leakage current or ground faults
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608—Silicon carbide
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
    • H01L29/7804—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode
    • H01L29/7805—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode in antiparallel, e.g. freewheel diode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
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    • H02M1/00—Details of apparatus for conversion
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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Abstract

A semiconductor die and a method and electronic system for sensing current and temperature of a semiconductor die are disclosed. The semiconductor die includes: a SiC substrate; a main power transistor and a current sense transistor integrated in the substrate such that the current sense transistor mirrors a current flowing in the main power transistor; a gate terminal electrically connected to gate electrodes of the two transistors; a drain terminal electrically connected to a drain region in the substrate and common to both transistors; a source terminal electrically connected to the source region and the body region of the main power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the two transistors. The dual mode sense terminal is electrically connected to the source region and the body region of the current sense transistor. The doped resistor region has the same conductivity type as the body regions of the two transistors and is configured as a temperature sensing resistor electrically connecting the source terminal to the dual mode sensing terminal.

Description

Semiconductor die and method and electronic system for sensing current and temperature
Technical Field
The present invention relates generally to the field of electronics, and more particularly to semiconductor dies.
Background
Due to the need to limit channel current, fault conditions such as short circuits are important considerations in various applications that affect the lossy performance of power transistors. Silicon carbide (SiC) based power MOSFETs (metal oxide semiconductor field effect transistors) with smaller chip (die) area and high current density result in weaker short circuit capability and reduced short circuit withstand time. Therefore, the device should be shut down in an appropriate manner as early as possible before a short circuit or overcurrent condition occurs. For this reason, on-chip sensing is widely used for self-protection of power electronic systems. In addition to current sensing, on-chip temperature sensing provides additional information about fault conditions. Such fault conditions may include excessive power consumption, excessive ambient/coolant temperature, low convection rate or low fluid flow rate, fluid flow loss, air bubbles in the coolant, coolant mixture errors, and the like.
Different kinds of external detection methods include desaturation detection and over-current detection using hall sensors. However, these detection methods fail to detect a fault before an extreme short circuit condition occurs and are too slow and/or fail to detect a short circuit on the half bridge.
The integrated on-chip current sensor and the temperature sensor realize rapid overcurrent protection and over-temperature protection. A small fraction of the active MOSFET cells in a chip are typically used for current and temperature observation. The sensing cells are separated from the main transistor cells using additional lithographic process steps, which increase the cost and complexity of the wafer fabrication process. Furthermore, five (5) terminals are typically used in integrated temperature and current sensing power devices to acquire temperature and current sensing signals. Three (3) terminals are used for power device operation (source, drain and gate) and two (2) terminals are used for sensing current and temperature. Each additional terminal for sensing results in a loss of chip real estate and requires a large amount of connection work, which results in low package utilization.
Accordingly, there is a need for an improved current and temperature sensing method for power semiconductor devices.
Disclosure of Invention
According to an embodiment of a semiconductor die, the semiconductor die includes: a SiC substrate; a main power transistor and a current sense transistor integrated in the SiC substrate such that the current sense transistor is configured to mirror a current flowing in the main power transistor; a gate terminal electrically connected to gate electrodes of the two transistors; a drain terminal electrically connected to a drain region in the SiC substrate and common to the two transistors; a source terminal electrically connected to the source region and the body region of the main power transistor; a dual mode sense terminal; and a doped resistor region in the SiC substrate between the main power transistor and the current sense transistor, wherein the dual mode sense terminal is electrically connected to the source region and the body region of the current sense transistor, wherein the doped resistor region is of the same conductivity type as the body regions of the two transistors and is configured as a temperature sense resistor electrically connecting the source terminal to the dual mode sense terminal.
According to an embodiment of a current and temperature sensing method for a semiconductor die including a power transistor and a current sense transistor integrated in a SiC substrate, a source terminal, a dual mode sense terminal, and a doped resistor region in the SiC substrate between the power transistor and the current sense transistor, the doped resistor region having a same conductivity type as the body regions of the two transistors and configured as a temperature sense resistor electrically connecting the source terminal to the dual mode sense terminal, the method includes: in a first state: turning on a power transistor, a current sense transistor, and a switching (toggle) device such that the switching device electrically couples the dual mode sense terminal of the semiconductor die to the current sense resistor; and sensing a voltage drop across the current sense resistor; and in a second state: turning off the power transistor, the current sense transistor, and the switching device such that the switching device electrically decouples the dual mode sense terminal of the semiconductor die from the current sense resistor; providing a constant current through a temperature sensing resistor of the semiconductor die or electrically connecting a constant voltage source to the temperature sensing resistor; and sensing a voltage drop between the source terminal of the semiconductor die and the dual-mode sensing terminal, or sensing a current flowing through the dual-mode sensing terminal.
According to an embodiment of an electronic system for sensing current and temperature of a semiconductor die including a power transistor and a current sense transistor integrated in a SiC substrate, a source terminal, a dual mode sense terminal, and a doped resistor region in the SiC substrate between the power transistor and the current sense transistor, the doped resistor region having a same conductivity type as body regions of the two transistors and configured as a temperature sense resistor electrically connecting the source terminal to the dual mode sense terminal, the electronic system comprises: a current sense resistor; a switching device electrically coupling the dual mode sense terminal of the semiconductor die to the current sense resistor; a driver; and a sensing circuit, wherein, in a first state: the driver is configured to turn on the power transistor, the current sense transistor, and the switching device such that the switching device electrically couples the dual mode sense terminal of the semiconductor die to the current sense resistor; and the sensing circuit is configured to sense a voltage drop across the current sense resistor; and in a second state: the driver is configured to turn off the power transistor, the current sense transistor, and the switching device such that the switching device electrically decouples the dual mode sense terminal of the semiconductor die from the current sense resistor; and the sensing circuit is configured to provide a constant current through the temperature sensing resistor of the semiconductor die or to electrically connect the constant voltage source to the temperature sensing resistor, and to sense a voltage drop between the source terminal of the semiconductor die and the dual-mode sensing terminal or to sense a current flowing through the dual-mode sensing terminal.
Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings.
Drawings
The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts. Features of the various illustrated embodiments may be combined unless they are mutually exclusive. Embodiments are depicted in the drawings and are described in detail in the following description.
FIG. 1 illustrates a circuit schematic of an embodiment of an electronic system for sensing current and temperature of a semiconductor die having a dual-mode sense terminal.
Fig. 2 shows a top view of an embodiment of a semiconductor die.
Fig. 3A shows a partial top view of a semiconductor die.
Fig. 3B shows a cross-sectional view of the semiconductor die along the line labeled a-a' in fig. 3A.
Fig. 3C shows a cross-sectional view of the semiconductor die along the line labeled B-B' in fig. 3A.
Fig. 3D shows a cross-sectional view of the semiconductor die along the line labeled C-C' in fig. 3A.
Fig. 4 shows a circuit schematic of another embodiment of an electronic system including a semiconductor die.
Fig. 5 shows the same cross-sectional view as fig. 3C, but with the diode included in the SiC substrate of the semiconductor die.
Fig. 6 shows a circuit schematic of another embodiment of an electronic system including a semiconductor die.
Fig. 7A illustrates various waveforms associated with an example of forced turn-off of a power transistor included in a semiconductor die.
Fig. 7B shows various waveforms associated with an example of alternating between current sensing and temperature sensing via a dual-mode sensing terminal.
Fig. 8 shows a circuit schematic of another embodiment of an electronic system including a semiconductor die.
Detailed Description
An improved current and temperature sensing method for SiC (silicon carbide) die (chips) is described herein. The SiC chip has dual mode sense terminals that allow the use of the same sense terminal to alternate between current sensing and temperature sensing without the need for two separate sense terminals. In a first state, a power transistor and a current sense transistor integrated in the SiC die are turned on, and a current sense mode is activated based on a current mirrored by the current sense transistor. In a second state, the power transistor and the current sense transistor are turned off, and the temperature sensing mode is activated based on a voltage drop across or a current flowing through a doped resistor integrated in the SiC die and configured as a temperature sensing resistor. The signal processing circuit measures the current signal in a first state and the temperature signal in a second state using the same dual-mode sense terminal of the SiC die. Readout can be achieved using a common gate driver signal in combination with a small-signal transistor and a small-signal current source to allow both temperature and current to be monitored quasi-simultaneously.
For self-protection of power electronic devices, it is advantageous to combine both current sensing and temperature sensing functions in a single die solution via dual mode sensing terminals. The current sensing and temperature sensing functions provide system protection from equipment failures, in the event of a harness error, a load or motor failure, inductive load saturation, a PWM (pulse width modulation) mode error, a breakdown gate drive mode, excessive power consumption, excessive ambient/coolant temperature, low convection rate or fluid flow rate, fluid flow loss, air bubbles in coolant, coolant mixture error, and the like. Many safety critical applications, such as the main frequency converter of a battery electric vehicle, require power electronics systems to be self-protecting. This means that a single failure of the power electronic system must not damage the other systems. Therefore, malfunctions must be avoided as much as possible. Safety-relevant functions such as battery disconnection switches, fuses, high-temperature fuses, etc. are only required in very limited situations where the self-protection properties cannot function as intended, since such elements are the ultimate protection against catastrophic events such as fusing of high-voltage batteries, fires, explosions, etc.
Described next with reference to the figures are exemplary embodiments of current and temperature sensing methods. Although the current and temperature sensing methods are described in the context of SiC devices, the current and temperature sensing methods may be applied to other types of wide bandgap semiconductor devices and non-wide bandgap semiconductor devices such as Si-based devices. The term "wide bandgap semiconductor" as used herein refers to any semiconductor material having a bandgap greater than 1.5 eV. For example, the term "wide bandgap semiconductor" includes SiC and GaN (gallium nitride). Other wide bandgap semiconductor materials may also be used. In the following embodiments, for an n-channel device, the first conductivity type is n-type and the second conductivity type is p-type, and for a p-channel device, the first conductivity type is p-type and the second conductivity type is n-type.
Fig. 1 shows a circuit schematic of an embodiment of an electronic system 100 for sensing current and temperature of a semiconductor die having a dual-mode sense terminal TCS. The electronic system 100 may be part of a power electronic system such as a DC/DC converter, an AC/DC converter, a DC/AC inverter, an AC/AC converter, etc.
The semiconductor die includes a power transistor T integrated in the SiC substrate 102 Main And a current sensing transistor T Sense . The SiC substrate 102 may include a base semiconductor and one or more epitaxial layers grown on the base semiconductor. The semiconductor die also includes a source terminal S, a drain terminal D, and a gate terminal G for operation of the power device.
Doped resistor region integrated in power transistor T Main And a current sensing transistor T Sense And a temperature sensing resistor R configured to electrically connect the source terminal S to the dual mode sensing terminal TCS in the SiC substrate 102 therebetween T_Sense . Integrated temperature sensing resistor R forming a semiconductor die T_Sense Doped resistor region and two transistors T Main 、T Sense Have the same conductivity type (p-type in the case of n-channel transistors and p-type in the case of p-channel transistors).
Electronic system 100 also includes a current sense resistor R C_Sense Cutting and slicingSwitching device 104 and small signal current source or constant voltage source V/I T_Sense . The switching device 104 couples the dual mode sense terminal TCS of the semiconductor die to the current sense resistor R based on the operating state C_Sense Electrically coupled or electrically decoupled. The switching device 104 is shown in fig. 1 as a small signal transistor T Toggle 。
In a first state, the power transistor T of the semiconductor die Main And a current sensing transistor T Sense Is turned on as the switching device 104 does so that the switching device 104 electrically couples the dual mode sense terminal TCS of the semiconductor die to the current sense resistor R C_Sense . The first state configuration allows sensing of the resistor R by sensing the current C_Sense Sensing a power transistor T flowing through a semiconductor die by a voltage drop across Main Measured between the source terminal S and the dual mode sensing terminal TCS of the semiconductor die.
In a second state, the power transistor T of the semiconductor die Main And a current sensing transistor T Sense Is turned off as the switching device 104, such that the switching device 104 couples the dual mode sensing terminal TCS of the semiconductor die with the current sensing resistor R of the semiconductor die C_Sense And (4) electrically decoupling. Current/constant voltage source V/I T_Sense Providing a temperature sensing resistor R through the semiconductor die in a second state T_Sense Constant current, or constant voltage source V/I T_Sense Is electrically connected to the temperature sensing resistor R T_Sense . The second state configuration allows for temperature sensing resistor R by sensing the semiconductor die T_Sense The temperature sensing of the semiconductor die is performed by sensing the voltage drop across the dual-mode sensing terminal TCS, as measured between the source terminal S of the semiconductor die and the dual-mode sensing terminal TCS, or by sensing the current flowing through the dual-mode sensing terminal TCS. Thus, both temperature sensing and current sensing of the semiconductor die are provided via the same dual mode sense terminal TCS of the semiconductor die.
Fig. 2 shows a top view of an embodiment of a semiconductor die. According to this embodiment, a power transistor T is included in the semiconductor die Main Is a vertical device because of the power transistor T Main Between two major opposing surfaces of the die. Thus, the source terminal S and the drain terminal D are disposed at opposite sides of the semiconductor die, where the drain terminal D is not visible in fig. 2. As an example, the source terminal S is split into at least two separate pads 200, 202 in fig. 2. The first additional pad 204 implements the gate terminal G, and the second additional pad 206 implements the dual mode sensing terminal TCS. In the case of a lateral power device, all terminals would be located on the same side of the semiconductor die.
Fig. 3A shows a partial top view of a semiconductor die. Fig. 3B shows a cross-sectional view of the semiconductor die along the line labeled a-a' in fig. 3A. Fig. 3C shows a cross-sectional view of the semiconductor die along the line labeled B-B' in fig. 3A. Fig. 3D shows a cross-sectional view of the semiconductor die along the line labeled C-C in fig. 3A.
The power transistor cell 300 forms a power transistor T included in a semiconductor die Main And the current sensing unit 302 forms a current sensing transistor T included in the semiconductor die Sense . The power transistor cells 300 and the current sense cells 302 may have the same configuration, spacing, etc., but there are fewer current sense cells 302 than power transistor cells 300. For example, the power transistor cell 300 and the current sense cell 302 may have a stripe cell configuration in which the gate trenches 304 are arranged as stripes and the semiconductor mesas 306 separate the gate trenches 304.
The metallization layer 308 is separated from the SiC substrate 102 by an interlayer dielectric 310. The metallization layer 308 may comprise Al, Cu, AlCu, etc., and is partitioned into a main source metallization region 312 and a sense source metallization region 314. Primary source metallization region 312 forms or is electrically connected to a source terminal S of the semiconductor die and contacts source regions 316 and body regions 318 of opposite conductivity types in semiconductor mesas 306 of power transistor cell 300 through openings in interlayer dielectric 310. Sense source metallization region 314 forms or is electrically connected to dual mode sense terminal TCS of the semiconductor die and contacts source region 320 and body region 322 of opposite conductivity type in semiconductor mesa 306 of current sensing cell 302. The gate trenches 304 of both transistor types include a gate (G) electrode 324 separated from the SiC substrate 102 by a gate dielectric 326.
The power transistor cell 300 and the current sense cell 302 are isolated from each other by a doped resistor region 328 having the same conductivity type (p-type for n-channel devices) as the body region 318 of the power transistor cell 300 and the body region 322 of the current sense cell 302. For example, a current sense transistor T Sense Can be formed by the main power transistor T in the SiC substrate 102 Main Laterally surrounding, and doped resistor region 328 may be formed in the SiC substrate 102 to sense current T Sense And a main power transistor T Main In separate areas.
Along the current sense transistor T Sense On one side of (1), the doped resistor region 328 may be in the current sense transistor T Sense Gate trench 304 and main power transistor T Main Extend without interruption between the gate trenches 304, as shown, for example, in fig. 3B and 3C. The doped resistor region 328 may also abut a mesa 306 of the SiC substrate 102, which mesa 306 will host the power transistor T Main Adjacent ones of the strip gate trenches 304 are separated and include a power transistor T Main And the doped resistor region 328 may abut the mesa 306 of the SiC substrate 102, which mesa 306 will sense the current through the transistor T Sense Adjacent ones of the strip gate trenches 304 are separated and include a current sense transistor T Sense For example as shown in fig. 3D, and a body region 322.
Doped resistor region 328 is connected at one end to primary source metallization region 312 and at the other end to sense source metallization region 314 through corresponding openings in interlayer dielectric 310. The doped resistor region 328 is temperature dependent and forms a temperature sensing resistor R T_Sense The temperature sensing resistor R T_Sense The source terminal S is electrically connected to the dual mode sensing terminal TCS of the semiconductor die. Unlike polysilicon, which has a positive temperature coefficient up to about 300 ℃ and a negative temperature coefficient above 300 ℃, the SiC substrate 102 integrated temperature sensing resistor R forming a semiconductor die T_Sense Has a negative temperature coefficient of up to at least 400 ℃, which makes the doped resistor region 328 more suitable for temperature sensing over a wider temperature range.
The doped resistor region 328 is doped in a manner to have a sufficiently high resistance value, for example >15 kOhm. In one embodiment, the doped resistor region 328 has a sheet resistance (sheet resistance) of at least 10k Ω/square at 25 ℃.
The doped resistor region 328 may be formed by the same implantation process used to form the body region 318 of the transistor cell 300, the body region 322 of the transistor cell 302, and the gate oxide shield regions 330, 332 that may be formed at one side of the gate trench 304, wherein the gate oxide shield regions 330, 332 are of the same conductivity type as the body regions 318, 322 and the doped resistor region 328. In this case, the dopant concentration of the doped resistor region 328 is higher than the dopant concentration of the body regions 318, 322. The implantation process for the cell can be reused, but the resulting dopant concentration will be different.
For example, in the case of an n-channel SiC device and p-type doping for the resistor region 328, the resistor region 328 is highly sensitive to temperature due to incomplete ionization of the acceptor, and therefore when the main power transistor T is active Main Is turned off and current flows in reverse through the current sense transistor T Sense The body diode of (a) may be used as an integrated temperature sensing element. In a particular region of the semiconductor die, the resistance of the doped resistor region 328 may be designed to meet particular requirements. By adjusting the resistance of the doped resistor region 328 accordingly, the ESD robustness of the semiconductor die can be adjusted according to specific requirements.
The doped resistor region 328 serves as both a pn junction and a temperature sensing resistor. The pn junction shields the top surface of the SiC substrate 102 from the high electric field, confining the high electric field to the SiC substrate 102. Such shielding is particularly important for wide bandgap semiconductors such as SiC, which are typically subjected to 10 times or more electric field compared to Si. As explained above, the doped resistor region 328 is high temperatureAnd (4) sensitivity. Thus, by connecting the doped resistor region 328 between the main source metallization region 312 and the sense source metallization region 314 of the overlying metallization layer 308, the doped resistor region 328 serves as an integrated sensor element. The temperature sensing resistor R formed by the doped resistor region 328 may be sensed between the source terminal S and the current sense terminal TCS of the semiconductor die T_Sense The voltage across the terminals.
Since the doped resistor region 328 sufficiently isolates the power transistor cell 300 and the current sense cell 302 from each other, no additional photolithography step is required to provide such isolation, which reduces the cost and complexity of the wafer fabrication process. In fig. 3A, the gate trench 304 is blocked by the overlying metallization layer 308 and is therefore illustrated in this figure using a dashed rectangle. The SiC substrate 102 also includes a drift region 334 having the same conductivity type as the source regions 316, 320. A current spreading region 336 having the same conductivity type as the source regions 316, 320 may also be formed in the drift region 334 and have a higher doping concentration than the drift region 334. The SiC substrate 102 may include a drain region 338 of the same conductivity type as the source regions 316, 320 below the drift region 334 and a drain metallization layer 340 in contact with the drain region 338. In the case of a lateral device, the drain region 338 and drain metallization 340 of the semiconductor die would be disposed on the same side of the SiC substrate 102 as the source regions 316, 320.
Fig. 4 shows a circuit schematic of another embodiment of an electronic system 100 including a semiconductor die. According to this embodiment, the semiconductor die further includes a diode 400 in the SiC substrate 102 and connected in parallel with a doped resistor region 328, the doped resistor region 328 forming a temperature sensing resistor R of the semiconductor die T_Sense 。
Fig. 5 shows the same cross-sectional view as fig. 3C, but with the diode 400 included in the SiC substrate 102. According to this embodiment, the doped resistor region 328 is p-type, and the n-type cathode 500 of the diode 400 is formed in the doped resistor region 328. Cathode 500 contacts sensing source metallization region 314 which forms dual-mode sensing terminal TCS of the semiconductor die or is electrically connected to dual-mode sensing terminal TCS of the semiconductor die. In this embodiment, the p-type anode of the diode 400 is formed by the doped resistor region 328.
The polarity of the diode 400 is such that it is only available for forward conduction. The temperature signal provided by the diode embodiment is weaker than the non-diode embodiment, but more linear (e.g., about 1mV/K-2mV/K) than the relative change in the doped resistor region 328 with temperature. The diode 400 may be beneficial in cases of extreme ESD (electrostatic discharge) robustness requirements where the diode 400 provides both ESD and temperature sensing as characteristics.
Fig. 6 shows a circuit schematic of another embodiment of an electronic system 100 including a semiconductor die. The semiconductor die may or may not include the diode 400 shown in fig. 4 and 5.
According to the embodiment shown in fig. 6, the electronic system 100 further comprises a gate driver stage 600 and a driver 602 with a sensing circuit 604. The gate driver stage 600 may include a gate coupled to a voltage source V CC2 A high side switch HS coupled to the switch node SW and a low side switch LS coupled between the switch node SW and ground. The gate driver stage 600 is configured to be based on a high-side switching signal V provided by a driver 602 HS And a low-side switching signal V LS To switch on and off the power transistor T Main Current sensing transistor T Sense And a switching device 104.
The driver 602 is driven by a voltage source V CC1 Power is supplied and a switching control signal CTRL is received from another control device, such as a microcontroller. The driver 602 converts the switching control signals CTRL into high-side switching signals V for the gate driver stage 600, respectively HS And a low-side switching signal V LS 。
The driver 602 is coupled to the sense terminal S and the dual mode sense terminal TCS of the semiconductor die so that the sense circuit 604 can sense both the current flowing in the semiconductor die and the temperature of the semiconductor die using the same dual mode sense terminal TCS of the die.
In a first state, the driver 602 causes the gate driver stage 600 to switch on the power transistor T Main Current sensing transistor T Sense And a switching device 104 such that the switching device 104 electrically couples the dual mode sense terminal TCS of the semiconductor die to the current sense resistor R C_Sense . Current sensing transistor T Sense Activated in a first state and mirrored in the power transistor T Main The current flowing in the same. The image current flows through the current sense resistor R via the activated (conducting) switching device 104 C_Sense . Sensing circuit 604 senses current sense resistor R C_Sense A voltage drop across, thereby enabling a power transistor T comprised in the semiconductor die Main Current sensing of (2).
The driver 602 or other circuitry may include over-voltage protection circuitry, such as current sense resistor R C_Sense A comparator for comparing the voltage sense across with a reference value. If the current is sensed at the resistor R C_Sense The voltage drop sensed across exceeds a certain value, for example, 300mV, the overvoltage protection circuit will force the power transistor T to turn off Main . In one embodiment, a continuous readout is performed during the first state for current sensing/current protection and a trigger readout is performed during the second state for temperature sensing/temperature protection. The trigger reading in the second state indicates temperature stabilization. R C_Sense And R T_Sense The resistor values may be in the following ranges: normal operating current generating current sensing resistor R C_Sense A +/-300mV voltage drop across and higher current produces a higher voltage drop. The protection feature of shutting down the system for higher currents/higher voltage drops can be achieved by a comparator circuit.
Fig. 7A shows the power transistor T in a first state Main Example of being forced off ("Gate off"), where "VG" is applied to the power transistor T Main Is the voltage of the gate of the power transistor T, "VDS Main And VSen is at the current sense resistor R C_Sense The voltage drop sensed across. As shown in fig. 7A, at the current sense resistor R C_Sense The voltage VSen sensed across does not exceed the upper limit Vlim for the entire ON (ON) period ON 1. Thus, the power transistor T Main The gate voltage VG of which follows the switch control signal CTRL and the power transistor T Main Remains ON for the entire ON1 period. The next conduction period ("ON 2") is longer than ON1 to increase the power transistor T Main The drain current of (1). During ON2, current sense resistor R C_Sense The sensed voltage VSen across exceeds the upper limit Vlim before the end of ON 2. In response, the driver 602 causes the power transistor T Main Is deactivated ("gate off") and the power transistor T is ended before ON2 ends Main Is forced off even though the switch control signal CTRL is still active in the first state.
Temperature sensing via dual mode sense terminal TCS of the semiconductor die is not shown in fig. 7A in order to emphasize the turn-off characteristic. The die temperature may be sensed via the dual mode sensing terminal TCS during an OFF (OFF) period between on periods of the switch control signal CTRL, where the OFF period corresponds to the second state described herein. However, to emphasize the turn-off characteristic, the voltage Vsen is shown as 0V during a temperature sensing window corresponding to the turn-off period between ON1 and ON 2.
Fig. 7B shows various waveforms associated with an example of alternating between current sensing in a first state and temperature sensing in a second state, both via dual-mode sensing terminal TCS of the semiconductor die. In fig. 7B, "IL" denotes the slave power transistor T Main The load current flowing into the inductor. Inductive load current IL at power transistor T Main Increases when turned on, and is applied to the power transistor T Main Decreases when turned off. Fig. 7B also shows several on periods and intermediate off periods of the switch control signal CTRL. The first state corresponds to an on period of the switching control signal CTRL, and the second state corresponds to an off period. The current may be continuously sensed via the dual mode sensing terminal TCS in the first state. Therefore, the sensing voltage VSen varies in proportion to the variation of the load current IL.
The die temperature may be sensed via the dual mode sensing terminal TCS in the second state. In one embodiment, the die temperature is sensed after some settling time from the start of the off period. The sampling points are represented by points superimposed on the VSen waveform and vertical arrows superimposed on the CTRL waveform during the off period of the switching control signal CTRL. Depending on the magnitude of the switched load current IL, the temperature reading may be higher or lower than the temperature reading shown in fig. 7B, for example as indicated by the dashed horizontal line superimposed on the VSen waveform. The settling time may also be implemented for current measurements.
In a second state, the driver 602 causes the gate driver stage 600 to turn off the power transistor T Main Current sensing transistor T Sense And a switching device 104, such that the switching device 104 couples the dual mode sense terminal TCS of the semiconductor die with the current sense resistor R C_Sense And (4) electrically decoupling. In the second state, the flyback current flows in reverse through the current sensing transistor T Sense And the temperature sensing is based on the flyback current. Flyback current flows through the body diode, the temperature sensing resistor R T_Sense And out of the semiconductor die. The body diode is formed along a side of the gate trench 304 adjacent to a doped resistor region 328, the doped resistor region 328 forming a temperature sensing resistor R T_Sense 。
The sensing circuit 604 may be, for example, via a current/voltage source V/I T_Sense A constant voltage is provided for implant temperature sensing. In this case, the sensing circuit 604 senses the voltage indicative of the temperature via a voltage divider, e.g., a voltage divider formed from a constant voltage source V/I T_Sense And a temperature sensing resistor R T_Sense Another resistor in series is formed. For example, the constant voltage may be 5V, and the current flowing into the dual mode sensing terminal TCS generates a resistance value. Another option includes a constant voltage plus a series resistor that creates a voltage divider.
Instead of sensing the current flowing through the dual-mode sense terminal TCS to determine the temperature of the semiconductor die, the sensing circuit 604 may instead determine the temperature of the semiconductor die, e.g., via a current/voltage source V/I T_Sense Providing a temperature sensing resistor R flowing through a semiconductor die T_Sense And a voltage drop between the source terminal S of the semiconductor die and the dual mode sensing terminal TCS is sensed. In one embodiment, a constant current is providedConstant current/constant voltage source V/I T_Sense Integrated in the driver 602.
A constant current may also be provided in the first state. In other words, even by constant current/constant voltage source V/I T_Sense The constant current is supplied for temperature sensing in the second state, and the constant current/constant voltage source V/I T_Sense It does not necessarily have to be deactivated in the first state. In this case, the driver 602 may sense the resistor R at a current from the first state C_Sense The voltage drop sensed across subtracts a constant voltage offset, which corresponds to a constant current. Thus, the current/voltage source V/I T_Sense The current sensing performed in the first state is not disturbed.
The driver 602 may determine the temperature of the semiconductor die based on a voltage drop sensed between the source terminal S and the dual mode sensing terminal TCS of the semiconductor die or a sensing current flowing through the dual mode sensing terminal TCS in the second state. The voltage drop corresponds to a temperature sensing resistor R formed by a doped resistor region 328 integrated in the semiconductor die T_Sense A voltage across the terminals, and a sense current corresponding to a temperature sense resistor R flowing in the second state T_Sense The current of (2).
Integrated temperature sensing resistor R forming a semiconductor die T_Sense Has a defined temperature characteristic, as previously described herein. In one embodiment, driver 602 performs calculations based on these defined temperature characteristics to determine the die temperature. Separately or in combination, by sensing a temperature-sensing resistor R T_Sense The value of the voltage signal resulting from the voltage across or the value of the sense current flowing through the dual-mode sense terminal TCS may be determined by the resistance value of the doped resistor region 328 integrated in the semiconductor die or the small-signal current/constant-voltage source V/I T_Sense Is adjusted. Typically, the output voltage over the relevant temperature range can be designed to be 5V or 3.3V to be compatible with standard analog to digital converter circuits. Due to the power transistor T Main There may be fast switching transients and therefore the sensor signal may have some noise. Thus, for temperature monitoring, in the second (off) stateA triggered readout during PWM centering may be advantageous.
Instead of driver 602 calculating the die temperature, driver 602 may retrieve the temperature value from a lookup table (LUT)606 included in driver 602 or associated with driver 602. The temperature value retrieved from the LUT 606 most closely corresponds to the voltage drop sensed between the source terminal S of the semiconductor die and the dual mode sensing terminal TCS or the sensing current flowing through the dual mode sensing terminal TCS in the second state. Driver 602 may use the retrieved temperature value as an approximation of the semiconductor die temperature, or driver 602 may interpolate between two temperature values stored in LUT 606 to determine the semiconductor die temperature.
The driver 602 or other circuitry may include over-voltage protection circuitry such as a temperature sensing resistor R T_Sense A comparator for sensing the voltage across it and comparing it with a reference value, and if the sensed voltage drop is outside a certain range, e.g. 3.3V to 5V, the power transistor T is forced to turn off Main 。
Different comparator circuits may be used for current and temperature sensing. For example, in the current sensing mode, when the power transistor T Main Current sensing transistor T Sense And the switching device 104 is on, a window comparator may be used to determine whether the power transistor T should be turned off Main . In the temperature sensing mode, when the power transistor T Main Current sensing transistor T Sense And the switching device 104 is off, temperature sensing can be done near the center of the off period and connected to the ADC (analog to digital converter) channel to allow temperature stabilization. The settling time may also be implemented for current measurements. Signal processing may be done external to driver 602, for example, using one or more external comparators. The switching device 104 may be integrated in the driver 602 or in a separate device such as a microcontroller. In one embodiment, a current sense resistor R C_Sense And switching device 104 is attached to the same printed circuit board 608 as electronic system 100 and the semiconductor die.
Fig. 8 shows the electronics of another embodiment of an electronic system 100 including a semiconductor dieA schematic diagram of the circuit. The embodiment shown in fig. 8 is similar to the embodiment shown in fig. 1. However, in contrast, the switching device 104 is implemented as an operational amplifier 700. For example, the switching device 104 may be an operational amplifier circuit that functions as a current-to-voltage amplifier 700 with a current sense resistor R C_Sense Integrated low-ohmic sense resistor. Other types of switching devices 104 may be used to couple the dual mode sense terminal TCS of the semiconductor die to the current sense resistor R based on operating conditions C_Sense Coupled or decoupled.
While the present disclosure is not so limited, the following numbered examples illustrate one or more aspects of the present disclosure.
Example 1 a semiconductor die, comprising: a SiC substrate; a main power transistor and a current sense transistor integrated in the SiC substrate such that the current sense transistor is configured to mirror a current flowing in the main power transistor; a gate terminal electrically connected to gate electrodes of the two transistors; a drain terminal electrically connected to the drain region in the SiC substrate and common to the two transistors; a source terminal electrically connected to the source region and the body region of the main power transistor; a dual mode sense terminal; and a doped resistor region in the SiC substrate between the main power transistor and the current sense transistor, wherein the dual mode sense terminal is electrically connected to the source region and the body region of the current sense transistor, wherein the doped resistor region is of the same conductivity type as the body regions of the two transistors and is configured as a temperature sense resistor electrically connecting the source terminal to the dual mode sense terminal.
Example 2. a semiconductor die, comprising: a SiC substrate; a main power transistor and a current sense transistor integrated in the SiC substrate such that the current sense transistor is configured to mirror a current flowing in the main power transistor; a gate terminal electrically connected to gate electrodes of the two transistors; a drain terminal electrically connected to the drain region in the SiC substrate and common to the two transistors; a source terminal electrically connected to the source region and the body region of the main power transistor; a dual mode terminal configured to alternate between current sensing and temperature sensing; and a doped resistor region in the SiC substrate between the main power transistor and the current sense transistor, wherein the dual mode sense terminal is electrically connected to the source region and the body region of the current sense transistor, wherein the doped resistor region is of the same conductivity type as the body regions of the two transistors and is configured as a temperature sense resistor electrically connecting the source terminal to the dual mode sense terminal.
Example 3. the semiconductor die according to example 2, wherein the dual-mode terminal is configured to alternate between current sensing and temperature sensing based on a signal applied to the gate terminal.
Example 4. the semiconductor die of examples 2 or 3, wherein the dual mode sensing terminal is configured to receive current during temperature sensing and configured to output current through a mirror of the current sensing transistor during current sensing.
Example 5 the semiconductor die of any of examples 1-4, wherein the current sense transistor is laterally surrounded by the main power transistor in the SiC substrate, and wherein the doped resistor region is formed in a region of the SiC substrate separating the current sense transistor from the main power transistor.
Example 6. the semiconductor die of any of examples 1-5, wherein, along the first side of the current sense transistor, the doped resistor region extends between a gate trench of the current sense transistor and a gate trench of the main power transistor.
Example 7. the semiconductor die of any of examples 1-6, wherein the doped resistor region has a sheet resistance of at least 10k Ω/square at 25 ℃.
Example 8 the semiconductor die of any of examples 1-7, wherein the main power transistor includes a plurality of strip gate trenches, wherein the current sense transistor includes a plurality of strip gate trenches, and wherein the doped resistor region is formed in a region of the SiC substrate that separates the strip gate trenches of the current sense transistor from the strip gate trenches of the main power transistor.
Example 9 the semiconductor die of example 8, wherein the doped resistor region abuts a first mesa of the SiC substrate that separates adjacent ones of the strip gate trenches of the main power transistor and includes a source region and a body region of the main power transistor, and wherein the doped resistor region abuts a second mesa of the SiC substrate that separates adjacent ones of the strip gate trenches of the current sense transistor and includes a source region and a body region of the current sense transistor.
Example 10 the semiconductor die of any of examples 1-9, further comprising a diode in the SiC substrate and connected in parallel with the doped resistor region.
Example 11 the semiconductor die of example 10, wherein the diode includes a cathode formed in the doped resistor region, wherein the cathode contacts a metallization layer forming the dual-mode sense terminal or electrically connected to the dual-mode sense terminal, and wherein an anode of the diode is formed by the doped resistor region.
Example 12 a current and temperature sensing method for a semiconductor die including a power transistor and a current sense transistor integrated in a SiC substrate, a source terminal, a dual mode sense terminal, and a doped resistor region in the SiC substrate between the power transistor and the current sense transistor, the doped resistor region having a same conductivity type as a body region of the two transistors and configured as a temperature sense resistor electrically connecting the source terminal to the dual mode sense terminal, the method comprising: in a first state: turning on the power transistor, the current sense transistor, and the switching device such that the switching device electrically couples the dual mode sense terminal of the semiconductor die to the current sense resistor; and sensing a voltage drop across the current sense resistor; and in a second state: turning off the power transistor, the current sense transistor, and the switching device such that the switching device electrically decouples the dual mode sense terminal of the semiconductor die from the current sense resistor; providing a constant current through a temperature sensing resistor of the semiconductor die or electrically connecting a constant voltage source to the temperature sensing resistor; and sensing a voltage drop between the source terminal of the semiconductor die and the dual-mode sensing terminal, or sensing a current flowing through the dual-mode sensing terminal.
Example 13. the method according to example 12, further comprising: the temperature of the semiconductor die is determined based on a sensed voltage drop between the source terminal of the semiconductor die and the dual-mode sensing terminal or a sensed current flowing through the dual-mode sensing terminal in the second state.
Example 14 the method of example 13, wherein determining the temperature of the semiconductor die comprises: a temperature value is retrieved from the lookup table, the temperature value most closely corresponding to a sensed voltage drop between the source terminal of the semiconductor die and the dual mode sensing terminal or a sensed current flowing through the dual mode sensing terminal in the second state.
Example 15. the method of any of examples 12 to 14, wherein the constant current is also provided in the first state, the method further comprising: a constant voltage offset is subtracted from the voltage drop sensed across the current sense resistor in the first state, the constant voltage offset corresponding to a constant current.
Example 16 an electronic system for sensing current and temperature of a semiconductor die, the semiconductor die including a power transistor and a current sense transistor integrated in a SiC substrate, a source terminal, a dual-mode sense terminal, and a doped resistor region in the SiC substrate between the power transistor and the current sense transistor, the doped resistor region having a same conductivity type as body regions of the two transistors and configured as a temperature sense resistor electrically connecting the source terminal to the dual-mode sense terminal, the electronic system comprising: a current sense resistor; a switching device electrically coupling the dual mode sense terminal of the semiconductor die to the current sense resistor; a driver; and a sensing circuit, wherein, in a first state: the driver is configured to turn on the power transistor, the current sense transistor, and the switching device such that the switching device electrically couples the dual mode sense terminal of the semiconductor die to the current sense resistor; and a sensing circuit configured to sense a voltage drop across the current sense resistor; and in a second state: the driver is configured to turn off the power transistor, the current sense transistor, and the switching device such that the switching device electrically decouples the dual mode sense terminal of the semiconductor die from the current sense resistor; and a sensing circuit configured to provide a constant current through a temperature sensing resistor of the semiconductor die or to electrically connect a constant voltage source to the temperature sensing resistor, and to sense a voltage drop between a source terminal of the semiconductor die and the dual-mode sensing terminal or to sense a current flowing through the dual-mode sensing terminal. .
Example 17 the electronic system of example 16, wherein the driver is configured to determine the temperature of the semiconductor die based on a sensed voltage drop between the source terminal of the semiconductor die and the dual-mode sensing terminal or a sensed current flowing through the dual-mode sensing terminal in the second state.
Example 18 the electronic system of example 17, wherein the driver is configured to retrieve a temperature value from the lookup table to determine the temperature of the semiconductor die, the temperature value most closely corresponding to a voltage drop sensed between the source terminal of the semiconductor die and the dual mode sensing terminal or a sensed current flowing through the dual mode detection terminal in the second state.
Example 19 the electronic system of any of examples 16 to 18, wherein a constant current is also provided in the first state, and wherein the driver is configured to subtract a constant voltage offset from a voltage drop sensed across the current sense resistor in the first state, the constant voltage offset corresponding to the constant current.
Example 20 the electronic system of any one of examples 16 to 19, wherein the switching device is a transistor.
Example 21 the electronic system of any of examples 16 to 19, wherein the switching device is an operational amplifier.
Example 22 the electronic system of any of examples 16 to 21, wherein the current sense resistor and the switching device are attached to the same printed circuit board as the electronic system and the semiconductor die.
Example 23 the electronic system of any of examples 16 to 22, wherein the sensing circuit includes a constant current source to provide the constant current, and wherein the constant current source is integrated in the driver.
Terms such as "first," "second," and the like, are used to describe various elements, regions, sections, etc., and are not intended to be limiting. Like terms refer to like elements throughout the description.
As used herein, the terms "having," "including," "containing," and the like are open-ended terms that indicate the presence of the stated elements or features, but do not exclude additional elements or features. The articles "a," "an," and "the" are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention be limited only by the claims and the equivalents thereof.

Claims (20)

1. A semiconductor die, comprising:
a silicon carbide (SiC) substrate;
a main power transistor and a current sense transistor integrated in the SiC substrate such that the current sense transistor is configured to mirror current flowing in the main power transistor;
a gate terminal electrically connected to respective gate electrodes of the main power transistor and the current sense transistor;
a drain terminal electrically connected to a drain region in the SiC substrate and common to both the main power transistor and the current sense transistor;
a source terminal electrically connected to a source region and a body region of the main power transistor;
a dual mode sense terminal; and
a doped resistor region in the SiC substrate between the main power transistor and the current sense transistor,
wherein the dual mode sense terminal is electrically connected to a source region and a body region of the current sense transistor,
wherein the doped resistor region has the same conductivity type as the body regions of the main power transistor and the current sense transistor, respectively, and is configured as a temperature sense resistor electrically connecting the source terminal to the dual mode sense terminal.
2. The semiconductor die of claim 1, wherein the current sense transistor is laterally surrounded in the SiC substrate by the main power transistor, and wherein the doped resistor region is formed in a region of the SiC substrate separating the current sense transistor from the main power transistor.
3. The semiconductor die of claim 1, wherein the doped resistor region extends between a gate trench of the current sense transistor and a gate trench of the main power transistor along a first side of the current sense transistor.
4. The semiconductor die of claim 1, wherein the doped resistor region has a sheet resistance of at least 10k Ω/square at 25 ℃.
5. The semiconductor die of claim 1, wherein the main power transistor comprises a plurality of strip gate trenches, wherein the current sense transistor comprises a plurality of strip gate trenches, and wherein the doped resistor region is formed in a region of the SiC substrate separating the strip gate trenches of the current sense transistor from the strip gate trenches of the main power transistor.
6. The semiconductor die of claim 5, wherein the doped resistor region abuts a first mesa of the SiC substrate that separates adjacent ones of the strip gate trenches of the main power transistor and includes a source region and a body region of the main power transistor, and wherein the doped resistor region abuts a second mesa of the SiC substrate that separates adjacent ones of the strip gate trenches of the current sense transistor and includes a source region and a body region of the current sense transistor.
7. The semiconductor die of claim 1, further comprising a diode in the SiC substrate and connected in parallel with the doped resistor region.
8. The semiconductor die of claim 7, wherein the diode comprises a cathode formed in the doped resistor region, wherein the cathode contacts a metallization layer forming the dual-mode sense terminal or electrically connected to the dual-mode sense terminal, and wherein an anode of the diode is formed by the doped resistor region.
9. A method for sensing current and temperature of a semiconductor die comprising a power transistor and a current sense transistor integrated in a silicon carbide, SiC, substrate, a source terminal, a dual mode sense terminal, and a doped resistor region in the SiC substrate between the power transistor and the current sense transistor, the doped resistor region having the same conductivity type as a body region of each of the power transistor and the current sense transistor and being configured as a temperature sense resistor electrically connecting the source terminal to the dual mode sense terminal, the method comprising:
in a first state:
turning on the power transistor, the current sense transistor, and a switching device such that the switching device electrically couples the dual mode sense terminal of the semiconductor die to a current sense resistor; and
sensing a voltage drop across the current sense resistor; and
in a second state:
turning off the power transistor, the current sense transistor, and the switching device such that the switching device electrically decouples the dual mode sense terminal of the semiconductor die from the current sense resistor;
providing a constant current through the temperature sensing resistor of the semiconductor die or electrically connecting a constant voltage source to the temperature sensing resistor; and
sensing a voltage drop between the source terminal of the semiconductor die and the dual-mode sensing terminal, or sensing a current flowing through the dual-mode sensing terminal.
10. The method of claim 9, further comprising:
determining a temperature of the semiconductor die based on a sensed voltage drop between the source terminal and the dual-mode sensing terminal of the semiconductor die or a sensed current flowing through the dual-mode sensing terminal in the second state.
11. The method of claim 10, wherein determining the temperature of the semiconductor die comprises:
retrieving a temperature value from a lookup table that most closely corresponds to a voltage drop sensed between the source terminal of the semiconductor die and the dual-mode sensing terminal or a sensed current flowing through the dual-mode sensing terminal in the second state.
12. The method of claim 9, wherein the constant current is also provided in the first state, the method further comprising:
subtracting a constant voltage offset from a voltage drop sensed across the current sense resistor in the first state, the constant voltage offset corresponding to the constant current.
13. An electronic system for sensing current and temperature of a semiconductor die including a power transistor and a current sense transistor integrated in a silicon carbide (SiC) substrate, a source terminal, a dual mode sense terminal, and a doped resistor region in the SiC substrate between the power transistor and the current sense transistor, the doped resistor region having a same conductivity type as respective body regions of the power transistor and the current sense transistor and configured as a temperature sense resistor electrically connecting the source terminal to the dual mode sense terminal, the electronic system comprising:
a current sense resistor;
a switching device electrically coupling the dual mode sense terminal of the semiconductor die to the current sense resistor;
a driver; and
a sensing circuit for sensing the temperature of the liquid crystal,
wherein, in a first state:
the driver is configured to turn on the power transistor, the current sense transistor, and the switching device such that the switching device electrically couples the dual mode sense terminal of the semiconductor die to the current sense resistor; and
the sensing circuit is configured to sense a voltage drop across the current sense resistor; and
in a second state:
the driver is configured to turn off the power transistor, the current sense transistor, and the switching device such that the switching device electrically decouples the dual mode sense terminal of the semiconductor die from the current sense resistor; and
the sensing circuit is configured to provide a constant current through the temperature sensing resistor of the semiconductor die or to electrically connect a constant voltage source to the temperature sensing resistor, and to sense a voltage drop between the source terminal of the semiconductor die and the dual mode sensing terminal or to sense a current through the dual mode sensing terminal.
14. The electronic system of claim 13, wherein the driver is configured to determine the temperature of the semiconductor die based on a voltage drop sensed between the source terminal and the dual-mode sensing terminal of the semiconductor die or a sensed current flowing through the dual-mode sensing terminal in the second state.
15. The electronic system of claim 14, wherein the driver is configured to retrieve a temperature value from a lookup table to determine the temperature of the semiconductor die, the temperature value most closely corresponding to a voltage drop sensed between the source terminal and the dual mode sensing terminal of the semiconductor die or a sensed current flowing through the dual mode detection terminal in the second state.
16. The electronic system of claim 13, wherein the constant current is also provided in the first state, and wherein the driver is configured to subtract a constant voltage offset from a voltage drop sensed across the current sense resistor in the first state, the constant voltage offset corresponding to the constant current.
17. The electronic system of claim 13, wherein the switching device is a transistor.
18. The electronic system of claim 13, wherein the switching device is an operational amplifier.
19. The electronic system of claim 13, wherein the current sense resistor and the switching device are attached to the same printed circuit board as the electronic system and the semiconductor die.
20. The electronic system of claim 13, wherein the sensing circuit comprises a constant current source to provide the constant current, and wherein the constant current source is integrated in the driver.
CN202210118923.1A 2021-02-22 2022-02-08 Semiconductor die and method and electronic system for sensing current and temperature Pending CN114975430A (en)

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