CN114900962A - Printed circuit board and layer adding method thereof - Google Patents

Printed circuit board and layer adding method thereof Download PDF

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Publication number
CN114900962A
CN114900962A CN202210406832.8A CN202210406832A CN114900962A CN 114900962 A CN114900962 A CN 114900962A CN 202210406832 A CN202210406832 A CN 202210406832A CN 114900962 A CN114900962 A CN 114900962A
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China
Prior art keywords
layer
dry film
dielectric layer
substrate
plate
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CN202210406832.8A
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Chinese (zh)
Inventor
李�瑞
陆然
彭锦强
卢海林
黄永民
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Guangzhou Guangxin Packaging Substrate Co ltd
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Guangzhou Guangxin Packaging Substrate Co ltd
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Priority to CN202210406832.8A priority Critical patent/CN114900962A/en
Publication of CN114900962A publication Critical patent/CN114900962A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0008Apparatus or processes for manufacturing printed circuits for aligning or positioning of tools relative to the circuit board
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/166Alignment or registration; Control of registration
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The invention discloses a printed circuit board and a layer adding method thereof, wherein the layer adding method of the printed circuit board comprises the following steps: obtaining a substrate and a to-be-added plate of a dielectric layer, wherein the substrate is attached to the to-be-added plate, and a plurality of bonding pads are formed on one side of the substrate, which is close to the dielectric layer; drilling the dielectric layer based on the position of each bonding pad to form blind holes respectively exposing each bonding pad on the dielectric layer; a dry film is pasted on the whole plate on one side of the dielectric layer far away from the plate to be added; exposing the dry film based on the position of each blind hole; and developing and metalizing the exposed dry film until a metalized blind hole is formed, and forming a layer-adding conducting layer on one side of the dielectric layer, which is far away from the substrate, so as to add layers to the plate to be added. By the method, the exposure alignment precision can be improved, and the reliability and the stability of the structure of the printed circuit board are further improved.

Description

Printed circuit board and layer adding method thereof
Technical Field
The invention is applied to the technical field of printed circuit boards, in particular to a printed circuit board and a layer adding method thereof.
Background
Pcb (printed Circuit board), also known as printed Circuit board or printed Circuit board, is an important electronic component used in a wide range of applications, is a support for electronic components, and is also a carrier for electrical connection of electronic components.
In the layer-adding drilling alignment of the PCB, an inner layer bonding pad is often used as a target for alignment processing of a via hole, and then the subsequent process is carried out until the outer layer is exposed, and the inner layer bonding pad is still used as the target for alignment.
Therefore, the drilling and the outer layer exposure are easy to generate alignment precision deviation between the alignment of the processes of operating by different devices, so that the subsequent metallization process depending on the exposure alignment also generates deviation, the alignment deviation influences the interconnection of the plates, and the product short circuit phenomenon is generated.
Disclosure of Invention
The invention provides a printed circuit board and a layer adding method thereof, which aim to solve the problem that the printed circuit board is easy to have alignment precision deviation in the prior art.
In order to solve the technical problem, the invention provides a layer adding method of a printed circuit board, which comprises the following steps: obtaining a substrate and a to-be-added plate of a dielectric layer, wherein the substrate is attached to the to-be-added plate, and a plurality of bonding pads are formed on one side of the substrate, which is close to the dielectric layer; drilling the dielectric layer based on the position of each bonding pad to form blind holes respectively exposing the corresponding partial bonding pads on the dielectric layer; a dry film is pasted on the whole board on one side of the dielectric layer far away from the substrate; exposing the dry film based on the position of each blind hole; developing and metalizing the exposed dry film until forming a metalized blind hole, and forming a layer-adding conducting layer on one side of the dielectric layer far away from the substrate so as to add a layer on the plate to be added
The step of drilling the dielectric layer based on the position of each bonding pad to form blind holes respectively exposing the corresponding partial bonding pads on the dielectric layer comprises the following steps: using a laser machine to take the position of each bonding pad as a target, and performing laser drilling on the plate to be added from one side of the dielectric layer, which is far away from the plate to be added, so as to form blind holes exposing the corresponding partial bonding pads on the dielectric layer respectively; the step of exposing the dry film based on the position of each blind hole includes: and exposing the dry film by using the position of each blind hole as a target by using an exposure machine so as to expose the dry film covering each blind hole and the dry film corresponding to the conductive circuit of the layer-adding conductive layer.
Wherein, utilize the laser machine with the position of each pad as the target, treat from the one side that the dielectric layer kept away from treating the layer plate and carry out laser drilling to form the step of exposing the blind hole of corresponding partial pad on the dielectric layer respectively still includes: using a laser machine to take the position of each bonding pad as a target, and respectively forming a plurality of target holes on the plate to be laminated, wherein the target holes penetrate through part or all of the plate to be laminated so as to carry out interlayer interconnection; the position of each blind hole is used as a target by utilizing an exposure machine, the dry film is exposed, and the steps of exposing the dry film covering each blind hole and the dry film corresponding to the conducting circuit of the layer-adding conducting layer further comprise: and exposing the dry film covering the blind holes, the dry film of each target hole and the dry film corresponding to the conductive circuit of the layer-adding conductive layer by using the position of each blind hole as a target by using an exposure machine.
Wherein each target hole has a diameter in the range of 55-75 microns.
The method comprises the following steps of developing an exposed dry film, metallizing the exposed dry film until a metallized blind hole is formed, forming a layer-adding conducting layer on one side of a dielectric layer far away from a substrate, and adding a layer on a plate to be added, wherein the step of adding the layer on the plate to be added comprises the following steps: developing the exposed dry film to remove the dry film covering the blind holes, the dry film of the target holes and the dry film corresponding to the conductive circuit of the added conductive layer; and electroplating one side of the dielectric layer, which is far away from the substrate, until a metalized blind hole, a metalized target hole and a conductive circuit of the added layer conductive layer are formed.
Wherein, still include before the step of whole board subsides of one side whole board that keeps away from the base plate at the dielectric layer: carrying out copper deposition treatment on one side of the dielectric layer, which is far away from the substrate, each target hole and each blind hole; the steps of developing and metallizing the exposed dry film further comprise: removing the dry film, and exposing the copper deposit which is not corresponding to the conductive circuit of the layer-adding conductive layer; and etching the copper deposition to enable the conductive circuits of the build-up conductive layer to be mutually independent.
Wherein, still include after the step of carrying out the heavy copper processing of one side and each blind hole that the dielectric layer is kept away from the base plate: and pickling one side of the dielectric layer far away from the substrate to clean.
The step of acquiring the to-be-added plate including the substrate and the dielectric layer which are arranged in a fitting manner comprises the following steps: obtaining a substrate; and pressing the dielectric layer on one side of the substrate on which the bonding pads are formed to obtain the plate to be added with the layers.
Wherein the diameter range of the bonding pad is 2.4-2.6 mm; the diameter of the blind hole ranges from 0.9 mm to 1.1 mm.
In order to solve the technical problem, the invention provides a printed circuit board which is prepared by any one of the layer adding methods of the printed circuit board.
The invention has the beneficial effects that: different from the prior art, the printed circuit board of the invention drills the dielectric layer based on the position of each bonding pad to form blind holes respectively exposing the corresponding partial bonding pads on the dielectric layer, pastes a dry film on the whole side of the dielectric layer far away from the substrate, exposes the dry film based on the position of each blind hole, and finally develops and metallizes the exposed dry film until forming metallized blind holes, and forms a layer-adding conducting layer on the side of the dielectric layer far away from the substrate to add layers to the plate to be added, so that the drilling and the exposure can be respectively aligned based on objects with the same position but different sizes, the alignment precision of the exposure is improved by a smaller target, the metallization position error caused by the exposure alignment error is reduced, the short circuit of products is generated, the alignment precision of the exposure is improved, and each blind hole is accurately exposed, the subsequent metallization of being convenient for can accurately carry out the metallization to the blind hole and improve the structural reliability and the stability of metallization blind hole, and then improve printed circuit board's structural reliability and stability.
Drawings
FIG. 1 is a schematic flow chart diagram illustrating a method for building up layers of a printed circuit board according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart of another embodiment of a method for increasing layers of a printed circuit board according to the present invention;
FIG. 3 is a schematic structural diagram of an embodiment of a board to be laminated in step S22 in the embodiment of FIG. 2;
FIG. 4 is a schematic structural diagram of an embodiment of a plate to be laminated in step S23 in the embodiment of FIG. 2;
FIG. 5 is a schematic structural diagram of an embodiment of a plate to be laminated in step S25 in the embodiment of FIG. 2;
fig. 6 is a schematic structural diagram of an embodiment of the printed circuit board of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
It should be noted that, if directional indications (such as up, down, left, right, front, and back … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description of "first", "second", etc. in an embodiment of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a schematic flow chart of a layer adding method of a printed circuit board according to an embodiment of the invention.
Step S11: and acquiring a substrate and a to-be-added plate of the dielectric layer, wherein the substrate is attached to the to-be-added plate, and a plurality of bonding pads are formed on one side of the substrate close to the dielectric layer.
And obtaining the plate to be added, wherein the plate to be added comprises a substrate and a dielectric layer which are arranged in a fitting manner. The substrate may include a single-layer circuit board or a multi-layer circuit board, for example: in this embodiment, a circuit layer needs to be added on the single-layer circuit board or the multilayer circuit board to prepare a printed circuit board meeting the preparation requirement.
The dielectric layer of this embodiment may specifically include one or more of epoxy resins, polyimides, Bismaleimide Triazine (BT), ceramics, and ABF (Ajinomoto Build-up Film).
Wherein, the one side that the base plate is close to the dielectric layer is formed with a plurality of PADs (PAD), and the PAD of this embodiment refers to the positioning PAD on the base plate for prevent slow-witted discernment, and it also can be used for the electric connection to add the layer conducting layer, and the quantity of PAD on the base plate can be based on location and connection demand and set up, for example: 4, 100, 2000, etc., without limitation.
Step S12: and drilling the dielectric layer based on the position of each bonding pad so as to form blind holes respectively exposing the corresponding partial bonding pads on the dielectric layer.
And drilling the dielectric layer based on the position of each bonding pad, and forming blind holes respectively exposing the corresponding partial bonding pads on the dielectric layer. Namely, a plurality of blind holes are prepared on the dielectric layer, each blind hole exposes a corresponding part of the bonding pad, and the blind holes correspond to the bonding pads one to one. The blind hole of the embodiment only penetrates through the dielectric layer to expose the bonding pad, and the substrate is not affected.
In a specific application scenario, when 4 bonding pads are formed on a substrate, 4 blind holes are also formed on a dielectric layer, each blind hole corresponds to one bonding pad, and each blind hole exposes a part corresponding to the bonding pad.
During drilling in the step, the positions of the bonding pads are used as the reference for drilling, so that blind holes of the bonding pads at the exposed parts are obtained. And the blind holes only expose corresponding parts of the bonding pads, namely the diameters of the blind holes are smaller than those of the corresponding bonding pads.
The drilling method in this step may include laser ablation or mechanical milling, and is not limited herein.
When drilling in the step, blind holes or through holes can be drilled in other positions of the dielectric layer to expose the inner layer circuit of the substrate, so that the subsequent layer-adding conducting layer can be electrically connected with the inner layer circuit of the substrate.
Step S13: and sticking a dry film on the whole board on one side of the dielectric layer far away from the substrate.
And after drilling, sticking a dry film on the whole board on one side of the dielectric layer far away from the substrate. The dry film is a high polymer material, and can generate a polymerization reaction after being irradiated by ultraviolet rays to form a stable substance to be attached to the board surface, so that the functions of blocking electroplating and etching are achieved.
Step S14: and exposing the dry film based on the position of each blind hole.
And after the dry film is pasted on the whole surface of one side of the dielectric layer, which is far away from the substrate, exposing the dry film based on the position of each blind hole.
During exposure in the step, the position of each blind hole is taken as a reference, and the diameter of each blind hole is smaller than that of the corresponding bonding pad, so that the target alignment precision of exposure can be improved based on a smaller target during exposure, the occurrence of short circuit of a product caused by the wrong position of metallization due to exposure alignment error is reduced, the exposure alignment precision is improved, each blind hole is accurately exposed, and the subsequent metallization can accurately metalize the blind hole.
Step S15: and developing and metalizing the exposed dry film until a metalized blind hole is formed, and forming a layer-adding conducting layer on one side of the dielectric layer, which is far away from the substrate, so as to add layers to the plate to be added.
After exposure, the dry film is developed to remove the exposed dry film through developing solution, thereby exposing each blind hole exposed on the dielectric layer. Since the dry film is exposed based on the positions of the blind holes in step S14, the dry film covering the blind holes is accurately exposed, and the dry film covering the blind holes is accurately removed during development, thereby exposing the blind holes.
And after development, metallization is carried out to fill the blind holes to form metallized holes, and a build-up conducting layer is formed on one side of the dielectric layer, which is far away from the substrate, so as to build up the layer of the plate to be built up. Because the dry film covering each blind hole is accurately removed, metal can be accurately filled into the blind holes during metallization, thereby avoiding the occurrence of short circuit of products due to the error of metallization positions. The structural reliability and stability of the metallized blind hole are improved.
At the moment, the metallized blind holes can communicate the substrate with the build-up conductive layer, so that the build-up of the substrate is realized.
Through the steps, the method for adding layers of the printed circuit board of the embodiment drills the dielectric layer based on the position of each bonding pad to form the blind holes respectively exposing the corresponding partial bonding pads on the dielectric layer, pastes the dry film on the whole side of the dielectric layer far away from the substrate, exposes the dry film based on the position of each blind hole, and finally develops and metallizes the exposed dry film until the metallized blind holes are formed, and forms the layer-adding conducting layer on the side of the dielectric layer far away from the substrate to add layers to the plate to be added, so that the drilling and the exposure can be respectively aligned based on objects with the same position but different sizes, the alignment precision of the exposure is improved through a smaller target, the occurrence of the condition that the metallization position is wrong due to exposure alignment error and the product is short-circuited is reduced, the alignment precision of the exposure is improved, and each blind hole is accurately exposed, the blind hole can be accurately metallized to facilitate subsequent metallization, and the structural reliability and stability of the metallized blind hole are improved.
Referring to fig. 2, fig. 2 is a schematic flow chart of another embodiment of a method for adding layers to a printed circuit board according to the present invention.
Step S21: and obtaining a substrate, and pressing the dielectric layer on one side of the substrate where the bonding pads are formed to obtain the plate to be added.
And obtaining the substrate, wherein the substrate can comprise a single-layer circuit board, a multi-layer circuit board or a layer-added circuit board. An inner layer pattern of the substrate is prepared, wherein the inner layer pattern of the substrate comprises a conductive line and a bonding pad, the bonding pad can be used for foolproof recognition, and the conductive line is used for realizing the line function of the substrate.
And pressing the dielectric layer on one side of the substrate on which the bonding pads are formed to obtain the plate to be added with the layers.
The dielectric layer may specifically include one or more of epoxy resins, polyimides, Bismaleimide Triazine (BT), ceramics, and ABF (Ajinomoto Build-up Film).
The diameter of the bonding pad of this embodiment is in a range of 2.4-2.6 mm, and specifically may be 2.4 mm, 2.5 mm, or 2.6 mm, and the like, which is not limited herein. The bonding pads within the range can be identified, and the influence on the layout of the printed circuit board caused by overlarge size can be avoided.
Step S22: and using the laser machine to take the position of each bonding pad as a target, and performing laser drilling on the plate to be added from one side of the dielectric layer, which is far away from the plate to be added, so as to form blind holes exposing the corresponding partial bonding pads on the dielectric layer respectively.
And (3) using the laser machine to take the position of each bonding pad as a target, namely identifying and aligning the plate based on the position of each bonding pad, and performing laser drilling on the plate to be added from one side of the dielectric layer far away from the plate to be added so as to form blind holes exposing the corresponding partial bonding pads on the dielectric layer. Wherein, the bonding pad covered by the dielectric layer can be positioned by using the infrared function of the laser machine. The laser machine may include a carbon dioxide laser machine or other laser machine.
The blind holes only expose the corresponding partial bonding pads, namely the diameter of the blind holes is smaller than that of the corresponding bonding pads, the diameter range of the blind holes is 0.9-1.1 mm, specifically 0.9 mm, 1.0 mm or 1.1 mm, and the like, the blind holes in the range can be recognized by a subsequent exposure machine, and can have a certain size difference with the bonding pads, so that the alignment precision of the exposure machine is improved.
The blind holes and the bonding pads with the sizes can enable the ring width range of the bonding pads after the blind holes are metalized to be 0.15-0.85 mm, and further high-precision ring width preparation is achieved.
In a specific application scenario, a target hole of a functional area of a plate to be laminated can be prepared synchronously with a blind hole, that is, the step specifically includes: and (3) using the laser machine to take the position of each bonding pad as a target, respectively forming blind holes exposing corresponding partial bonding pads on the dielectric layer and respectively forming a plurality of target holes on the plate to be laminated, wherein the target holes penetrate through part or all of the plate to be laminated so that the metalized target holes are communicated with part or all of the conductive layers of the printed circuit board.
Through synchronous preparation target hole and blind hole, the scheme of preparing the target hole alone can reduce a laser drilling counterpoint process, and then can directly avoid the precision deviation of a laser drilling counterpoint, promotes the counterpoint accuracy between target hole and the blind hole, improves pad ring width precision, improves printed circuit board's structural stability.
The target hole is used for realizing an interlayer interconnection function of the printed circuit board, the diameter range of the target hole is 55-75 micrometers, specifically, 55 micrometers, 60 micrometers, 62 micrometers, 65 micrometers, 68 micrometers, 70 micrometers, 72 micrometers, 75 micrometers and the like, and the target hole can be specifically set based on a connection requirement of a functional area of a board to be laminated, which is not limited herein.
Referring to fig. 3, fig. 3 is a schematic structural diagram of an embodiment of a board to be laminated in step S22 in the embodiment of fig. 2.
The plate 100 to be added in this embodiment includes a substrate 101 and a dielectric layer 102. The substrate 101 is formed by sequentially stacking and bonding at least one conductive layer and at least one circuit layer.
Conductive traces 104 and pads 103 are formed on the substrate 101 on a side thereof adjacent to the dielectric layer 102. A plurality of target holes 106 and a plurality of blind holes 105 are formed in the dielectric layer 102. Each target hole 106 exposes a conductive trace 104 or an inner layer of the substrate 101.
Each blind hole 105 exposes the pad 103, and the diameter of the blind hole 105 is smaller than that of the corresponding pad 103.
Step S23: and sticking a dry film on the whole board on one side of the dielectric layer far away from the substrate.
After drilling, copper deposition treatment is carried out on one side of the dielectric layer, which is far away from the substrate, each target hole and each blind hole, so that metal can be attached in the subsequent metallization process.
After copper deposition, acid washing is carried out on one side of the dielectric layer, which is far away from the substrate, so that one side of the dielectric layer, which is far away from the substrate, is cleaned, the dry film is convenient to attach, gaps for attaching the dry film are reduced, and the tightness for attaching the dry film is improved.
And after cleaning, sticking a dry film on the whole board on one side of the dielectric layer, which is far away from the substrate.
Referring to fig. 4, fig. 4 is a schematic structural diagram of an embodiment of a board to be laminated in step S23 in the embodiment of fig. 2.
The plate member to be laminated 100 of the present embodiment is further provided with a copper deposition layer 108 and a dry film 107 on the basis of the plate member to be laminated 100 of the embodiment of fig. 3.
The copper immersion layer 108 is attached to a side of the dielectric layer 102 away from the substrate 101, and a hole wall and a hole bottom of each blind hole 105 and each target hole 106, that is, the copper immersion layer 108 is attached to a side surface of the whole board 100 to be laminated, where the blind holes 105 and the target holes 106 are formed.
The dry film 107 is entirely attached to the copper deposition layer 108 on the side of the dielectric layer 102 away from the substrate 101.
Step S24: and exposing the dry film by using the position of each blind hole as a target by using an exposure machine so as to expose the dry film covering each blind hole and the dry film corresponding to the conductive circuit of the layer-adding conductive layer.
And after the dry film is attached, exposing the dry film by using the position of each blind hole as a target by using an exposure machine, namely identifying and aligning the plate based on the position of each blind hole, and exposing the dry film covering each blind hole, the dry film of each target hole and the dry film corresponding to the conductive circuit of the added layer conductive layer after aligning.
During exposure in the step, the position of each blind hole is used as a target, and the diameter of each blind hole is smaller than that of the corresponding bonding pad, so that the exposure target alignment precision can be improved based on a smaller target during exposure, the exposure accuracy of the dry film of each blind hole, the dry film of each target hole and the dry film corresponding to the conductive circuit of the layer-adding conductive layer is improved, the occurrence of the condition of short circuit of a product caused by the metallization position error due to exposure alignment error is reduced, the exposure alignment precision is improved, each blind hole is accurately exposed, and the blind holes can be accurately metallized by subsequent metallization.
Step S25: and developing the exposed dry film to remove the dry film covering the blind holes and the dry film corresponding to the conductive circuit of the layer-adding conductive layer, and electroplating one side of the dielectric layer, which is far away from the substrate, until the metalized blind holes and the conductive circuit of the layer-adding conductive layer are formed.
After exposure, the dry film is developed to remove the exposed dry film through developing liquid medicine, so that the exposed blind holes, the exposed target holes and the positions corresponding to the conducting circuits of the added conducting layers on the dielectric layer are exposed.
And after developing, carrying out metallization again, forming a metallized hole by metallizing each blind hole, forming a metallized target hole by metallizing each target hole, and forming a conductive circuit at a position corresponding to the conductive circuit of the layer-adding conductive layer to obtain the layer-adding conductive layer, thereby adding layers to the plate to be added. Specifically, electroplating is carried out on one side of the dielectric layer, which is far away from the substrate, until the metallized blind hole, the metallized target hole and the conductive circuit of the added layer conductive layer are formed.
Referring to fig. 5, fig. 5 is a schematic structural diagram of an embodiment of the board to be laminated in step S25 in the embodiment of fig. 2.
The plate member to be laminated 100 of the present embodiment is based on the plate member to be laminated 100 of the embodiment of fig. 4, a part of the dry film 107 is developed, and metallization is performed.
After the board 100 to be laminated according to the present embodiment is metalized, the blind via is formed as a metalized blind via 205, the target via is formed as a metalized target via 206, the conductive trace 109 is formed on the side of the dielectric layer 102 away from the substrate 101, and the unexposed dry film 107 still covers the copper deposition layer 108.
Because the copper deposition layer is attached to the surface of one side, where the blind holes are formed, of the whole plate to be added, the copper deposition layer enables all conductive circuits to be connected with each other, the residual dry film is removed, the copper deposition layer which is not corresponding to the conductive circuits of the layer-adding conductive layer is exposed, and then the copper deposition layer is etched, so that the conductive circuits of the layer-adding conductive layer are mutually independent, and the function of the conductive circuits of the layer-adding conductive layer is achieved.
After the plate to be added with layers is added with layers, the plate to be added with layers can be used as the plate to be added with layers again, and the layers are added again through the steps until the thickness of the plate or the number of the conductive layers meets the requirements.
Through the steps, the method for adding layers to the printed circuit board of the embodiment comprises the following steps: the method comprises the steps of utilizing a laser machine to take the position of each bonding pad as a target, conducting laser drilling from one side of a dielectric layer far away from a plate to be added to form blind holes exposing corresponding partial bonding pads on the dielectric layer respectively, pasting a dry film on the whole plate of one side of the dielectric layer far away from a substrate, utilizing an exposure machine to take the position of each blind hole as a target, exposing the dry film to expose the dry film covering each blind hole and the dry film corresponding to a conductive circuit of a layer-adding conductive layer, developing and metalizing the exposed dry film till forming a metalized blind hole and the conductive circuit of the layer-adding conductive layer, forming the layer-adding conductive layer on one side of the dielectric layer far away from the substrate to add the plate to be added to enable drilling and exposure to be aligned based on objects with the same position but different sizes respectively, and improving the target alignment precision of exposure through a target which can be smaller, the phenomenon that a metallization position is wrong due to exposure alignment errors and short circuits of products are generated is reduced, exposure alignment precision is improved, blind holes are accurately exposed, subsequent metallization can be accurately performed on the blind holes, and structural reliability and stability of the metallized blind holes are improved.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a printed circuit board according to an embodiment of the invention.
The printed circuit board 300 of the present embodiment is formed by sequentially laminating and attaching at least one wiring layer and at least one wiring layer.
The printed circuit board 300 also has a blind metallized via 305 and a target metallized via 306. The walls of the blind metallized vias 305 electrically connect two adjacent circuit layers, wherein the blind metallized vias 305 are formed between each two adjacent circuit layers, and the target metallized vias 306 can connect the conductive traces 304 on two or more adjacent circuit layers.
The hole wall of at least one end of each of the blind metallized holes 305 is connected to the pad 303 on each of the circuit layers, and the diameter of the blind metallized hole 305 is smaller than that of the corresponding pad 303.
The printed circuit board 300 of the embodiment can be prepared by the layer adding method of the printed circuit board of any one of the embodiments, and can realize the preparation of a small pad ring width and a high-precision metallized blind hole.
Through above-mentioned structure, the printed circuit board of this embodiment can improve the precision of metallization blind hole position, and then improves printed circuit board's reliability and stability.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is specific and detailed, but not to be understood as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A layer adding method of a printed circuit board is characterized by comprising the following steps:
obtaining a substrate and a to-be-added plate of a dielectric layer, wherein the substrate is attached to the to-be-added plate, and a plurality of bonding pads are formed on one side of the substrate, which is close to the dielectric layer;
drilling the dielectric layer based on the position of each bonding pad to form blind holes respectively exposing corresponding parts of the bonding pads on the dielectric layer;
a dry film is pasted on the whole board on one side of the dielectric layer far away from the substrate;
exposing the dry film based on the position of each blind hole;
and developing and metalizing the exposed dry film until a metalized blind hole is formed, and forming a layer-adding conducting layer on one side of the dielectric layer, which is far away from the substrate, so as to add layers on the plate to be added.
2. The method according to claim 1, wherein the step of drilling the dielectric layer based on the position of each pad to form blind holes on the dielectric layer respectively exposing the corresponding portion of the pad comprises:
using a laser machine to take the position of each bonding pad as a target, and performing laser drilling on the plate to be added from one side of the dielectric layer far away from the plate to be added so as to form blind holes exposing corresponding parts of the bonding pads on the dielectric layer respectively;
the step of exposing the dry film based on the position of each of the blind holes includes:
and exposing the dry film by using an exposure machine to take the position of each blind hole as a target so as to expose the dry film covering each blind hole and the dry film corresponding to the conductive circuit of the layer-adding conductive layer.
3. The method according to claim 2, wherein the step of using a laser machine to target the position of each bonding pad and laser-drilling the plate to be laminated from the side of the dielectric layer away from the plate to be laminated to form blind holes exposing the corresponding bonding pads on the dielectric layer further comprises:
using a laser machine to take the position of each bonding pad as a target, and respectively forming a plurality of target holes on the plate to be laminated, wherein the target holes penetrate through part or all of the plate to be laminated so as to carry out interlayer interconnection;
the step of exposing the dry film by using the exposure machine to take the position of each blind hole as a target so as to expose the dry film covering each blind hole and the dry film corresponding to the conductive circuit of the layer-adding conductive layer further comprises the following steps:
and exposing the dry film covering the blind holes, the dry film of the target holes and the dry film corresponding to the conductive circuit of the layer-adding conductive layer by using the positions of the blind holes as targets by using an exposure machine.
4. The method of claim 3, wherein each of the targeting orifices has a diameter in the range of 55-75 microns.
5. The method according to claim 3, wherein the step of developing and metallizing the exposed dry film until forming a blind metallized hole and forming a build-up conductive layer on the side of the dielectric layer away from the substrate to build up the layer of the board to be built up comprises:
developing the exposed dry film to remove the dry film covering the blind holes, the dry film of the target holes and the dry film corresponding to the conductive circuit of the layer-adding conductive layer;
and electroplating one side of the dielectric layer, which is far away from the substrate, until the metallized blind hole, the metallized target hole and the conductive circuit of the added layer conductive layer are formed.
6. The method for building up layers of a printed circuit board according to claim 5, wherein the step of applying a dry film on the whole board on the side of the dielectric layer away from the substrate further comprises:
carrying out copper deposition treatment on one side of the dielectric layer, which is far away from the substrate, each target hole and each blind hole;
the step of developing and metallizing the exposed dry film further comprises:
removing the dry film, and exposing the copper deposition which is not corresponding to the conductive circuit of the layer-adding conductive layer;
and etching the copper deposition to enable the conductive circuits of the layer-adding conductive layer to be independent.
7. The method according to claim 6, wherein the step of performing the copper deposition on the side of the dielectric layer away from the substrate and each blind via further comprises:
and carrying out acid washing on one side of the dielectric layer, which is far away from the substrate, so as to clean.
8. The method according to claim 1, wherein the step of obtaining the plate to be laminated including the substrate and the dielectric layer which are attached to each other comprises:
obtaining a substrate;
and pressing a dielectric layer on one side of the substrate where the bonding pads are formed to obtain the plate to be added.
9. The method of claim 1,
the diameter range of the bonding pad is 2.4-2.6 millimeters;
the diameter range of the blind hole is 0.9-1.1 mm.
10. A printed circuit board prepared by the method for adding layers of the printed circuit board according to any one of claims 1 to 9.
CN202210406832.8A 2022-04-18 2022-04-18 Printed circuit board and layer adding method thereof Pending CN114900962A (en)

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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101677066A (en) * 2008-09-19 2010-03-24 钰桥半导体股份有限公司 Build-up circuit board manufacturing method
CN104093272A (en) * 2014-07-25 2014-10-08 华进半导体封装先导技术研发中心有限公司 Improved semiconductor packaging substrate structure and manufacturing method thereof
CN104302125A (en) * 2014-09-28 2015-01-21 东莞市五株电子科技有限公司 High-density connected printed circuit board aligning system and method
CN104754868A (en) * 2013-12-30 2015-07-01 深南电路有限公司 Circuit board and implementation method for interlayer interconnection structure thereof and processing method for circuit board
CN105392305A (en) * 2015-10-21 2016-03-09 胜宏科技(惠州)股份有限公司 High-order HDI board aligning method
CN105491818A (en) * 2015-11-23 2016-04-13 广州兴森快捷电路科技有限公司 Manufacturing method for buried circuit board with high alignment precision
CN112566389A (en) * 2020-11-10 2021-03-26 深圳市昶东鑫线路板有限公司 Multilayer circuit board manufacturing method with high aspect ratio blind hole and multilayer circuit board
CN112752434A (en) * 2020-11-07 2021-05-04 龙南骏亚电子科技有限公司 Novel HDI circuit board electroplating hole filling process method

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101677066A (en) * 2008-09-19 2010-03-24 钰桥半导体股份有限公司 Build-up circuit board manufacturing method
CN104754868A (en) * 2013-12-30 2015-07-01 深南电路有限公司 Circuit board and implementation method for interlayer interconnection structure thereof and processing method for circuit board
CN104093272A (en) * 2014-07-25 2014-10-08 华进半导体封装先导技术研发中心有限公司 Improved semiconductor packaging substrate structure and manufacturing method thereof
CN104302125A (en) * 2014-09-28 2015-01-21 东莞市五株电子科技有限公司 High-density connected printed circuit board aligning system and method
CN105392305A (en) * 2015-10-21 2016-03-09 胜宏科技(惠州)股份有限公司 High-order HDI board aligning method
CN105491818A (en) * 2015-11-23 2016-04-13 广州兴森快捷电路科技有限公司 Manufacturing method for buried circuit board with high alignment precision
CN112752434A (en) * 2020-11-07 2021-05-04 龙南骏亚电子科技有限公司 Novel HDI circuit board electroplating hole filling process method
CN112566389A (en) * 2020-11-10 2021-03-26 深圳市昶东鑫线路板有限公司 Multilayer circuit board manufacturing method with high aspect ratio blind hole and multilayer circuit board

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