CN114817127A - Data communication method, system on chip and computer device - Google Patents
Data communication method, system on chip and computer device Download PDFInfo
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- CN114817127A CN114817127A CN202210412708.2A CN202210412708A CN114817127A CN 114817127 A CN114817127 A CN 114817127A CN 202210412708 A CN202210412708 A CN 202210412708A CN 114817127 A CN114817127 A CN 114817127A
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- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
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Abstract
The application provides a data communication method, a system on chip and computer equipment, and relates to the technical field of chips. Wherein, this system on chip includes: the packaging substrate comprises a reference layer and a dielectric layer which are alternately stacked, and the metal routing is arranged on the surface of the packaging substrate or in the dielectric layer; the metal routing is used for generating an induction magnetic field to supply power to the main processor when the distance and/or the position between the system on chip and the external equipment meet preset conditions; the main processor is used for sending an information curing request to the external equipment under the condition of power supply state; and the main processor is also used for receiving the curing information sent by the external equipment in response to the information curing request. Compared with the prior art, the method has the advantages that the curing operation of the main processor in the system on chip can be realized without supplying power to the system on chip by an external machine, and the flexibility and the efficiency of the information curing operation can be improved.
Description
Technical Field
The present application relates to the field of chip technologies, and in particular, to a data communication method, a system on a chip, and a computer device.
Background
The chip is an integrated circuit and is composed of a large number of transistors, and different chips have different integration scales which are as large as hundreds of millions; as small as tens or hundreds of transistors. Where transistors have two states, on and off, denoted by 1, 0, and multiple transistors generate multiple 1 and 0 signals that are set to specific functions (i.e., commands and data) to represent or manipulate letters, numbers, colors, graphics, and the like. After the chip is powered on, a starting instruction is firstly generated to start the chip, and then new instructions and data are continuously received to complete the functions.
At present, when information solidification and information reading are carried out on a chip, the chip can be powered on by an external machine frequently.
It can be seen that the current curing and reading of chip information mainly depends on an external machine, and therefore, the flexibility is poor.
Disclosure of Invention
An object of the present application is to provide a data communication method, a system on chip, and a computer device, which are directed to the above deficiencies in the prior art, so as to implement a curing operation on a main processor in the system on chip without an external machine supplying power to the system on chip, and improve flexibility and efficiency of the information curing operation.
In order to achieve the above purpose, the technical solutions adopted in the embodiments of the present application are as follows:
in a first aspect, the present invention provides a system on a chip comprising: the packaging substrate comprises a reference layer and a dielectric layer which are alternately stacked, and the metal routing is arranged on the surface of the packaging substrate or in the dielectric layer; the metal routing is used for generating an induction magnetic field to supply power to the main processor when the distance and/or the position between the system on chip and the external equipment meet preset conditions;
the main processor is used for sending an information curing request to the external equipment under the condition of power supply state; and the main processor is also used for receiving the curing information sent by the external equipment in response to the information curing request.
By applying the embodiment of the application, the solidification operation of the main processor in the system on chip can be realized without supplying power to the system on chip by an external machine, and the flexibility and the efficiency of the information solidification operation can be improved.
In an alternative embodiment, the system on chip further comprises: the slave processor is arranged on the packaging substrate and connected with the master processor; the master processor is further used for forwarding the curing information to the slave processor.
By applying the embodiment of the application, the system on chip comprises the main processor and the auxiliary processor, wherein the main processor and the auxiliary processor are in communication connection, so that the information curing process of the auxiliary processor can be realized through the main processor, and the flexibility and the efficiency of the information curing operation can be improved in such a way.
In an alternative embodiment, in the case where the main processor is powered, the main processor is further configured to:
receiving a curing information acquisition request sent by external equipment; and responding to the curing information acquisition request, acquiring curing information corresponding to the curing information acquisition request, and sending the curing information to the external equipment.
By applying the embodiment of the application, the system on chip comprises the main processor and the auxiliary processor, wherein the communication connection is established between the main processor and the auxiliary processor, so that the information reading process of the auxiliary processor can be realized through the main processor, an realizable mode is provided for the information reading of the processor in the prior art, the compatibility of the processor in the prior art is realized, and the applicability is strong.
In an alternative embodiment, the metal trace comprises a metal inductive coil. By applying the embodiment of the application, the metal wiring can be set simply, and the wiring efficiency is improved.
In an optional embodiment, the metal trace is disposed on a surface of the package substrate or a predetermined path in the dielectric layer, so that the metal trace does not affect performance of the main processor.
By applying the embodiment of the application, the existing metal wiring in the system on chip can be multiplexed under the condition of not influencing the performance of the main processor, so that the manufacturing cost of the system on chip can be reduced under the condition of ensuring the performance of the main processor.
In an alternative embodiment, the curing information comprises at least one of: processor identification, key information, processor rank.
By applying the embodiment of the application, the method and the device, the solidification or reading of any type of solidification information can be realized, and the flexibility is higher.
In a second aspect, the present invention provides a data communication method, where the method is applied to a system on chip, where the system on chip includes a package substrate, a main processor disposed on the package substrate, and a metal trace connected to the main processor, the package substrate includes a reference layer and a dielectric layer that are alternately stacked, and the metal trace is disposed on a surface of the package substrate or in the dielectric layer; the metal routing is used for generating an induction magnetic field to supply power to the main processor when the distance and/or the position between the system on chip and the external equipment meet preset conditions; the method comprises the following steps:
under the condition that the main processor is in a power supply state, sending an information curing request to the external equipment through the main processor;
and receiving the curing information sent by the external equipment responding to the information curing request through the main processor.
In an alternative embodiment, the system on chip further comprises: the slave processor is arranged on the packaging substrate and connected with the master processor; the method further comprises the following steps:
forwarding, by the master processor, the curing information to the slave processor.
In an optional embodiment, in the case where the main processor is powered, the method further comprises:
receiving a curing information acquisition request sent by external equipment through the main processor;
and responding to the curing information acquisition request through the main processor, acquiring curing information corresponding to the curing information acquisition request, and sending the curing information to the external equipment.
In an alternative embodiment, the metal trace comprises a metal inductive coil.
In an optional embodiment, the metal trace is disposed on a surface of the package substrate or a predetermined path in the dielectric layer, so that the metal trace does not affect performance of the main processor.
In an alternative embodiment, the curing information comprises at least one of: processor identification, key information, processor rank.
In a third aspect, the invention provides a computer device comprising a system on chip as described in any of the previous embodiments.
In a fourth aspect, the present invention provides a data communication device, where the data communication device is applied to a system on chip, where the system on chip includes a package substrate, a main processor disposed on the package substrate, and a metal trace connected to the main processor, the package substrate includes a reference layer and a dielectric layer that are alternately stacked, and the metal trace is disposed on a surface of the package substrate or in the dielectric layer; the metal routing is used for generating an induction magnetic field to supply power to the main processor when the distance and/or the position between the system on chip and the external equipment meet preset conditions; the main processor is used for sending an information curing request to the external equipment under the condition of being in a power supply state;
and the main processor is also used for receiving the curing information sent by the external equipment in response to the information curing request.
In an alternative embodiment, the system on chip further comprises: the slave processor is arranged on the packaging substrate and connected with the master processor;
the master processor is further used for forwarding the curing information to the slave processor.
In an alternative embodiment, in the case where the main processor is powered, the main processor is further configured to: receiving a curing information acquisition request sent by external equipment;
and responding to the curing information acquisition request, acquiring curing information corresponding to the curing information acquisition request, and sending the curing information to the external equipment.
In an alternative embodiment, the metal trace comprises a metal inductive coil.
In an optional embodiment, the metal trace is disposed on a surface of the package substrate or a predetermined path in the dielectric layer, so that the metal trace does not affect performance of the main processor.
In an alternative embodiment, the curing information comprises at least one of: processor identification, key information, processor rank.
The beneficial effect of this application is:
the data communication method, the system on chip and the computer device provided by the embodiment of the application comprise the following steps: the packaging substrate comprises a reference layer and a dielectric layer which are alternately stacked, and the metal routing is arranged on the surface of the packaging substrate or in the dielectric layer; the metal routing is used for generating an induction magnetic field to supply power to the main processor when the distance and/or the position between the system on chip and the external equipment meet preset conditions; the main processor is used for sending an information curing request to the external equipment under the condition of power supply state; the main processor is further used for receiving the curing information sent by the external equipment responding to the information curing request, and by applying the embodiment of the application, the curing operation of the main processor in the system on chip can be realized without the need of supplying power to the system on chip by an external machine, so that the flexibility and the efficiency of the information curing operation can be improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic structural diagram of a system on chip according to an embodiment of the present disclosure;
FIG. 2 is a block diagram of another system on a chip according to an embodiment of the present disclosure;
FIG. 3 is a block diagram of another system on a chip according to an embodiment of the present application;
fig. 4 is a schematic flowchart of a data communication method according to an embodiment of the present application;
fig. 5 is a schematic flow chart of another data communication method according to an embodiment of the present application;
fig. 6 is a schematic flowchart of another data communication method according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the prior art, when information curing and information reading are performed on a chip, the chip is often powered by an external machine, that is, the existing information curing and information reading method has high dependency on a peripheral hardware circuit, and thus, the flexibility of the existing information curing operation is poor.
In view of the above, embodiments of the present application provide a system on chip, which can improve flexibility of information curing operations.
Fig. 1 is a schematic structural diagram of a system on chip according to an embodiment of the present application, and fig. 2 is a schematic structural diagram of another system on chip according to an embodiment of the present application. As shown in fig. 1 and 2, the system on chip 100 may include: the package substrate 110 includes a reference layer 115 and a dielectric layer 116 stacked alternately, wherein the reference layer 115 has a conductive function, and the dielectric layer 116 does not have a conductive function. Of course, the number of reference layers 115 and dielectric layers 116 is not limited herein, and may vary according to the actual application.
In some embodiments, referring to fig. 2, the system-on-chip 100 may further include: a package face 112, the package face 112 may be disposed on one side of the package substrate 110, and a main processor 120 is disposed on the package substrate 110, and the main processor 120 may be connected to the metal traces 130. In some embodiments, the system-on-chip 100 may further include: solder balls 117, wherein the solder balls 117 may be disposed on the other side of the package substrate 110 and communicate with other external devices as an I/O interface of the main processor 120. Of course, it should be noted that the system on chip 100 may further include: the passive component 118, such as a resistor, a capacitor, an inductor, a transformer, etc., may be disposed on the surface of the package substrate 110 and packaged by the package surface 112, which is not limited herein and may be different according to the actual application scenario.
The metal trace 130 may be disposed on the surface of the package substrate 110 or in the dielectric layer 116, and the metal trace 130 is configured to generate an induced magnetic field to supply power to the main processor 120 when a distance and/or a position between the system on chip 100 and an external device satisfy a predetermined condition. According to the electromagnetic induction principle, when the distance and/or the position between the system on chip and the external device satisfy the preset conditions, the metal trace 130 in the system on chip 100 may induce with the induction coil in the external device to generate an induced magnetic field, and the generated induced magnetic field may supply power to the main processor 120 in the system on chip 100, that is, the main processor 120 may obtain electric energy through the magnetic field and be in a power supply state.
In some embodiments, the distance and/or the location between the system-on-chip and the external device satisfy a predetermined condition, which may be understood as that the distance between the system-on-chip and the external device is greater than a predetermined distance threshold, and/or that the location between the system-on-chip and the external device satisfies a predetermined location requirement. The preset distance threshold may be preset, for example, 0, that is, when the system on chip and the external device are in contact with each other, the metal trace 130 in the system on chip 100 may induce with the induction coil in the external device to generate an induction magnetic field; the preset position requirement may be that the system on chip needs to be placed right above the external device, and is described with reference to the case that the preset distance threshold is 0, that is, the system on chip needs to be in contact with the external device right above the external device, so that the metal trace 130 in the system on chip 100 may induce a magnetic field with an induction coil in the external device. Of course, it should be noted that the setting of the preset distance threshold and the preset position requirement is not limited to the above embodiment, and may be different according to the actual application scenario.
The main processor is used for sending an information curing request to the external equipment under the condition of being in a power supply state; and the main processor is also used for receiving the curing information sent by the external equipment in response to the information curing request. Optionally, the main processor may include a preset detection program, and when it is determined that the main processor is in the power supply state through the preset detection program, the main processor may send an information curing request to the external device to request to acquire curing information; after receiving the information curing request, the external device can return corresponding curing information to the main processor; furthermore, after the main processor receives the curing information, the curing information can be cured into the non-volatile storage unit in the main processor, so that the information curing process is realized, and the main processor has the characteristic of simple curing mode. In some embodiments, the information solidification request may include an initial identifier corresponding to the host processor, and of course, the present application is not limited to the specific content thereof.
The step of receiving the solidification information by the main processor and solidifying the solidification information into the nonvolatile memory unit therein may include: the main processor receives the curing information and demodulates the curing information to obtain demodulated curing information; and writing the demodulated curing information into a non-volatile storage unit inside the device.
In some embodiments, when the metal trace 130 is disposed on the surface of the package substrate 110, the metal trace 130 may be disposed on the surface of the package substrate 110 in any shape; when the metal trace 130 is disposed in the dielectric layers 116, the metal trace 130 may be laid in any dielectric layer 12 or penetrate among a plurality of dielectric layers 116, which is not limited herein, and may be flexibly disposed according to actual application scenarios.
Of course, it should be noted that the parameters such as the diameter and the length of the metal trace are not limited in this application, and the parameters can be flexibly set according to the actual application scenario. In some embodiments, the length of the metal trace may be greater than a predetermined threshold, so as to ensure that the magnetic field intensity induced by the external device meets a predetermined requirement. In addition, the host processor may include one or more chips, which is not limited herein.
To sum up, an embodiment of the present application provides a system on a chip, including: the packaging substrate comprises a reference layer and a dielectric layer which are alternately stacked, and the metal routing is arranged on the surface of the packaging substrate or in the dielectric layer; the metal routing is used for generating an induction magnetic field to supply power to the main processor when the distance and/or the position between the system on chip and the external equipment meet preset conditions; the main processor is used for sending an information curing request to the external equipment under the condition of power supply state; the main processor is further used for receiving the curing information sent by the external equipment responding to the information curing request, and by applying the embodiment of the application, the curing operation of the main processor in the system on chip can be realized without the need of supplying power to the system on chip by an external machine, so that the flexibility and the efficiency of the information curing operation can be improved.
Fig. 3 is a schematic structural diagram of another system on a chip according to an embodiment of the present application. Optionally, as shown in fig. 3, the system on chip 100 further includes: the slave processors 150 are disposed on the package substrate 110, and the slave processors 150 are connected to the master processor 120, for example, through wires 151 for communication. Wherein, the slave processor can be powered by a preset power supply. Based on the above description, it can be understood that, for the slave processor, after receiving the curing information, the slave processor can cure the curing information into its internal nonvolatile memory unit, thereby implementing the information curing process for the slave processor. By applying the embodiment of the application, the information curing process of the slave processor can be realized through the master processor, an achievable mode is provided for the information curing of the processor in the prior art, the compatibility of the processor in the prior art is realized, and the applicability is strong.
It should be noted that, in consideration of performance of the main processor and reduction of difficulty in designing the chip, the main processor is not powered by the above-mentioned preset power supply, but powered by a magnetic field induction manner, and in this manner, the difficulty in designing the chip can be reduced while the performance of the main processor is ensured.
Optionally, in some scenarios, if the external device needs to read the curing information of the main processor, the external device may perform further interaction, for example, to change part of the curing information. This can be achieved as follows. Wherein, under the condition that the main processor is powered on, the main processor is further configured to: receiving a curing information acquisition request sent by external equipment; and responding to the curing information acquisition request, acquiring curing information corresponding to the curing information acquisition request, and sending the curing information to the external equipment.
In this scenario, the external device may send a curing information acquisition request to the main processor to request to acquire corresponding curing information, and after receiving the curing information acquisition request, the main processor may acquire corresponding curing information and send the corresponding curing information to the external device, for example, the main processor may query from a corresponding non-volatile storage unit to acquire the corresponding curing information and send the corresponding curing information to the external device. Wherein the step of the main processor transmitting the curing information to the external device may include: the main processor modulates the curing information to obtain a modulation signal, and sends the modulation signal to a metal wire connected with the main processor, so that the curing information can be sent to external equipment through the metal wire.
Of course, it should be noted that the embodiments of the present application do not limit the category of the curing information requested to be obtained, and may include one or more of, for example: the processor identification, or alternatively, may include a processor identification, a processor rank. The processor level of the main processing may indicate the processing performance of the main processor, and the higher the processor level of the main processing is, the better the processing performance of the main processing is.
Based on the above description, in some embodiments, if the system-on-chip 100 further includes: the slave processor is arranged on the packaging substrate and connected with the master processor; the main processor is also used for forwarding a curing information acquisition request to the auxiliary processor; and receiving the slave processor curing information sent by the slave processor according to the curing information acquisition request, and sending the slave processor curing information to the external equipment. By applying the embodiment of the application, the process of reading the information of the slave processor can be realized by the master processor, an achievable mode is provided for the information reading of the processor in the prior art, the compatibility of the processor in the prior art is realized, and the applicability is strong.
Optionally, the metal trace includes a metal induction coil, that is, an induction coil type trace. In some embodiments, the metal induction coil may be specifically a copper induction coil, an aluminum induction coil, and the like, which are not limited herein and can be flexibly selected according to an actual application scenario. In some embodiments, when the metal wire is disposed in the form of a metal induction coil, the number of turns of the coil should meet the requirement of a preset number of turns, so that it can be ensured that the magnetic field intensity generated by induction with an external device can meet the preset requirement. It can be understood that the metal induction coil is particularly simple in arrangement, and therefore, by applying the embodiment of the application, the arrangement of the metal wiring is simple, and the wiring efficiency is improved.
Optionally, the metal traces 130 may be disposed on a surface of the package substrate 110 or on a predetermined path within the dielectric layer 116, so that the metal traces 130 do not affect the performance of the host processor 120. That is, the metal traces may be disposed on a predetermined path on the surface of the package substrate, or may be disposed on a predetermined path in the dielectric layer. The preset path may be a path of any shape, for example, a path of a regular shape such as a circle, a rectangle, or the like, or may be a path of any irregular shape, which is not limited herein.
It should be noted that the preset path may be disposed at any position (for example, an edge position or a central position) in the surface or the dielectric layer of the package substrate, where the metal trace should be disposed without affecting the performance of the main processor, where the performance of the main processor may be measured by parameters such as a main frequency (clock frequency), an external frequency (reference frequency), a front-side bus (FSB) frequency, and of course, the specific measurement manner is not limited thereto. In some embodiments, existing metal traces in the system-on-chip can be multiplexed without affecting the performance of the main processor, so that the manufacturing cost of the system-on-chip can be reduced. The multiplexing can also be time-sharing multiplexing, that is, an induction magnetic field can be generated with external equipment through a first metal wire existing in the system on chip in a certain first time period to supply power to the main processor; and generating an induction magnetic field with an external device through a second metal wire existing in the system on chip in a certain second time period to supply power to the main processor.
Optionally, the curing information includes at least one of: processor identification, key information, processor rank.
In some embodiments, the processor identification may include: device serial number, MAC address, processor model, etc.; the key information may include a preset public key parameter, and the processor level may indicate the processing performance of the main processor, for example, the processing performance may be identified by a level A, B, C, where the processing performance corresponding to the level a main processor is better than the processing performance corresponding to the level B main processor, and the processing performance corresponding to the level B main processor is better than the processing performance corresponding to the level C main processor.
Of course, it should be noted that the curing information may also include other configuration information, for example, the curing information may include: the production date, the manufacturer, etc. of the processor are not limited herein, and can be flexibly set according to the actual application scenario. In some embodiments, the curing information may further include: program files, text files, etc., without limitation. By applying the embodiment of the application, the method and the device, the solidification or reading of any type of solidification information can be realized, and the flexibility is higher.
Fig. 4 is a flowchart illustrating a data communication method according to an embodiment of the present application. The method can be applied to a system on chip, wherein the system on chip comprises a packaging substrate, a main processor arranged on the packaging substrate and a metal wire connected with the main processor, the packaging substrate comprises a reference layer and a dielectric layer which are alternately stacked, and the metal wire is arranged on the surface of the packaging substrate or in the dielectric layer; and the metal routing is used for generating an induction magnetic field to supply power to the main processor when the distance and/or the position between the system on chip and the external equipment meet preset conditions. For a specific description of the soc, reference may be made to the corresponding contents in the foregoing embodiments, which are not repeated herein. As shown in fig. 4, the method includes:
s101, when the main processor is in a power supply state, an information solidification request is sent to the external equipment through the main processor.
And S102, receiving the curing information sent by the external equipment responding to the information curing request through the main processor.
When the main processor is in a power supply state, an information curing request can be sent to external equipment to request to acquire curing information; after receiving the information curing request, the external device can return corresponding curing information to the main processor; after the main processor receives the curing information, the curing information can be cured into the non-volatile storage unit in the main processor, so that the information curing process is realized.
Fig. 5 is a flowchart illustrating another data communication method according to an embodiment of the present application. Optionally, the system on chip further includes: and the slave processor is arranged on the packaging substrate and connected with the master processor. As shown in fig. 5, the method further includes:
s201, the solidification information is forwarded to the slave processor through the master processor.
By applying the embodiment of the application, the information curing process of the slave processor can be realized through the master processor, an achievable mode is provided for the information curing of the processor in the prior art, the compatibility of the processor in the prior art is realized, and the applicability is strong.
Fig. 6 is a flowchart illustrating another data communication method according to an embodiment of the present application. Optionally, in the case that the main processor is powered, as shown in fig. 6, the method further includes:
s301, a curing information acquisition request sent by the external device is received through the main processor.
And S303, responding to the curing information acquisition request through the main processor, acquiring curing information corresponding to the curing information acquisition request, and sending the curing information to the external equipment.
By applying the embodiment of the application, the process of reading the information of the slave processor can be realized by the master processor, an achievable mode is provided for the information reading of the processor in the prior art, the compatibility of the processor in the prior art is realized, and the applicability is strong.
In some embodiments, the metal trace comprises a metal induction coil.
In some embodiments, the metal traces are disposed on a predetermined path on the surface of the package substrate or within the dielectric layer, so that the metal traces do not affect the performance of the host processor.
In some embodiments, the curing information includes at least one of: processor identification, key information, processor rank.
The above method is applied to the system on chip provided in the foregoing embodiment, and the implementation principle and the technical effect are similar, which are not described herein again.
Optionally, an embodiment of the present application further provides a data communication device, where the data communication device is applied to a system on chip, where the system on chip includes a package substrate, a main processor disposed on the package substrate, and a metal trace connected to the main processor, the package substrate includes a reference layer and a dielectric layer that are alternately stacked, and the metal trace is disposed on a surface of the package substrate or in the dielectric layer; the metal routing is used for generating an induction magnetic field to supply power to the main processor when the distance and/or the position between the system on chip and the external equipment meet preset conditions; the main processor is used for sending an information curing request to the external equipment under the condition of being in a power supply state;
and the main processor is also used for receiving the curing information sent by the external equipment in response to the information curing request.
In an alternative embodiment, the system on chip further comprises: the slave processor is arranged on the packaging substrate and connected with the master processor;
the master processor is further used for forwarding the curing information to the slave processor.
In an alternative embodiment, in the case where the main processor is powered, the main processor is further configured to: receiving a curing information acquisition request sent by external equipment;
and responding to the curing information acquisition request, acquiring curing information corresponding to the curing information acquisition request, and sending the curing information to the external equipment.
In an alternative embodiment, the metal trace comprises a metal induction coil.
In an optional embodiment, the metal trace is disposed on a surface of the package substrate or on a predetermined path within the dielectric layer, so that the metal trace does not affect performance of the main processor.
In an alternative embodiment, the curing information comprises at least one of: processor identification, key information, processor rank.
The above-mentioned apparatus is used for executing the method provided by the foregoing embodiment, and the implementation principle and technical effect are similar, which are not described herein again.
These above modules may be one or more integrated circuits configured to implement the above methods, such as: one or more Application Specific Integrated Circuits (ASICs), or one or more microprocessors, or one or more Field Programmable Gate Arrays (FPGAs), etc. For another example, when one of the above modules is implemented in the form of a Processing element scheduler code, the Processing element may be a general-purpose processor, such as a Central Processing Unit (CPU) or other processor capable of calling program code. For another example, these modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).
Fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present application, where the electronic device may be integrated in a computer device. As shown in fig. 7, the electronic device may include: a processor 210, a storage medium 220, and a bus 230, wherein the storage medium 220 stores machine-readable instructions executable by the processor 210, and when the electronic device is operated, the processor 210 communicates with the storage medium 220 via the bus 230, and the processor 210 executes the machine-readable instructions to perform the steps of the above-mentioned method embodiments. The specific implementation and technical effects are similar, and are not described herein again.
Optionally, an embodiment of the present application further provides a computer device, where the computer device may include the system on chip in the foregoing embodiment, and the system on chip may be configured to perform the data communication method in any of the foregoing embodiments. The specific implementation and technical effects are similar, and are not described herein again.
Embodiments of the present application also provide a computer storage medium having stored therein instructions, which when executed on a computer or processor, cause the computer or processor to perform one or more steps of any of the above-described method embodiments. The specific implementation and technical effects are similar, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of a unit is merely a logical division, and an actual implementation may have another division, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
The integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) or a processor (in english: processor) to execute some steps of the methods according to the embodiments of the present application. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined or explained in subsequent figures. The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (13)
1. A system on a chip, comprising: the packaging substrate comprises a reference layer and a dielectric layer which are alternately stacked, and the metal routing is arranged on the surface of the packaging substrate or in the dielectric layer;
the metal routing is used for generating an induction magnetic field to supply power to the main processor when the distance and/or the position between the system on chip and the external equipment meet preset conditions;
the main processor is used for sending an information curing request to the external equipment under the condition of power supply state;
and the main processor is also used for receiving the curing information sent by the external equipment in response to the information curing request.
2. The system-on-chip as recited in claim 1, further comprising: the slave processor is arranged on the packaging substrate and connected with the master processor;
the master processor is further used for forwarding the curing information to the slave processor.
3. The system on a chip of claim 1, wherein the host processor is powered, the host processor further configured to:
receiving a curing information acquisition request sent by external equipment;
and responding to the curing information acquisition request, acquiring curing information corresponding to the curing information acquisition request, and sending the curing information to the external equipment.
4. The system-on-chip of any one of claims 1-3, wherein the metal trace comprises a metal induction coil.
5. The system on a chip of any one of claims 1-3, wherein the metal traces are disposed on a predetermined path within the dielectric layer or a surface of the package substrate such that the metal traces do not affect performance of the main processor.
6. The system-on-chip of any one of claims 1-3, wherein the curing information comprises at least one of: processor identification, key information, processor rank.
7. A data communication method is characterized in that the method is applied to a system on chip, the system on chip comprises a packaging substrate, a main processor arranged on the packaging substrate and a metal wire connected with the main processor, the packaging substrate comprises a reference layer and a dielectric layer which are alternately stacked, and the metal wire is arranged on the surface of the packaging substrate or in the dielectric layer; the metal routing is used for generating an induction magnetic field to supply power to the main processor when the distance and/or the position between the system on chip and the external equipment meet preset conditions; the method comprises the following steps:
under the condition that the main processor is in a power supply state, sending an information curing request to the external equipment through the main processor;
and receiving the curing information sent by the external equipment responding to the information curing request through the main processor.
8. The method of claim 7, wherein the system-on-a-chip further comprises: the slave processor is arranged on the packaging substrate and connected with the master processor; the method further comprises the following steps:
forwarding, by the master processor, the curing information to the slave processor.
9. The method of claim 7, wherein the main processor is powered, the method further comprising:
receiving a curing information acquisition request sent by external equipment through the main processor;
and responding to the curing information acquisition request through the main processor, acquiring curing information corresponding to the curing information acquisition request, and sending the curing information to the external equipment.
10. The method of any of claims 7-9, wherein the metal trace comprises a metal inductive coil.
11. The method according to any of claims 7-9, wherein the metal traces are disposed on a predetermined path within the dielectric layer or the surface of the package substrate such that the metal traces do not affect the performance of the host processor.
12. The method according to any one of claims 7-9, wherein the curing information comprises at least one of: processor identification, key information, processor rank.
13. A computer device, characterized in that the computer device comprises a system on chip according to any of claims 1-6.
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| CN202210412708.2A CN114817127A (en) | 2022-04-19 | 2022-04-19 | Data communication method, system on chip and computer device |
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