CN114678283A - Capacitor electrolyte membrane and method for producing same - Google Patents

Capacitor electrolyte membrane and method for producing same Download PDF

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Publication number
CN114678283A
CN114678283A CN202011568032.3A CN202011568032A CN114678283A CN 114678283 A CN114678283 A CN 114678283A CN 202011568032 A CN202011568032 A CN 202011568032A CN 114678283 A CN114678283 A CN 114678283A
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China
Prior art keywords
electrolyte membrane
capacitor
producing
treatment
precursor
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CN202011568032.3A
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Chinese (zh)
Inventor
崔基雄
项金娟
李亭亭
刘青
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Institute of Microelectronics of CAS
Zhenxin Beijing Semiconductor Co Ltd
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Institute of Microelectronics of CAS
Zhenxin Beijing Semiconductor Co Ltd
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Application filed by Institute of Microelectronics of CAS, Zhenxin Beijing Semiconductor Co Ltd filed Critical Institute of Microelectronics of CAS
Priority to CN202011568032.3A priority Critical patent/CN114678283A/en
Publication of CN114678283A publication Critical patent/CN114678283A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

The application relates to the technical field of semiconductors, in particular to a preparation method of a capacitor electrolyte membrane, which comprises the following steps: depositing an electrolyte film on the lower electrode of the capacitor; reducing the pressure in the reaction chamber; subjecting the electrolyte membrane to at least one reprocessing, the reprocessing including a reactive precursor treatment and/or an oxidation treatment, the reactive precursor treatment including: the precursor of the electrolyte membrane is supplied into the reaction chamber, and then purged. The method and the device have the advantages that the electrolyte membrane is sequentially subjected to a plurality of treatment processes and remote plasma treatment, the problems of uneven thickness of the electrolyte membrane, Zr vacancy and O vacancy on the surface of the electrolyte membrane are solved, the breakdown voltage of the electrolyte membrane is improved, and the possibility of electric leakage of a capacitor is reduced.

Description

Capacitor electrolyte membrane and method for preparing same
Technical Field
The application relates to the technical field of semiconductors, in particular to a capacitor electrolyte membrane and a preparation method thereof.
Background
Capacitors (capacitors) used on DRAMs have many structures, among which cylindrical (Cylinder Type) or Pillar (pilar Type) structures with an Aspect Ratio (Aspect Ratio) of about 40:1 or more, in which case electrolyte (Dielectric) ZrO is deposited on the Capacitor (Capacitor) 2It is difficult to have 100% Step Coverage (Step Coverage). Generally, electrolyte (Dielectric) ZrO is on Capacitor (Capacitor)2The Step Coverage (Step Coverage) of (1) is less than 93%. This results in electrolyte (Dielectric) ZrO as shown in FIG. 1210 'is thinned in the bottom region (Capacitor Bottomzone) of the lower electrode 11', and furthermore, when depositing the electrolyte (Dielectric) ZrO 210 ', the electrolyte (Dielectric) ZrO 210' is not completely reacted2Various defects such as generation of voids (Void) and Metal impurities (Metal impurities) may be left on 10' to result in ZrO2The Breakdown Voltage (Breakdown Voltage) of the film becomes low, and a problem of Leakage (Leakage) occurs.
Disclosure of Invention
The present application addresses, at least to some extent, the above-mentioned technical problems in the related art. Therefore, the application provides a capacitor electrolyte membrane and a preparation method thereof to solve the problem of capacitor leakage.
In order to achieve the above object, a first aspect of the present application provides a method for producing a capacitor electrolyte membrane, comprising the steps of:
depositing an electrolyte film on the lower electrode of the capacitor;
reducing the pressure in the reaction chamber;
subjecting the electrolyte membrane to at least one reprocessing, the reprocessing including a reactive precursor treatment and/or an oxidation treatment, the reactive precursor treatment including: the precursor of the electrolyte membrane is supplied into the reaction chamber, and then purged.
The second aspect of the present application provides a capacitor electrolyte membrane treated by the above-described method for producing a capacitor electrolyte membrane.
Drawings
Various additional advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
fig. 1 is a schematic view showing a structure of an upper electrode and an electrolyte membrane in the prior art;
FIG. 2 is a schematic view showing the structure of an upper electrode and an electrolyte membrane in one embodiment of the present application;
FIG. 3 shows a schematic diagram of the structure of supplying the precursors of the electrolyte membrane into the reaction chamber in one embodiment of the present application;
FIG. 4 shows a schematic diagram of the configuration of the oxygen-containing plasma supplied to the reaction chamber in one embodiment of the present application.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
Various structural schematics according to embodiments of the present disclosure are shown in the figures. The figures are not drawn to scale, wherein certain details are exaggerated and some details may be omitted for clarity of presentation. The shapes of various regions, layers, and relative sizes and positional relationships therebetween shown in the drawings are merely exemplary, and deviations may occur in practice due to manufacturing tolerances or technical limitations, and a person skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, as actually required.
In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present. In addition, if a layer/element is "on" another layer/element in one orientation, then that layer/element may be "under" the other layer/element when the orientation is reversed.
Referring to fig. 2, a first aspect of the present application provides a cylindrical capacitor 100, where the capacitor 100 includes:
a lower electrode 10, the lower electrode 10 being cylindrical;
an electrolyte membrane 11 formed on the lower electrode 10;
An upper electrode (not shown) is formed on the surface of the electrolyte membrane 11.
In this embodiment, the material of the lower electrode 10 may be selected from one or two of a metal Nitride and a metal Silicide, such as Titanium Nitride (Titanium Nitride), Titanium Silicide (Titanium Silicide), nickel Silicide (Titanium Silicide), and Titanium silicon Nitride (TiSixNy).
The material of the upper electrode may be a stack of any one of TiN, TaN, W/WN, Pt, Ru, and AlN or two or more selected from the group consisting of the above materials, or the upper electrode may be formed of: the film is made of the above-mentioned material (i.e., TiN, TaN, WN, Pt, Ru, or AlN) in combination with Si, C, Al, Ge, or the like, or the upper electrode is preferably a TiN film.
It is worth mentioning that the material of the electrolyte film 11 is a high-k dielectric layer to increase the capacitance of the unit area capacitor, and the electrolyte film 11 is made of a material with high dielectric constant such as Al2O3、ZrO2、HfO2、Ta2O5、TiO2STO, BST, PZT, or the like, or formed of a multilayer film.
The following describes a method for producing the capacitor in the examples of the present application.
The application provides a preparation method of a cylindrical (Cylinder Type) capacitor, which comprises the following steps:
Referring to fig. 3, a semiconductor substrate 12 is provided, and the semiconductor substrate 12 is placed on a susceptor 14 of a reaction chamber 13. in the present embodiment, the semiconductor substrate 12 may be, for example, a bulk silicon semiconductor substrate, a silicon-on-insulator (SOI) semiconductor substrate, a germanium-on-insulator (GOI) semiconductor substrate, a silicon germanium semiconductor substrate, a III-V compound semiconductor substrate, or an epitaxial thin film semiconductor substrate obtained by performing Selective Epitaxial Growth (SEG).
When the semiconductor substrate 12 is a silicon-based semiconductor substrate, the semiconductor substrate may include, for example, dangling bonded silicon atoms that are not bonded to oxygen ions. The operating characteristics of the transistor may be stabilized by a hydrogen annealing process by which hydrogen atoms are bonded to dangling bonded silicon atoms of the semiconductor substrate. In this case, the hydrogen atom may be easily separated from the silicon atom, but boron may increase the binding energy between the silicon atom and the hydrogen atom. Therefore, the variable holding time or charge holding time of the capacitor can be improved.
Next, a lower electrode having a cylindrical shape is formed on the semiconductor substrate 12, and an electrolyte film is formed on the lower electrode, and specifically, the electrolyte film may be deposited on the lower electrode by an ALD process at a process temperature of about 300 to 400 ℃.
Then, reducing the pressure in the reaction chamber 13 to 50-80 mtorr; preferably, the material of the electrolyte membrane in the present embodiment is selected from ZrOxAnd the value of X is 1-2.
Next, the electrolyte membrane is subjected to a first reprocessing, specifically, with continued reference to fig. 3, the first reprocessing comprising: at a temperature of: the electrolyte membrane is treated for 5-8min by supplying a Precursor of the electrolyte membrane (Precursor) into the reaction chamber 13 at 350 ℃ and then purged with Ar (Purge), preferably, the Precursor of the electrolyte membrane can be selected from Zr-containing amino organometallic precursors and evaporated to form Zr chemical vapor, that is, the Precursor quantified by a flow regulator such as MFC (mass flow controller) is injected into an evaporator or an evaporation tube having a small hole (orifice) or a nozzle (nozzle) and evaporated to form Zr chemical vapor. The temperature of the evaporator or the supply pipe that becomes the flow path (flow path) of the Zr vapor should be maintained at 150-. The amount of the precursor supplied from the evaporator or the evaporation tube is preferably about 50 to 300 mg/min.
Specifically, the precursor of the electrolyte membrane may be selected from tris (dimethylamino) cyclopentadienyl zirconium (Cp-Zr). It is worth mentioning that the tris (dimethylamino) cyclopentadienyl zirconium is liquid at normal temperature, is a compound very sensitive to air and water vapor, can be dissolved in organic solvents such as hydrocarbons and carbon tetrachloride, has good stability and high vapor pressure, and shows quite high reactivity, and the physicochemical characteristics based on the tris (dimethylamino) cyclopentadienyl zirconium can be used for preparing zirconium oxide films by CVD or ALD technology.
And then, after the Ar purging step is finished, adjusting the pressure in the reaction chamber 13 to 2-5Torr, then carrying out secondary retreatment on the electrolyte membrane, after the purging step of the secondary retreatment is finished, adjusting the pressure in the reaction chamber to 2-5Torr, carrying out the third retreatment on the electrolyte membrane, and sequentially and circularly repeating the steps for a plurality of times.
In the present embodiment, the reprocessing process may be repeated 10 times for the electrolyte membrane, but the present embodiment is not limited thereto, and a person skilled in the art may flexibly select the number of times of reprocessing as needed.
Next, referring to fig. 4, the oxygen-containing plasma oxidation process is performed on the electrolyte membrane using a remote plasma processing apparatus, and a Bias Voltage (Bias Voltage) may be applied to the back surface (wafer Bias) of the semiconductor substrate 12 using the Bias unit 15. Specifically, the oxygen-containing plasma gas generated by the remote plasma device is used, and then the oxygen-containing plasma gas is used for carrying out remote plasma treatment on the electrolyte membrane, specifically, the gas in the oxidation treatment comprises: oxygen, oxygen radicals or oxygen ions.
It should be noted that, in the present embodiment, the reaction precursor treatment and the oxidation treatment are sequentially performed on the electrolyte membrane, but of course, a person skilled in the art may perform only the reprocessing on the electrolyte membrane, or perform only the oxidation treatment on the electrolyte membrane, and perform only one of the above treatments on the electrolyte membrane, which can solve the problems of the non-uniform thickness of the electrolyte membrane, the Zr vacancy, the O vacancy and the like on the surface of the electrolyte membrane, so the present embodiment is not limited herein, and a person skilled in the art can flexibly select the treatment according to needs.
And then, placing the structure obtained in the step into a chemical vapor deposition furnace tube, and simultaneously introducing germanium source gas, boron source gas and silicon source gas into the chemical vapor deposition furnace tube to react so as to form an upper electrode.
Specifically, the process conditions for forming the upper electrode are: the reaction temperature is 400-430 ℃, and the concentration of the boron source gas is more than 1E21cm-3The proportion of the germanium source gas flow in the total flow of the reaction gas precursor is more than 40%.
Further, the germanium source gas may include GeH4Or Ge2H6The boron source gas may include BCl3Or B2H6The silicon source gas may comprise SiH4Or Si2H6。
It is worth noting that the present embodiment sequentially performs a plurality of treatment processes and remote plasma treatment on the electrolyte membrane, so as to solve the problem of uneven thickness of the electrolyte membrane, improve the structural defects of Zr vacancy and O vacancy on the surface of the electrolyte membrane, increase the Breakdown Voltage (BV) of the electrolyte membrane, and further reduce the possibility of occurrence of capacitor leakage.
The capacitor in the embodiment can be used in a semiconductor device, so that the capacitor has advantages in the development of high-tech DRAM, Flash, Memory and LOGIC devices.
When the capacitor is used in a DRAM, transistors (not shown) coupled in series with the capacitor may be formed by a known manufacturing process to complete the DRAM.
Further, the DRAM, Flash, Memory, LOGIC having the capacitor in the present embodiment can be used in various chips.
Still further, the chip with the above capacitor may be used in various electronic devices, in particular, smart phones, computers, tablets, wearable smart devices, artificial smart devices, mobile power sources, and the like.
In the above description, the technical details of patterning, etching, and the like of each layer are not described in detail. It will be appreciated by those skilled in the art that layers, regions, etc. of the desired shape may be formed by various technical means. In addition, in order to form the same structure, those skilled in the art can also design a method which is not exactly the same as the method described above. In addition, although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in advantageous combination.
The embodiments of the present disclosure have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the present disclosure, and such alternatives and modifications are intended to be within the scope of the present disclosure.

Claims (12)

1. A method for producing a capacitor electrolyte membrane, comprising the steps of:
depositing an electrolyte film on the capacitor lower electrode;
reducing the pressure in the reaction chamber;
subjecting the electrolyte membrane to at least one reprocessing, the reprocessing including a reactive precursor treatment and/or an oxidation treatment, the reactive precursor treatment including: the precursor of the electrolyte membrane is supplied into the reaction chamber, and then purged.
2. The method for producing a capacitor electrolyte membrane according to claim 1, characterized in that the material of the electrolyte membrane is selected from ZrOxAnd the value of X is 1-2.
3. The method for producing a capacitor electrolyte membrane according to claim 1, wherein the precursor is a Zr-containing amino-based organometallic precursor.
4. The method for producing a capacitor electrolyte membrane according to claim 3, wherein the precursor is selected from tris (dimethylamino) cyclopentadienyl zirconium.
5. The method for producing a capacitor electrolyte membrane according to claim 4, wherein the temperature of the reactive precursor treatment is: 250 ℃ to 350 ℃.
6. The method for producing a capacitor electrolyte membrane according to claim 1, wherein the electrolyte membrane is subjected to a plurality of retreatments, and the reactive precursor treatment comprises: the precursor of the electrolyte membrane is supplied into the reaction chamber at a first pressure, after which purging is performed, after which a second pressure is maintained, and the next reaction precursor treatment is performed.
7. The method for manufacturing a capacitor electrolyte membrane according to claim 6, wherein the time of the reactive precursor treatment is 5to 8min, the first pressure is 50 to 80mtorr, the second pressure is 2 to 5torr, and the purge uses Ar as a gas.
8. The method for producing a capacitor electrolyte membrane according to claim 1, wherein the oxidation treatment is an oxygen-containing plasma oxidation treatment of the electrolyte membrane using a remote plasma treatment apparatus while applying a bias voltage to the back surface of the semiconductor substrate.
9. The method for producing a capacitor electrolyte membrane according to claim 8, wherein the gas at the time of the oxidation treatment includes: oxygen, oxygen radicals or oxygen ions.
10. The method for producing a capacitor electrolyte membrane according to any one of claims 1 to 9, characterized in that the lower electrode has a cylindrical shape.
11. The production method for a capacitor electrolyte membrane according to claim 10, characterized in that the reprocessed electrolyte membrane is located at the bottom of the cylindrical shape.
12. A capacitor electrolyte membrane treated by the method for producing a capacitor electrolyte membrane according to any one of claims 1 to 11.
CN202011568032.3A 2020-12-25 2020-12-25 Capacitor electrolyte membrane and method for producing same Pending CN114678283A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011568032.3A CN114678283A (en) 2020-12-25 2020-12-25 Capacitor electrolyte membrane and method for producing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011568032.3A CN114678283A (en) 2020-12-25 2020-12-25 Capacitor electrolyte membrane and method for producing same

Publications (1)

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CN114678283A true CN114678283A (en) 2022-06-28

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