CN114667609A - 垂直场效应晶体管和用于构造其的方法 - Google Patents

垂直场效应晶体管和用于构造其的方法 Download PDF

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CN114667609A
CN114667609A CN202080079619.XA CN202080079619A CN114667609A CN 114667609 A CN114667609 A CN 114667609A CN 202080079619 A CN202080079619 A CN 202080079619A CN 114667609 A CN114667609 A CN 114667609A
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field effect
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effect transistor
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D·斯霍尔滕
J·巴林豪斯
D·克雷布斯
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Robert Bosch GmbH
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Abstract

提供了一种垂直场效应晶体管(200，300，400，500，600)，其具有漂移区域(204)；在所述漂移区域(204)上或在所述漂移区域上方的半导体鳍片(230)，以及在所述半导体鳍片(230)上或在所述半导体鳍片上方的连接端区域(212)，构造在所述半导体鳍片(230)的至少一个侧壁旁边的栅电极(220)，其中，所述半导体鳍片(230)在横向地布置在所述栅电极(220)旁边的第一区段(208)中具有比在接触所述漂移区域(204)的第二区段(206)中和/或比在接触所述连接端区域(212)的第三区段(210)中更小的横向延伸。

Description

垂直场效应晶体管和用于构造其的方法
技术领域
本发明涉及一种垂直场效应晶体管和一种用于构造其的方法。
背景技术
在汽车领域，随着朝向电动汽车的进步发展，用于快速且无损耗切换的功率半导体的解决方案是受青睐的。在此，从横向构件到垂直构件的同步趋势以及近几十年来确立的朝向所谓的“宽带隙(wide-band-gap)”材料(即，具有宽的带间隙的半导体材料，例如碳化硅(SiC)或氮化镓(GaN))的硅技术的趋势导致新的构件概念和制造工艺的发展。
对于具有宽的带间隙的半导体的应用，所谓的功率FinFET(Fin＝Finne，鳍片，FET＝Feldeffekttransistor，场效应晶体管)的使用可以是有利的。在常规的MOSFET或者MISFET中，有源的能切换的部件由反转沟道提供，例如由在npn结中的p区提供，在所述npn结中通过施加栅极电压构造电子路径。反之，在功率FinFET中，能切换的部件由窄的半导体鳍片构成，所述半导体鳍片由于其几何结构和栅极金属化的相配的选择而能切换。功率FinFET的沟道电阻比在基于SiC或者GaN的常规的MOSFET或者MISFET中小得多。由此产生整个构件的较小的接通电阻。
在功率FinFET中，沟道区域形成在半导体鳍片的在栅极金属的高度上的区域中。由于这个区域的宽度基本上确定功率FinFET的阈值电压，因此这个区域在其宽度方面应未超出确定的值，以便确保完全耗尽。在图1中直观地说明所涉及的技术的功率FinFET 100的结构。常规的功率FinFET 100在衬底102上具有带有n型掺杂的漂移区域104、漏电极106、源电极108、栅电极110、半导体鳍片112、栅极电介质114和绝缘部116。半导体鳍片112借助n+型掺杂118与源电极108连接。在功率FinFET 100中，能切换的部件由窄的半导体鳍片112构成，所述半导体鳍片由于其几何结构和栅极金属化110的相配的选择而能切换。半导体鳍片的宽度尤其取决于半导体鳍片的所使用的半导体材料以及栅极金属的逸出功。这类窄的半导体鳍片在使用常规的光刻技术(如其典型地使用在功率晶体管的批量生产中)的情况下可能不再是可制造的。此外，薄的半导体鳍片使与具有低电阻的正面金属化部的电接通变得困难。
发明内容
本发明的任务是，提供一种垂直场效应晶体管和一种用于构造其的方法，所述垂直场效应晶体管/所述方法实现了具有改进的正面触点的垂直场效应晶体管。
根据本发明的一个方面，该任务通过一种垂直场效应晶体管解决。垂直场效应晶体管具有：漂移区域、在所述漂移区域上或在所述漂移区域上方的半导体鳍片、在所述半导体鳍片上或在所述半导体鳍片上方的连接端区域(Anschlussbereich)和构造在所述半导体鳍片的至少一个侧壁旁边的栅电极，其中，所述半导体鳍片在横向地布置在所述栅电极旁边的第一区段中具有比在接触所述漂移区域的第二区段中和/或比在接触所述连接端区域的第三区段中更小的横向延伸(Ausdehnung)。在沟道区(第一区段)上方和/或下方的较宽的区域实现了在半导体鳍片上的较大的接触面积，并且，因此实现了降低半导体鳍片的接触区域(半导体鳍片的第二和/或第三区段)的寄生电接触电阻。在沟道区上方和/或下方的区域中的加宽的半导体鳍片实现了降低正面触点(例如源电极)的接触电阻。
替代半导体鳍片地，在另一个方面中可构造半导体柱。
根据本发明的另一个方面，该任务通过一种用于构造垂直场效应晶体管的方法解决。所述方法具有：构造漂移区域；在所述漂移区域上或在所述漂移区域上方构造半导体鳍片；在所述半导体鳍片上或在所述半导体鳍片上方构造连接端区域；以及构造栅电极，所述栅电极构造在所述半导体鳍片的至少一个侧壁旁边，其中，所述半导体鳍片在横向地布置在所述栅电极旁边的第一区段中构造成具有比在接触所述漂移区域的第二区段中和/或比在接触所述连接端区域的第三区段中更小的横向延伸。这实现了，为了制造垂直场效应晶体管，在投资成本和运行成本方面，可使用与其他概念相比成本更有利的设施配备。
附图说明
在从属权利要求和说明书中阐述这些方面的扩展方案。在附图中示出并且以下更详尽地解释本发明的实施方式。附图示出：
图1示出所涉及的技术的垂直场效应晶体管的示意性示图；
图2至图6示出根据不同实施方式的垂直场效应晶体管的示意性截面示图；
图7A至图7F分别示出用于制造根据不同实施方式的垂直场效应晶体管的方法步骤的示意性示图；
图8A至图8C分别示出根据不同实施方式的半导体鳍片、半导体柱或者说由相连接的半导体鳍片构成的网络的示意性俯视图；以及
图9示出用于构造根据不同实施方式的垂直场效应晶体管的方法的流程图。
具体实施方式
在以下的详细的说明中，参照随附的绘图，所述随附的绘图构成本说明书的部分，并且，在所述随附的绘图中，为了直观地说明而示出特定的实施例，在所述特定的实施例中可以实行本发明。不言而喻的是，可以利用其他的实施例并且可以进行在结构上或者逻辑的改变，而不脱离本发明的保护范围。不言而喻的是，只要没有专门另外指明，在这里所说明的不同的实施例的特征可以相互组合。因此，以下的详细的说明不可在进行限制的意义下理解，并且，本发明的保护范围由所增补的权利要求限定。在附图中，相同的或者类似的元件设有相同的附图标记，只要这符合目的。
图2示出根据不同实施方式的垂直场效应晶体管200的示意性截面示图。在不同的实施方式中，垂直场效应晶体管200具有：在半导体衬底202上的漂移区域204，具有在漂移区域204上或在漂移区域204上方的连接端区域212的半导体鳍片230(其纵方向垂直于绘图平面伸展)，第一源/漏电极(例如，源电极214)和第二源/漏电极(例如，漏电极216)。下面，示例性地假定，第一源/漏电极为源电极214，并且第二源/漏电极为漏电极216。此外，垂直场效应晶体管200横向地在半导体鳍片230的至少一个侧壁旁边具有栅电极220，其中，栅电极220借助绝缘层222与源电极214电绝缘。栅极电介质218布置在栅电极220和半导体鳍片230的至少一个侧壁之间。
半导体鳍片230如此构造，使得它在横向地布置在栅电极220旁边的第一区段208中比在接触漂移区域204的第二区段206中和/或比在借助其接触源电极214的第三区段210中具有更小的横向延伸。这实现了，使在衬底正面处的载电流的接触面积扩大数倍。由此，可以为垂直场效应晶体管制造明显更低且更可靠的欧姆接触区域。
换言之：半导体鳍片230在第二区段206和/或第三区段210中相对于第一区段208横向地加宽，并且因而具有减小的总电阻。在第二区段206和第三区段210中的加宽部不仅可以构造成具有相同的横向延伸，而且可以构造成具有彼此不同的横向延伸。在不同的实施方式中，半导体鳍片230在第二区段206中、但不在第三区段210中具有比在第一区段208中更大的横向延伸(参见图3)。替代地，半导体鳍片230在第三区段210中、但不在第二区段206中具有比在第一区段208中更大的横向延伸。替代地，半导体鳍片230在第二和第三区段206、210中均具有比在第一区段208中更大的横向延伸。半导体鳍片230可以具有至少一个基本上直线的(lineare)或者说直的或垂直平面的侧壁。半导体鳍片230例如具有直线的第一侧壁和直线的第二侧壁，该第二侧壁与第一侧壁对置。第一和第二侧壁可以彼此平行。
图2示出根据不同实施方式的单个FinFET单元的示意性剖视图。一般而言，数百到上千个这样的单元并联连接，并且，这种结构在第三维度中延续到平面中。通过多个单元的组合产生了FinFET单元的二维延伸的场。垂直场效应晶体管可以是功率半导体组件。作为示例：半导体衬底202可以是GaN衬底202或SiC衬底202。在半导体衬底202上可以构造(例如施加)弱地n型导电的半导体漂移区域204，例如GaN漂移区域204或SiC漂移区域204。n型导电的半导体区可以以半导体鳍片230的形式、例如以GaN鳍片或者SiC鳍片的形式构造在漂移区域204上方。连接端区域212可以具有n型掺杂的(例如n+型掺杂的)半导体材料或由其形成。
对于垂直场效应晶体管200作为晶体管或者说开关的功能来说，半导体鳍片230在第一区段208中例如具有在所呈现的绘图平面中的、在约100nm至约200nm的范围内的横向延伸以及在所呈现的绘图平面中的、在约0.3μm至约3μm的范围内的垂直延伸。
在不施加栅极电压的情况下，场效应晶体管200可以是自锁的，因为在半导体鳍片230下方在漂移区域204中电子气体可以是被耗尽的。通过正电压在栅电极220处的施加，电子可以在半导体鳍片230的邻近栅电极220的区域中被积累。电子可以从源电极214通过半导体鳍片230流到半导体鳍片230的底部中并且从那里到达漂移区域204中，并且进一步通过漂移区域204和衬底202到达漏电极216中。
在不同的实施方式中，连接端区域212以(进入绘图平面中的)全部深度构造在第三区段210上方。
在不同的实施方式中，栅极电介质218、漂移区域204和/或半导体鳍片230可以如此构造，使得与栅极电介质218的界面具有倒圆角的角部和/或边缘或者说具有尽可能大的曲率半径。这实现了减少场尖峰。
在不同的实施方式中，连接端区域212具有比半导体鳍片230在第三区段210中的横向延伸更大的横向延伸，如在图3中直观地说明的，图3示出根据不同实施方式的垂直场效应晶体管300。
半导体鳍片230可以在第二区段206中具有连接区域402，该连接区域具有比在第一区段208中的半导体鳍片230和/或比漂移区域204更大的导电性，如在图4中直观地说明的，图4示出根据不同实施方式的垂直场效应晶体管400。
在不同的实施方式中，可以设置屏蔽结构404，该屏蔽结构横向地构造在连接区域402旁边，其中，屏蔽结构404具有与连接区域402不同的导电性类型，如在图4中直观地说明的。在第二区段中的连接区域402可以具有n型掺杂的(例如n+型掺杂的)半导体材料或由其形成。屏蔽结构404具有例如p型掺杂或本征的半导体材料或由其形成。
半导体鳍片230可以在第二区段206中比在第一区段208中更强地n型掺杂。这实现了更好的电流分叉(Stromspreizung)。还可以设置屏蔽结构404，该屏蔽结构布置在栅电极220下方在漂移区域204中。这实现了，对场尖峰屏蔽栅极电介质218。在第二区段206中，半导体鳍片230可以具有增加的n型掺杂。替代地，增加的n型掺杂可以构造至屏蔽结构404的下边缘。具有p型掺杂的屏蔽结构404可以与源电极214导电连接。替代地或附加地，垂直地出现在栅电极220和漂移区域204之间的栅极电介质218处的电场尖峰可以借助第二绝缘层223被减小，该第二绝缘层布置在漂移区域204和栅电极220之间的底部中、在半导体鳍片230旁边，如在图5中直观地说明的，图5示出根据不同实施方式的垂直场效应晶体管500。例如，第二绝缘层223可以布置在栅极电介质218和漂移区域204之间。这实现了，提高栅极电介质218在这个区域中的抗击穿强度并且因而提高垂直场效应晶体管的耐压强度。第二绝缘层223可以具有比栅极电介质218更大的厚度。
在不同的实施方式中，半导体鳍片230的至少一个侧壁可以是拱形或弯曲的，如在图6中直观地说明的，图6示出根据不同实施方式的垂直场效应晶体管600。
多个半导体鳍片230可以并排地布置(参见图8A)。替代于半导体鳍片地，可以设置一个或多个半导体柱240(参见图8B)。替代地，可以设置由两个或更多彼此连接的半导体鳍片230构成的网络(参见图8C)。
图9直观地说明用于构造根据不同实施方式的垂直场效应晶体管的方法900的流程图。方法900具有：构造910漂移区域；在漂移区域上或在漂移区域上方构造920半导体鳍片，并且，在半导体鳍片上或在半导体鳍片上方构造930连接端区域，以及，构造940栅电极，所述栅电极构造在半导体鳍片的至少一个侧壁旁边。半导体鳍片在横向地布置在栅电极旁边的第一区段中构造成具有比在接触漂移区域的第二区段中和/或比在接触连接端区域的第三区段中更小的横向延伸。例如，在使用蚀刻停止掩模和各向异性蚀刻的情况下可以构造半导体鳍片的横向更小的延伸。该蚀刻停止掩模可以构造在半导体鳍片上或在半导体鳍片上方。
在其上无法构造热氧化物的半导体材料(例如氮化镓(GaN)、氧化镓(GaOx)、氮化铝(AlN)、金刚石)的情况下，各向异性的蚀刻工艺可以提供实现在图2中示出的半导体鳍片230的形式的可能性。图7A至图7F中直观地说明了用于构造基于GaN的垂直场效应晶体管的方法的一个示例的示意性截面示图。
图7A示出提供n+型掺杂的半导体材料(212)，该半导体材料借助外延或(离子)植入被提供在漂移区域204和衬底202上或其上方。扁平的半导体鳍片构造在n+型掺杂的半导体材料中，从而结构化地构造连接端区域212。结构化可以借助湿法化学蚀刻或干法蚀刻来构造。对于氮化镓、氧化镓和氮化铝来说，干法蚀刻可以例如应用在含氯等离子体中。对于金刚石来说，相似的蚀刻可以应用在含氧等离子体中。用于氮化镓的湿法化学蚀刻工艺例如在不同浓度和温度的氢氧化钾(KOH)或四甲基氢氧化铵(TMAH)中是可行的。
图7B示出在连接端区域212上或其上方掩蔽或者说构造掩膜702和结构化或者说构造沟槽结构(Trench)，以暴露或者说构造半导体鳍片。作为掩蔽材料可以使用氮化合物和/氧化合物。
图7C示出例如借助KOH或TMAH的各向异性的湿法蚀刻，以构造半导体鳍片的第一区段。
图7D示出在半导体鳍片上或其上方进一步掩蔽或者说构造掩膜704。
图7E示出围绕所掩蔽的半导体鳍片构造另一个沟槽结构，以构造半导体鳍片230的加宽部或者说半导体鳍片的第二区段。
图7F示出栅电极、源电极和漏电极以及绝缘部的构造。
所说明的和在附图中所示出的实施方式仅仅示例性地选择。不同的实施方式可以完全地或者在单个的特征方面相互组合。一种实施方式也可以由一种另外的实施方式的特征来补充。此外，所说明的方法步骤可以重复以及以不同于说明顺序的顺序实施。尤其是，本发明不限于所指明的方法。

Claims (12)

1.一种垂直场效应晶体管(200，300，400，500，600)，其具有：
漂移区域(204)；
在所述漂移区域(204)上或在所述漂移区域上方的半导体鳍片(230)；
在所述半导体鳍片(230)上或在所述半导体鳍片上方的连接端区域(212)；和
构造在所述半导体鳍片(230)的至少一个侧壁旁边的栅电极(220)，
其中，所述半导体鳍片(230)在横向地布置在所述栅电极(220)旁边的第一区段(208)中具有比在接触所述漂移区域(204)的第二区段(206)中和/或比在接触所述连接端区域(212)的第三区段(210)中更小的横向延伸。
2.根据权利要求1所述的垂直场效应晶体管(200，300，400，500，600)，
其中，所述半导体鳍片(230)具有至少一个基本上直线的侧壁。
3.根据权利要求1或2中任一项所述的垂直场效应晶体管(200，300，400，500，600)，
其中，所述半导体鳍片(230)具有直线的第一侧壁和直线的第二侧壁，所述第二侧壁与所述第一侧壁对置。
4.根据权利要求1至3中任一项所述的垂直场效应晶体管(200，300，400，500，600)，
其中，所述连接端区域(212)具有比所述半导体鳍片(230)在所述第三区段(210)中的横向延伸更大的横向延伸。
5.根据权利要求1至4中任一项所述的垂直场效应晶体管(200，300，400，500，600)，
其中，所述半导体鳍片(230)在所述第二区段(206)中具有连接区域(402)，所述连接区域具有比在所述第一区段(208)中的半导体鳍片(230)和/或比所述漂移区域(204)更大的导电性。
6.根据权利要求5所述的垂直场效应晶体管(200，300，400，500，600)，所述垂直场效应晶体管还具有屏蔽结构(404)，所述屏蔽结构横向地构造在所述连接区域(402)旁边，其中，所述屏蔽结构(404)具有与所述连接区域(402)不同的导电性类型。
7.根据权利要求1至6中任一项所述的垂直场效应晶体管(200，300，400，500，600)，所述垂直场效应晶体管还具有绝缘层(223)，所述绝缘层布置在所述栅电极(220)和所述漂移区域(204)之间。
8.根据权利要求1至7中任一项所述的垂直场效应晶体管(200，300，400，500，600)，其中，所述漂移区域(204)和所述半导体鳍片(230)具有氮化镓或碳化硅，或者由氮化镓或碳化硅形成。
9.根据权利要求1至8中任一项所述的垂直场效应晶体管(200，300，400，500，600)，
其中，所述半导体鳍片(230)构造为由两个或更多彼此连接的半导体鳍片(230)构成的网络。
10.一种垂直场效应晶体管(200，300，400，500，600)，其具有：
漂移区域(204)；
在所述漂移区域(204)上或在所述漂移区域上方的半导体柱(240)；
在所述半导体柱(240)上或在所述半导体柱上方的连接端区域(212)；和
构造在所述半导体柱(240)的至少一个侧壁旁边的栅电极(220)，
其中，所述半导体柱(240)在横向地布置在所述栅电极(220)旁边的第一区段(208)中具有比在接触所述漂移区域(204)的第二区段(206)中和/或比在接触所述连接端区域(212)的第三区段(210)中更小的横向延伸。
11.一种用于构造垂直场效应晶体管(200，300，400，500，600)的方法(900)，所述方法(900)具有：
构造(910)漂移区域(204)；
在所述漂移区域(204)上或在所述漂移区域上方构造(920)半导体鳍片；
在所述半导体鳍片(230)上或在所述半导体鳍片上方构造(930)连接端区域(212)；以及
构造(940)栅电极(220)，所述栅电极构造在所述半导体鳍片(230)的至少一个侧壁旁边，
其中，所述半导体鳍片(230)在横向地布置在所述栅电极(220)旁边的第一区段(208)中构造成具有比在接触所述漂移区域(204)的第二区段(206)中和/或比在接触所述连接端区域(212)的第三区段(210)中更小的横向延伸。
12.根据权利要求11所述的方法(900)，
其中，在使用蚀刻停止掩模和各向异性蚀刻的情况下构造所述半导体鳍片(230)的横向更小的延伸，其中，所述蚀刻停止掩模构造在所述半导体鳍片(230)上或所述半导体鳍片上方。
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