CN114611454A - Digital back-end winding method and system - Google Patents
Digital back-end winding method and system Download PDFInfo
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- CN114611454A CN114611454A CN202210283505.8A CN202210283505A CN114611454A CN 114611454 A CN114611454 A CN 114611454A CN 202210283505 A CN202210283505 A CN 202210283505A CN 114611454 A CN114611454 A CN 114611454A
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- 238000004804 winding Methods 0.000 title claims abstract description 110
- 238000000034 method Methods 0.000 title claims abstract description 32
- 230000000052 comparative effect Effects 0.000 claims 2
- 230000003139 buffering effect Effects 0.000 claims 1
- 230000009286 beneficial effect Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/394—Routing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2117/00—Details relating to the type or aim of the circuit design
- G06F2117/10—Buffer insertion
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
- G06F2119/12—Timing analysis or timing optimisation
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Abstract
The invention provides a digital back end winding method which comprises the steps of arranging at least one buffer unit, connecting two ports with the buffer unit through windings, dividing the windings into a plurality of sections, further reducing the length of one section of windings, controlling the smaller the length of the windings, and controlling the delay of the buffer unit, so that the total delay can be controlled better. The invention also provides a digital rear-end winding system.
Description
Technical Field
The invention relates to the technical field of integrated circuit wiring, in particular to a digital back-end winding method and a digital back-end winding system.
Background
The existing winding technology is very effective for short-distance winding, but for longer and longer physical distance and more complex physical environment, the existing technology can cause large delay and is difficult to control, so that the chip can hardly reach better performance index, and even the chip design fails.
Therefore, there is a need to provide a new digital back-end winding method and system to solve the above-mentioned problems in the prior art.
Disclosure of Invention
The invention aims to provide a digital back-end winding method and a digital back-end winding system, which are convenient for better controlling time delay.
In order to achieve the above object, the digital back end winding method of the present invention comprises:
laying out at least one buffer unit;
and connecting the two ports with the buffer unit through a winding.
The digital back-end winding method has the beneficial effects that: at least one buffer unit is arranged, two ports are connected with the buffer unit through a winding, the winding is divided into multiple sections, the length of the winding is further reduced, the smaller the length of the winding is, the better the control is, the delay of the buffer unit is also controllable, and therefore the total delay can be better controlled.
Optionally, the laying out at least one buffer unit includes:
acquiring unit delay of the buffer unit and coordinates of the two ports;
and calculating the number of the buffer units according to the unit delay of the buffer units and the coordinates of the two ports. The beneficial effects are that: the number of the buffer units is convenient to control, and the phenomenon that the total delay is increased due to excessive buffer units is avoided.
Optionally, the laying out at least one buffer unit further includes:
and calculating the coordinates of the buffer units according to the coordinates of the two ports and the number of the buffer units.
Optionally, the laying out at least one buffer unit further includes:
judging whether a module exists in the coordinate position of the buffer unit;
and if the coordinates of the buffer unit are judged to exist in the module, the coordinates are searched outwards by taking the coordinates of the buffer unit as the circle center until the positions of the buffer unit and the module are not overlapped, and the coordinates of the buffer unit are updated by new coordinates. The beneficial effects are that: avoiding position conflicts between the buffer units and the modules.
Optionally, the calculating the coordinates of the buffer units according to the coordinates of the two ports and the number of the buffer units includes:
and calculating the coordinates of the buffer units according to the coordinates of the two ports and the number of the buffer units, and enabling the buffer units to be arranged between the two ports at equal intervals. The beneficial effects are that: the complexity of the layout buffer unit is convenient to reduce, and further the total delay is avoided to be overlarge.
Optionally, the connecting the two ports with the buffer unit through a winding includes:
arranging a first winding between the port and the buffer units, and between the two buffer units along the abscissa of the port;
second windings are arranged along the ordinate of the port between the port and the buffer units, between two of the buffer units.
Optionally, the digital back-end winding method further includes a fitting curve calculation step, where the fitting curve calculation step includes:
and obtaining a delay fitting curve by fitting according to the known length of the winding and the known delay.
Optionally, the digital back-end winding method further includes a first total delay calculation step, where the first total delay calculation step includes:
and calculating the first total delay through the delay fitting curve according to the coordinates of the two ports.
Optionally, the digital back-end winding method further includes a second total delay calculation step, where the second total delay calculation step includes:
and calculating a second total delay through the delay fitting curve according to the coordinates of the two ports, the number of the buffer units and the delay of the buffer units.
Optionally, the digital back-end winding method further includes a comparison and adjustment step, where the comparison and adjustment step includes:
comparing the first total delay and the second total delay;
and if the first total delay time is judged to be larger than or equal to the second total delay time, adjusting the delay of the buffer unit or re-executing the fitting curve calculation step. The beneficial effects are that: and the overlarge total delay caused by the calculation error of the delay fitting curve is avoided.
The invention also provides a digital back end winding system which is used for realizing the digital back end winding method and comprises a layout unit and a winding unit, wherein the layout unit is used for laying at least one buffer unit, and the winding unit is used for connecting two ports with the buffer unit through winding.
The digital rear-end winding system has the beneficial effects that: the layout unit is used for laying out at least one buffer unit, the winding unit is used for connecting two ports with the buffer unit through windings, the windings are divided into multiple sections, the length of the windings is further reduced by one section, the smaller the length of the windings is, the better the control is, the delay of the buffer unit is also controllable, and therefore the total delay can be better controlled.
Optionally, the digital back-end winding system further comprises a fitting unit, configured to obtain a delay fitting curve by fitting according to the known winding length and the known delay.
Drawings
FIG. 1 is a flow chart of a digital back-end winding method of the present invention;
FIG. 2 is a schematic winding diagram of some embodiments of the present invention;
FIG. 3 is a schematic winding diagram of still other embodiments of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without inventive step based on the embodiments of the present invention, are within the scope of protection of the present invention. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. As used herein, the word "comprising" and similar words are intended to mean that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items.
Aiming at the problems in the prior art, the embodiment of the invention provides a digital back end winding method. Referring to fig. 1, the digital back-end winding method includes the following steps:
s1: laying out at least one buffer unit;
s2: and connecting the two ports with the buffer unit through a winding.
In some embodiments, said laying out at least one buffer cell comprises:
acquiring unit delay of the buffer unit and coordinates of the two ports;
and calculating the number of the buffer units according to the unit delay of the buffer units and the coordinates of the two ports.
In some embodiments, said laying out at least one buffer cell further comprises: and calculating the coordinates of the buffer units according to the coordinates of the two ports and the number of the buffer units.
FIG. 2 is a schematic winding diagram of some embodiments of the present invention. Referring to fig. 2, there are two ports including a first port 100 and a second port 200 and four buffer units including a first buffer 300, a second buffer 400, a third buffer 500 and a fourth buffer 600, the windings including a first winding 301, a second winding 401, a third winding 501, a fourth winding 601 and a fifth winding 201, the first buffer 300, the second buffer 400, the third buffer 500 and the fourth buffer 600 being disposed at equal intervals between the first port 100 and the second port 200, the first port 100 and the first buffer 300 being connected by the first winding 301, the first buffer 300 and the second buffer 400 being connected by the second winding 401, the second buffer 400 and the third buffer 500 being connected by the third winding 501, the third buffer and the fourth buffer 600 are connected by the fourth winding 601, and the fourth buffer 600 and the second port 200 are connected by the fifth winding 201.
Referring to fig. 2, the first port 100 has coordinates (2, 20), the second port 200 has coordinates (22, 10), the first buffer 300 has coordinates (6, 18), the second buffer 400 has coordinates (10, 16), the third buffer 500 has coordinates (14, 14), and the fourth buffer 600 has coordinates (18, 12).
In some embodiments, the laying out at least one buffer cell further comprises:
judging whether a module exists in the coordinate position of the buffer unit;
and if the coordinates of the buffer unit are judged to exist in the module, the coordinates are searched outwards by taking the coordinates of the buffer unit as the circle center until the positions of the buffer unit and the module are not overlapped, and the coordinates of the buffer unit are updated by new coordinates.
FIG. 3 is a schematic winding diagram of still other embodiments of the present invention. Referring to fig. 2 and 3, the module 502 and the third buffer 500 are both rectangular, coordinates of four vertices of the module 502 are (12, 13), (15, 13), (12, 16) and (15, 16), coordinates of a center point of the third buffer 500 are coordinates of the third buffer 500, that is, (14, 14), coordinates of four vertices of the third buffer 500 are (13, 13), (15, 13), (13, 15) and (15, 15), respectively, and a range of the third buffer 500 and a range of the module 502 have an overlapping portion, so that it is determined that the coordinate position of the third buffer 500 exists in the module 502, and the coordinates are searched outward with the coordinates (14, 14) as a center until the position of the third buffer 500 does not overlap with the position of the module 502, at which time the coordinates of the third buffer 500 are (16, 12).
In some embodiments, said calculating coordinates of said buffer units from coordinates of two of said ports and a number of said buffer units comprises: and calculating the coordinates of the buffer units according to the coordinates of the two ports and the number of the buffer units, and enabling the buffer units to be arranged between the two ports at equal intervals.
In some embodiments, said connecting the two ports to the buffer unit via a wire comprises:
arranging a first winding between the port and the buffer units, and between the two buffer units along the abscissa of the port;
second windings are arranged along the ordinate of the port between the port and the buffer units, between two of the buffer units.
In some embodiments, the digital back-end winding method further comprises a fitting curve calculation step, the fitting curve calculation step comprising: and obtaining a delay fitting curve by fitting according to the known length of the winding and the known delay.
In some embodiments, the delay fit curve is expressed as y ═ a × x2Y in the delay fitting curve represents the delay of the winding, x in the delay fitting curve represents the length of the winding, and a in the delay fitting curve represents a parameter of the delay fitting curve obtained by fitting according to the length of the known winding and the known delay.
In some embodiments, the digital back-end winding method further comprises a first total delay calculating step, where the first total delay calculating step comprises: and calculating the first total delay through the delay fitting curve according to the coordinates of the two ports. Wherein the first total delay is a winding delay of the prior art.
Referring to fig. 2, the coordinates of the first port are represented by (x1, y1) and the coordinates of the second port are represented by (x2, y2), so that the length of the prior art winding between the first port and the second port is x2-x1+ y2-y1, and the first total delay can be represented by a (x2-x1+ y2-y1)2. Wherein x1, x2, y1 and y2 are all greater than or equal to 0.
In some embodiments, the digital back-end winding method further includes a second total delay calculation step, where the second total delay calculation step includes: and calculating a second total delay through the delay fitting curve according to the coordinates of the two ports, the number of the buffer units and the delay of the buffer units. And the second total delay is the winding delay of the application.
Referring to fig. 2, the buffer units are equally spaced between the first port and the second port, the number of the buffer units is N, the winding is divided into N +1 segments having equal length, the length of one segment of the winding can be expressed as (x2-x1+ y1-y2)/(N +1), and the delay of one segment of the winding can be expressed as a ((x2-x1+ y1-y2)/(N +1))2Then the total delay of the winding in the segment N +1 can be expressed as a ((x2-x1+ y1-y2)/(N +1))2(N +1), all the buffer units are of the same type, the delay of the buffer units can be represented as b, and the second total delay can be represented as a ((x2-x1+ y1-y2)/(N +1))2*(N+1)+Nb。
In some embodiments, the pair a ((x2-x1+ y1-y2)/(N +1))2The minimum value of (N +1) + Nb is obtained to obtain N2＝a*(x2-x1+y2-y1)2B is the ratio of the total weight of the components to the total weight of the components. By N2＝a*(x2-x1+y2-y1)2The number of buffer units can be determined.
In some embodiments, the digital back-end winding method further comprises a comparison and adjustment step, wherein the comparison and adjustment step comprises:
comparing the first total delay and the second total delay;
and if the first total delay time is judged to be larger than or equal to the second total delay time, adjusting the delay of the buffer unit or re-executing the fitting curve calculation step. Wherein the delay of the buffer unit can be adjusted by changing the type of the buffer unit, and the delay fitting curve can be re-fitted by changing the length of the winding and the known delay.
The invention also provides a digital back-end winding system which is used for realizing the digital back-end winding method and comprises a layout unit and a winding unit, wherein the layout unit is used for laying at least one buffer unit, and the winding unit is used for connecting two ports with the buffer unit through winding.
In some embodiments, the digital back-end winding system further comprises a fitting unit for obtaining a delay fitting curve by fitting according to the known winding length and the known delay.
Although the embodiments of the present invention have been described in detail hereinabove, it is apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it is to be understood that such modifications and variations are within the scope and spirit of the present invention as set forth in the following claims. Moreover, the invention as described herein is capable of other embodiments and of being practiced or of being carried out in various ways.
Claims (12)
1. A digital back-end winding method is characterized by comprising the following steps:
laying out at least one buffer unit;
and connecting the two ports with the buffer unit through a winding.
2. The digital back end winding method of claim 1, wherein the laying out of the at least one buffer cell comprises:
acquiring unit delay of the buffer unit and coordinates of the two ports;
and calculating the number of the buffer units according to the unit delay of the buffer units and the coordinates of the two ports.
3. The digital back end winding method of claim 2, wherein said laying out at least one buffer cell further comprises:
and calculating the coordinates of the buffer units according to the coordinates of the two ports and the number of the buffer units.
4. The digital back end winding method of claim 3, wherein said laying out at least one buffer cell further comprises:
judging whether a module exists in the coordinate position of the buffer unit;
and if the coordinates of the buffer unit are judged to exist in the module, the coordinates are searched outwards by taking the coordinates of the buffer unit as the circle center until the positions of the buffer unit and the module are not overlapped, and the coordinates of the buffer unit are updated by new coordinates.
5. The digital back-end winding method according to claim 3, wherein said calculating coordinates of said buffer units according to coordinates of two of said ports and the number of said buffer units comprises:
and calculating the coordinates of the buffer units according to the coordinates of the two ports and the number of the buffer units, and enabling the buffer units to be arranged between the two ports at equal intervals.
6. The digital back end winding method according to claim 1, wherein the connecting the two ports with the buffering unit via a winding comprises:
arranging a first winding between the port and the buffer units, and between the two buffer units along the abscissa of the port;
second windings are arranged along the ordinate of the port between the port and the buffer units, between two of the buffer units.
7. The digital back-end winding method according to claim 1, further comprising a fitting curve calculation step, the fitting curve calculation step comprising:
and obtaining a delay fitting curve by fitting according to the known length of the winding and the known delay.
8. The digital back end winding method of claim 7, further comprising a first total delay calculating step, wherein the first total delay calculating step comprises:
and calculating the first total delay through the delay fitting curve according to the coordinates of the two ports.
9. The digital back-end winding method of claim 8, further comprising a second total delay calculation step, the second total delay calculation step comprising:
and calculating a second total delay through the delay fitting curve according to the coordinates of the two ports, the number of the buffer units and the delay of the buffer units.
10. The digital back end winding method of claim 9, further comprising a comparative adjustment step, the comparative adjustment step comprising:
comparing the first total delay and the second total delay;
and if the first total delay time is judged to be larger than or equal to the second total delay time, adjusting the delay of the buffer unit or re-executing the fitting curve calculation step.
11. A digital back-end winding system for implementing the digital back-end winding method according to any one of claims 1 to 10, wherein the digital back-end winding system comprises a layout unit and a winding unit, the layout unit is used for laying out at least one buffer unit, and the winding unit is used for connecting two ports with the buffer unit through winding.
12. The digital back-end winding system according to claim 11, further comprising a fitting unit for obtaining a delay fitting curve by fitting according to the known length of the winding and the known delay.
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| CN202210283505.8A CN114611454A (en) | 2022-03-22 | 2022-03-22 | Digital back-end winding method and system |
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