CN114596807A - Display panel, driving method thereof and display device - Google Patents
Display panel, driving method thereof and display device Download PDFInfo
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- CN114596807A CN114596807A CN202210272252.4A CN202210272252A CN114596807A CN 114596807 A CN114596807 A CN 114596807A CN 202210272252 A CN202210272252 A CN 202210272252A CN 114596807 A CN114596807 A CN 114596807A
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- 238000000034 method Methods 0.000 title claims abstract description 27
- 230000006698 induction Effects 0.000 claims abstract description 28
- 230000001939 inductive effect Effects 0.000 claims description 8
- 230000011664 signaling Effects 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 19
- 238000012545 processing Methods 0.000 description 9
- 230000004044 response Effects 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
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- 238000013461 design Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
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- 239000002096 quantum dot Substances 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
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Abstract
The embodiment of the invention provides a display panel, a driving method thereof and a display device, relates to the technical field of display, and aims to improve the display effect of the display panel with an induction antenna. The display panel comprises an induction antenna; a plurality of pixel driving circuits including a scanning control signal terminal and a light emission control signal terminal; the scanning driving circuit comprises a plurality of cascaded scanning driving units, and the output end of each scanning driving unit transmits a scanning control signal to a scanning control signal end; the control module is electrically connected with the induction antenna and the scanning driving circuit respectively; the working state of the display panel comprises a first state; in the first state, the control module is used for controlling the induction antenna to work and controlling the scanning driving unit to output a non-effective level signal.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to the technical field of display, in particular to a display panel, a driving method thereof and a display device.
[ background of the invention ]
With the development of science and technology, at present, an induction antenna for receiving and transmitting signals is increasingly arranged in a display device, and the induction antenna comprises a main mobile Communication antenna, a wireless charging coil, a Near Field Communication (NFC) antenna and the like. For example, with the large-scale application of smart phones, mobile phones or wearable display devices that carry NFC to implement functions such as mobile payment and access control management are becoming more and more popular.
However, when the induction antenna operates, a display panel mounted with the induction antenna has a problem of screen splash.
[ summary of the invention ]
Embodiments of the present invention provide a display panel, a driving method thereof, and a display device, so as to improve a display effect of the display panel provided with an induction antenna.
In one aspect, an embodiment of the present invention provides a display panel, including:
an inductive antenna;
a plurality of pixel driving circuits including a scan control signal terminal and a light emission control signal terminal;
the scanning driving circuit comprises a plurality of cascaded scanning driving units, and the output end of each scanning driving unit transmits a scanning control signal to the scanning control signal end;
a control module; the control module is electrically connected with the induction antenna and the scanning driving circuit respectively;
the working state of the display panel comprises a first state;
in the first state, the control module is used for controlling the induction antenna to work and controlling the scanning driving unit to output a non-effective level signal.
On the other hand, an embodiment of the present invention provides a driving method of a display panel, where the display panel includes:
an inductive antenna;
a plurality of pixel driving circuits including a scan control signal terminal and a light emission control signal terminal;
the scanning driving circuit comprises a plurality of cascaded scanning driving units, and the output end of each scanning driving unit transmits a scanning control signal to the scanning control signal end;
the working state of the display panel comprises a first state; the driving method includes:
and under the first state, controlling the induction antenna to work and controlling the scanning driving unit to output a non-effective level signal.
In another aspect, an embodiment of the present invention provides a display device, including the display panel described above.
According to the display panel, the driving method thereof and the display device provided by the embodiment of the invention, the control module is arranged, and the control module is electrically connected with the induction antenna and the scanning driving circuit, so that in the first state, the control module can be utilized to control the induction antenna to work and control the scanning driving unit in the scanning driving circuit to output an ineffective level signal in the first state, the scanning control unit in the pixel driving circuit can be ensured to be in a turn-off state when the induction antenna works, and the problem of screen splash of the display panel in the first state can be avoided.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a display module according to an embodiment of the invention;
FIG. 3 is a schematic diagram of an equivalent circuit of a sub-pixel according to an embodiment of the present invention;
fig. 4 is a timing diagram illustrating an operation of a display panel according to an embodiment of the invention;
FIG. 5 is a schematic diagram of a scan driving circuit according to an embodiment of the present invention;
fig. 6 is a circuit diagram of a scan driving unit according to an embodiment of the present invention;
FIG. 7 is a timing diagram illustrating an operation of a scan driving circuit according to an embodiment of the present invention;
FIG. 8 is a timing diagram illustrating an operation of another scan driving circuit according to an embodiment of the present invention;
fig. 9 is a schematic diagram illustrating a driving method of a display panel according to an embodiment of the invention;
fig. 10 is a schematic diagram of a display device according to an embodiment of the present invention.
[ detailed description ] A
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
It should be understood that although the terms first, second, etc. may be used to describe the first level signal terminal and the second level signal terminal in the embodiments of the present invention, these signal terminals should not be limited to these terms. These terms are only used to distinguish signal terminals transmitting different levels from each other. For example, the first level signal terminal may also be referred to as the second level signal terminal, and similarly, the second level signal terminal may also be referred to as the first level signal terminal without departing from the scope of the embodiments of the present invention.
An embodiment of the present invention provides a display panel, as shown in fig. 1, fig. 1 is a schematic diagram of a display panel provided in an embodiment of the present invention, where the display panel includes an antenna module 1, a display module 2, and a control module 3. The control module 3 is electrically connected to the antenna module 1 and the display module 2, respectively.
The antenna module 1 comprises an inductive antenna. Optionally, in the embodiment of the present invention, the operating frequency of the induction antenna may be a high frequency, or may also be a low frequency. Illustratively, the inductive antenna comprises a near field communication antenna (NFC).
Optionally, as shown in fig. 2, fig. 2 is a schematic diagram of a display module according to an embodiment of the present invention, where the display module 2 includes a plurality of sub-pixels 20. As shown in fig. 3, fig. 3 is an equivalent circuit schematic diagram of a sub-pixel according to an embodiment of the present invention, and the sub-pixel 20 includes a light emitting element 201 and a pixel driving circuit 202 coupled to each other. Illustratively, the light emitting element 201 includes any one or more of an organic light emitting diode, an inorganic light emitting diode, and a quantum dot light emitting diode.
As shown in fig. 3, the pixel drive circuit 202 includes a scan control unit 4 and a scan control signal terminal S. The scanning control signal terminal S is electrically connected to the scanning control unit 4, and the scanning control signal transmitted by the scanning control signal terminal S is used for controlling the on/off of the scanning control unit 4. When the scan control unit 4 is turned on, the pixel drive circuit 202 can perform functional operations such as initialization, data writing, or threshold compensation.
Alternatively, the number of the scan control signal terminals S in the pixel driving circuit 202 may be one or more, and correspondingly, the number of the scan control units 4 may also be one or more. Illustratively, as shown in fig. 3, the scan control signal terminal S includes a first scan control signal terminal S1 and a second scan control signal terminal S2. The scanning control unit 4 includes a first scanning control unit 41 and a second scanning control unit 42. The first scan control unit 41 is electrically connected to the first scan control signal terminal S1. The second scan control unit 42 is electrically connected to the second scan control signal terminal S2.
Illustratively, as shown in fig. 3, the pixel driving circuit 202 includes a driving transistor M0 having a control electrode electrically connected to a first node N1, a first electrode electrically connected to a second node N2, and a second electrode electrically connected to a third node N3. The first scan control unit 41 electrically connects the first initialization signal terminal Vref1 and the first node N1. The first initialization signal terminal Vref1 can initialize the first node N1 through the first scan control unit 41 under the action of the first scan control signal terminal S1. The second scan control unit 42 may include a data writing sub-unit 421, a threshold compensating sub-unit 422, and a light emitting element initializing sub-unit 423. As shown in fig. 3, the data writing subunit 421 electrically connects the data signal terminal Vdata and the second node N2. The threshold compensation subunit 422 electrically connects the third node N3 and the first node N1. The light emitting element initialization sub-unit 423 electrically connects the second initialization signal terminal Vref2 and the light emitting element 201. It should be noted that the electrical connection between the second scan control signal terminal S2 and the light emitting element initialization subunit 423 shown in fig. 3 is only an illustration, and in fact, the initialization of the light emitting element 201 and the execution of the data writing operation by the pixel driving circuit may or may not occur at the same time, which is not limited by the embodiment of the present invention.
As shown in fig. 2, the display module 2 further includes a scan driving circuit 21. The scan driving circuit 21 includes a plurality of scan driving units 210 cascaded with each other. Five scan driving units 210_1, 210_2, 210_3, 210_4, and 210_5 are illustrated in fig. 2. The scan driving unit 210 is electrically connected to a scan control signal terminal S in the corresponding pixel driving circuit 202.
In the embodiment of the present invention, the control module 3 is electrically connected to the antenna module 1 and the display module 2, respectively. Specifically, the control module 3 is electrically connected to the sensing antenna in the antenna module 1 and the scan driving circuit 21 in the display module 2, respectively.
The working state of the display panel provided by the embodiment of the invention comprises a first state and a second state. When the display panel is in operation, in the first state, the control module 3 controls the sensing antenna in the antenna module 1 to operate, and controls the scan driving unit 210 in the display module 2 to output an inactive level signal. The inactive level output by the scan driving unit 210 is a signal for turning off the scan control unit 4 in the corresponding pixel driving circuit 202. Alternatively, as shown in fig. 3, the embodiment of the invention may configure the first scan control unit 41 to include the first transistor M1, and configure the second scan control unit 42 to include the second transistor M2, the third transistor M3, and the fourth transistor M4. At this time, the inactive level output by the scan driving unit 210 is a signal for turning off the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4.
Referring to fig. 4, fig. 4 is a timing diagram of the operation of the display panel according to the embodiment of the present invention, wherein 210_1, 210_2, and 210_3 respectively represent an output signal of the first-stage scan driving unit 210_1, an output signal of the second-stage scan driving unit 210_2, and an output signal of the third-stage scan driving unit 210_ 3. As shown in fig. 4, each of the scan driving units 210 outputs an inactive level in the first state.
According to the display panel provided by the embodiment of the invention, by arranging the control module 3 and enabling the control module 3 to be electrically connected with the induction antenna and the scanning driving circuit 21, in the first state, the control module 3 controls the induction antenna to work and controls the scanning driving unit 210 in the scanning driving circuit 21 to output an invalid level signal in the first state, so that when the induction antenna works, the scanning control unit 4 in the pixel driving circuit 202 is in a turn-off state, and the problem of screen flashing of the display panel in the first state can be avoided.
Illustratively, as shown in fig. 2 and 3, the pixel driving circuit 202 further includes a light emission control unit 5 and a light emission control signal terminal E. The light-emitting control signal terminal E is used for controlling the on/off of the light-emitting control unit 5. When the light emission control unit 5 is turned on, a current flows through the light emitting element 201 to turn on the light emitting element 201.
With continued reference to fig. 2, the display module 2 further includes a light emission driving circuit 22 and a data driving circuit 23. The data driving circuit 23 is electrically connected to the data signal terminal Vdata in the pixel driving circuit 202. The light emission driving circuit 22 includes a plurality of cascade-connected light emission driving units 220. Fig. 2 illustrates four light-emission driving units 220_1, 220_2, 220_3, and 220_ 4. An output terminal of the light emission driving unit 220 transmits a light emission control signal to the light emission control signal terminal E in the pixel driving circuit 202.
In the embodiment of the present invention, the control module 3 is further electrically connected to the light emitting driving circuit 22 in the display module 2.
In the first state, as shown in fig. 2 and fig. 4, the embodiment of the invention may further enable the control module to control the light-emitting driving unit 220 to output a pulse signal including an active level signal. Here, the active level signal refers to a signal capable of turning on the light emission control unit 5 in the pixel driving circuit 202 electrically connected to the light emission driving unit 220. With this arrangement, the pixel driving circuit 202 in the first state can be operated in the light-emitting period in which the light-emitting element 201 emits light. As shown in fig. 3, the embodiment of the present invention may provide the light emission control unit 5 to include a fifth transistor M5 and a sixth transistor M6. The fifth transistor M5 is used to electrically connect the power supply voltage terminal PVDD to the second node N2, and the sixth transistor M6 is used to electrically connect the third node N3 to the light emitting element 201. At this time, the active level signal output by the light emitting driving unit 220 is a signal to turn on the fifth transistor M5 and the sixth transistor M6. With such an arrangement, in the first state of the induction antenna being turned on, the embodiment of the present invention enables the light emitting control unit 5 to be turned on, so that the light emitting current flows through the light emitting element 201, and the light emitting element 201 can still be turned on in the first state, so that the display panel can still display the picture without being in the black state while the induction antenna is turned on.
Moreover, for any pixel driving circuit in the display panel, the embodiment of the invention can ensure that the effective level of the scan control signal electrically connected to the pixel driving circuit 202 does not overlap with the effective level of the emission control signal by enabling the emission driving unit 220 electrically connected to the pixel driving circuit 202 to output the effective level in the first state and enabling the scan driving unit 210 electrically connected to the pixel driving circuit 202 to output the inactive level in the first state, thereby ensuring the stability of the display screen without the problem of flash.
Illustratively, the operating state of the display panel further includes a second state. With reference to fig. 4, in the second state, the embodiment of the present invention may enable the control module to control the sensing antenna to be turned off, and control each scan driving unit 210 in the scan driving circuit 21 to sequentially output the pulse signal including the active level signal. Here, the active level signal refers to a signal capable of turning on the scan control unit 4 in the pixel drive circuit 202. With this arrangement, the pixel driving circuit 202 can perform the initialization, data writing, threshold compensation, and other functional operations in the second state, and the light emitting effect of the light emitting element 201 can be improved. It should be noted that, in the second state, the time of the active level signal output by the scan driving unit 210 may be adjusted according to different operation requirements of the pixel driving circuit 202, which is not limited in the embodiment of the present invention.
In the second state, the embodiment of the present invention may further cause the control module to control each light-emitting driving unit 220 in the light-emitting driving circuit 22 to sequentially output the pulse signal including the active level signal. Here, the active level signal refers to a signal capable of turning on the light emission control unit 5 in the pixel driving circuit 202 to enable the pixel driving circuit 202 to perform a light emission operation in the second state. As shown in fig. 4, 220_1, 220_2 and 220_3 therein respectively represent an output signal of the first-stage light-emission driving unit 220_1, an output signal of the second-stage light-emission driving unit 220_2 and an output signal of the third-stage light-emission driving unit 220_ 3.
For example, in the embodiment of the present invention, the pulse width and the period of the signal output by the light emission driving unit 220 in the first state and the pulse width and the period of the signal output in the second state may be the same.
When the pixel driving circuit 202 includes the first scanning control signal terminal S1 and the second scanning control signal terminal S2, for example, as shown in fig. 2 and fig. 3, in the embodiment of the invention, the first scanning control signal terminal S1 of the ith pixel driving circuit row is electrically connected to the ith scanning driving unit 210_ i, the second scanning control signal terminal S2 of the ith pixel driving circuit row is electrically connected to the (i +1) th scanning driving unit 210_ (i +1), and the light emitting control signal terminal of the ith pixel driving circuit row is electrically connected to the ith light emitting driving unit 220_ i. Wherein i is more than or equal to 2 and less than or equal to M, M is the row number of the sub-pixels, and one sub-pixel row can be connected to the same scanning control signal line. i is an integer. With this arrangement, in the case where two scan control signal terminals are provided in the pixel drive circuit 202, signals of the two scan control signal terminals can be supplied only by one set of the scan drive circuits 21, and the number of scan drive circuits can be reduced. As can be seen from fig. 2, 3 and 4, the first scan control signal terminal S1 of the 1 st pixel driving circuit row is electrically connected to the 1 st scan driving unit 210_1, and the second scan control signal terminal S2 of the 1 st pixel driving circuit row is electrically connected to the 2 nd scan driving unit 210_ 2. The light emission control signal terminal E of the 1 st pixel driving circuit row is electrically connected to the 1 st-stage light emission driving unit 220_ 1.
In the embodiment of the present invention, in the second state, the control module 3 may control the effective level signals output by the scan driving unit 210 and the light-emitting driving unit 220 electrically connected to the same pixel driving circuit 202 to be staggered with each other, so that the functional phase of the on operation of the scan control unit 4 and the light-emitting phase of the on operation of the light-emitting control unit 5 in the pixel driving circuit 202 are performed in a time-sharing manner in the working period of the pixel driving circuit 202.
Illustratively, as shown in fig. 3 and 4, in the second state, one duty cycle of the control module controlling the pixel driving circuit 202 includes a functional phase t1 and a light-emitting phase t2, and the functional phases include an initialization phase t11 and a data writing and threshold compensating phase t 12.
In the initialization stage t11, the first scan control signal terminal S1 receives an active level signal provided by the scan driving unit 210_ 1. The first initialization signal terminal Vref1 initializes the first node N1 through the first transistor M1. The second scan control signal terminal S2 receives the inactive level outputted by the scan driving unit 210_2, and the light-emitting control signal terminal E receives the inactive level outputted by the light-emitting driving unit 220_ 1.
In the data writing and threshold compensation stage t12, the second scan control signal terminal S2 receives the active level signal outputted by the scan driving unit 210_2, the second transistor M2, the third transistor M3 and the fourth transistor M4 are turned on, and the data signal terminal Vdata writes the data signal into the second node N2 through the third transistor M3 and charges the first node N1 through the driving transistor M0 and the second transistor M2 until VN1The potential of the control electrode of the driving transistor M0 is related to the threshold voltage of the driving transistor M0. The second initialization signal terminal Vref2 initializes the first electrode of the light emitting element 201 through the fourth transistor M4. The first scan control signal terminal S1 receives the inactive level outputted by the scan driving unit 210_1, and the light-emitting control signal terminal E receives the inactive level outputted by the light-emitting driving unit 220_ 1.
In the light-emitting period t2, the light-emitting control signal terminal E receives the active level signal provided by the light-emitting driving unit 220_1, and the fifth transistor M5 and the sixth transistor M6 are turned on. The first node N1 holds VN1＝Vdata-|Vth|，VN2＝VPVDD. The driving transistor M0 is turned on, and a current controlled by the potential of the first node N1 flows through the light-emitting element 201, so that the light-emitting element 201 is lit. The first scan control signal terminal S1 receives the inactive level outputted by the scan driving unit 210_1, and the second scan control signal terminal S2 receives the inactive level outputted by the scan driving unit 210_ 2.
It can be seen that in the second state, the active level of the scanning control signal terminal S and the active level of the light emission control signal terminal E, which are electrically connected to the pixel driving circuit 202, are staggered from each other. The active level of the scan control signal terminal S overlaps with the inactive level of the emission control signal terminal E, and the width of the inactive level of the emission control signal terminal E covers the width of the active level of the scan control signal terminal S. That is, in the second state, at different operation stages of the pixel driving circuit 202, the scan driving circuit 21 and the light-emitting driving circuit 22 input corresponding control signals to the first scan control signal terminal S1, the second scan control signal terminal S2 and the light-emitting control signal terminal E of the pixel driving circuit 202, and control the pixel driving circuit 202 to complete the operations at different stages.
It should be noted that the pixel driving circuit shown in fig. 3 and the types of the respective transistors therein are merely illustrative. In the embodiment of the present invention, the pixel driving circuit shown in fig. 3 may also be designed into other structures according to different design requirements of the display panel, or some or all of the transistors may also be N-type transistors, which is not limited in the embodiment of the present invention.
Optionally, the working state of the display panel includes a plurality of second states, and in the embodiment of the present invention, at least one of the second states may be located before the first state. After the display panel enters the first state after the second state, the data written by the pixel driving circuit 202 in the second state can be maintained in the first state, so that in the first state, the display module 2 can maintain the display of the last frame of picture before the display sensing antenna operates.
For example, as shown IN fig. 5, fig. 5 is a schematic diagram of a scan driving circuit according to an embodiment of the present invention, IN the scan driving circuit 21, each stage of the scan driving units 210 includes an input signal terminal IN, a first level signal terminal V1, a second level signal terminal V2, a first clock signal terminal CK1, a second clock signal terminal CK2, and an output signal terminal OUT.
The scan driving circuit 21 further includes a start input line STV, a first clock signal line CK, a second clock signal line XCK, a first level signal line VGH, and a second level signal line VGL.
The input signal terminal IN of the first stage scan driving unit 210 is electrically connected to the start input line STV. The input signal terminal IN of the other stage scan driving unit 210 is electrically connected to the output signal terminal OUT of the previous stage scan driving unit 210.
The first clock signal line CK is electrically connected to the first clock signal terminal CK1 of the odd-numbered scan driving unit 210 and the second clock signal terminal CK2 of the even-numbered scan driving unit, respectively; the second clock signal line XCK is electrically connected to the second clock signal terminal CK2 of the odd-numbered scan driving unit and the first clock signal terminal CK1 of the even-numbered scan driving unit, respectively.
The first level signal line VGH is electrically connected to the first level signal terminal V1 of each stage of the scan driving unit 210. The second level signal line VGL is electrically connected to the second level signal terminal V2 of each stage of the scan driving unit 210.
The output signal terminal OUT of each stage of the scanning driving unit 210 in the scanning driving circuit 21 is electrically connected to the scanning control signal terminal S of the corresponding pixel driving circuit 202.
Exemplarily, as shown in fig. 6, fig. 6 is a schematic circuit diagram of a scan driving unit according to an embodiment of the present invention, and the scan driving unit 210 includes a first processing unit 211, a second processing unit 212, a first output unit 2101, and a second output unit 2102.
The first processing unit 211 is configured to provide a signal provided from the second level signal terminal V2 to the first node N1 in response to a signal of the first clock signal terminal CK1, and to provide a signal of the first clock signal terminal CK1 to the second node N2 in response to a signal of the third node N3. Illustratively, the first processing unit 211 includes a first transistor M21 and a second transistor M22, a control electrode of the first transistor M21 is electrically connected to the third node N3, a first electrode is electrically connected to the first clock signal terminal CK1, and a second electrode is electrically connected to the first node N1. The control electrode of the second transistor M22 is electrically connected to the first clock signal terminal CK1, the first electrode is electrically connected to the second level signal terminal V2, and the second electrode is electrically connected to the first node N1.
The second processing unit 212 is configured to respond to signals of the first clock signal terminal CK1 and the second clock signal terminal CK2 to provide a signal transmitted by the input signal terminal IN to the second node N2, and to provide a signal transmitted by the first level signal terminal V1 to the second node N2. Illustratively, as shown in fig. 6, the second processing unit 212 includes a third transistor M23, a fourth transistor M24, and a fifth transistor M25. A control electrode of the third transistor M23 is electrically connected to the first clock signal terminal CK1, a first electrode thereof is electrically connected to the input signal terminal IN, and a second electrode thereof is electrically connected to the third node N3. A control electrode of the fourth transistor M24 is electrically connected to the first node N1, and a control electrode of the fifth transistor M25 is electrically connected to the second clock signal terminal CK 2. A first pole of the fourth transistor M24 is electrically connected to the first level signal terminal V1, a second pole of the fourth transistor M24 is electrically connected to a first pole of the fifth transistor M25, and a second pole of the fifth transistor M25 is electrically connected to the third node N3.
In the embodiment of the present invention, the first output unit 2101 may be a unit that sets the scan control signal output by the scan driving unit 210 to a non-active level. As shown in fig. 6, the first output unit 2101 is electrically connected between the first level signal terminal V1 and the output signal terminal OUT. The first output unit 2101 supplies a voltage of a first level signal terminal V1 to an output signal terminal OUT of the scan driving unit 210 in response to a signal of a first node N1. Illustratively, as shown in fig. 6, the first output unit 2101 includes a sixth transistor M26 having a control electrode electrically connected to the first node N1, a first electrode electrically connected to the first level signal terminal V1, and a second electrode electrically connected to the output signal terminal OUT.
In the embodiment of the present invention, the second output unit 2102 may be a unit which sets the scan control signal output by the scan driving unit 210 to an active level. As shown in fig. 6, the second output unit 2102 is electrically connected between the second clock signal terminal CK2 and the output signal terminal OUT, and the second output unit 2102 supplies the signal of the second clock signal terminal CK2 to the output signal terminal OUT of the scan driving unit 210 in response to the signal of the second node N2.
For example, as shown in fig. 6, the scan driving unit 210 may further include an eighth transistor M28 having a control electrode electrically connected to the second level signal terminal V2, a first electrode electrically connected to the third node N3, and a second electrode electrically connected to the second node N2.
Illustratively, as shown in fig. 5, the control module 3 includes a start input control unit 31, and the start input control unit 31 is electrically connected to the start input line STV.
As shown in fig. 7, fig. 7 is an operation timing diagram of a scan driving circuit according to an embodiment of the present invention, and in a first state, a start input control unit (not shown in fig. 7) controls a start input line STV to transmit an inactive level signal. The inactive level is a signal for turning off the second output unit 2102 in the scan driving unit.
Under the effect of the inactive level transmitted by the start input control unit 31, as shown in fig. 6 and 7, the second output unit 2102 electrically connected to the second clock signal terminal CK2 in the first stage scan driving unit 210_1 can be turned off, so that the active level output provided by the second clock signal terminal CK2 in the first stage scan driving unit 210_1 for turning on the scan control unit 4 can be avoided. Since the scan driving units 210 of each stage in the scan driving circuit 21 are cascaded with each other, the active level output provided by the second clock signal terminal CK2 in the scan driving units 210 of other stages to turn on the scan control unit 4 can be avoided, so that the non-light emitting operation such as data writing or initialization caused by the selection of each sub-pixel can be avoided, and the occurrence of the flash on the display panel can be avoided.
For example, the level of the signal transmitted by the start input line STV in the first state may be greater than or equal to the turn-off voltage of the transistor in the second output unit 2102, so that the second output unit 2102 can be turned off in the first state after the signal transmitted by the start input line STV fluctuates due to the interference of the inductive antenna. Illustratively, the level transmitted by the start input line STV in the first state is equal to or greater than 6V.
In the second state, with continued reference to fig. 7, the start input control unit controls the start input line STV to transmit a pulse signal including an active level signal. Here, the active level signal refers to a signal capable of turning on the second output unit 2102 in the scan driving unit. In the second state, the duration of the active level signal transmitted by the start input line STV may be adjusted according to different design requirements of the display panel, which is not limited in the embodiment of the present invention.
Optionally, as shown in fig. 5, the control module 3 further includes a first clock control unit 32 and a first clock control unit 33, the first clock control unit 32 is electrically connected to the first clock signal line CK, and the first clock control unit 33 is electrically connected to the second clock signal line XCK.
In the first state, in the case that the start input control unit 31 controls the start input line STV to transmit the inactive level signal, the embodiment of the present invention may further cause the first clock control unit 32 to control the first clock signal line CK to transmit the constant high voltage signal or the constant low voltage signal, and cause the second clock control unit to control the second clock signal line XCK to transmit the constant high voltage signal or the constant low voltage signal. As shown in fig. 8, fig. 8 is a timing diagram illustrating that the first clock signal line CK transmits a constant high voltage signal in the first state and the second clock signal line XCK transmits a constant low voltage signal in the first state, so that the scan driving unit 210 can stably output an inactive level signal in the first state according to another embodiment of the present invention. For example, the constant high level signals transmitted by the first clock signal line CK and the second clock signal line XCK in the first state may be equal to or greater than the turn-off voltage of the processing unit connected to the first clock signal line CK and the second clock signal line XCK in the scan driving unit 210, and thus the scan driving unit 210 can stably output the inactive level in the first state.
In the second state, as shown in fig. 7 and 8, the embodiment of the present invention may further cause the first clock control unit (not shown in fig. 7 and 8) to control the first clock signal line CK to transmit the pulse signal, and cause the second clock control unit to control the second clock signal line XCK to transmit the pulse signal; wherein, when the first clock signal line CK transmits an active level signal, the second clock signal line XCK transmits a non-active level signal; when the second clock signal line XCK transmits an active level signal, the first clock signal line CK transmits a non-active level signal. The active level transmitted by the first clock signal line CK is a signal for turning on a processing unit connected to the first clock signal line CK in the scan driving unit 210. The second clock signal line XCK transmits an inactive level signal to turn off the processing unit connected to the second clock signal line XCK in the scan driving unit 210. So configured, the scan driving unit 210 can be enabled to normally output the pulse signal including the active level in the second state.
For example, as shown in fig. 8, in the second state, the embodiment of the present invention may overlap the active level transmitted by the start input line STV and the active level transmitted by the first clock signal line CK. In the second state, under the combined action of the signals transmitted by the start input line STV, the first clock signal line CK and the second clock signal line XCK, the output signal of each stage of the scan driving unit 210 in the scan driving circuit 21 can be shifted relative to the previous stage of the scan driving unit 210.
The operation of the first stage scan driving unit 210_1 in the second state is described below with reference to fig. 6 and 7:
IN the first stage h1, a low level supplied from the first clock signal line CK is written into the first clock signal terminal CK1, which controls the second transistor M22 and the third transistor M23 to be turned on, and a low level supplied from the start input line STV is written into the input signal terminal IN, which lowers the potentials of the third node N3 and the second node N2 through the turned-on third transistor M23, thereby turning on the seventh transistor M27 and the first transistor M21. The low level provided by the first clock signal terminal CK1 lowers the potential of the first node N1 through the turned-on first transistor M21, and the low level provided by the second level signal terminal V2 lowers the electrical position of the first node N1 through the turned-on second transistor M22, so that the fourth transistor M24 and the sixth transistor M26 are turned on. The high level output from the first level signal terminal V1 makes the output signal terminal OUT output a high level through the turned-on sixth transistor M26; the high level provided by the second clock signal terminal CK2 makes the output signal terminal OUT stably output the high level through the turned-on seventh transistor M27.
In the second phase h2, the high level provided by the first clock signal line CK is written into the first clock signal terminal CK1, and the high level controls the second transistor M22 and the third transistor M23 to be turned off. The second node N2 can maintain the low voltage of the first stage h1 under the action of the second capacitor C2, so that the seventh transistor M27 and the first transistor M21 are turned on. The low level provided by the second clock signal line XCK puts the second clock signal terminal CK2 low, which makes the output signal terminal OUT output a low level through the turned-on seventh transistor M27. Meanwhile, the potential of the second node N2 can be further pulled down by the coupling effect of the second capacitor C2, so that the low-level signal of the second clock signal terminal CK2 can be completely output through the turned-on seventh transistor M27. At this stage, the high level provided by the first clock signal terminal CK1 can set the potential of the first node N1 high through the first transistor M21, so that the sixth transistor M26 and the fourth transistor M24 are turned off.
IN the third stage h3, the first clock signal line CK supplies a low level to the first clock signal terminal CK1, so that the second transistor M22 and the third transistor M23 are turned on, and a high level supplied from the input line STV is started to be written into the input signal terminal IN, which high level puts the potentials of the third node N3 and the second node N2 high via the turned-on third transistor M23, so that the seventh transistor M27 and the first transistor M21 are turned off. The low level provided by the second level signal terminal V2 lowers the electrical position of the first node N1 through the turned-on second transistor M22, so that the fourth transistor M24 and the sixth transistor M26 are turned on, and the high level signal provided by the first level signal terminal V1 makes the output signal terminal OUT output a high level through the turned-on sixth transistor M26. In this process, the second clock signal terminal CK2 transmits a high level, so that the fifth transistor M25 is turned off.
In the fourth stage h4, the first clock signal line CK supplies a high level to the first clock signal terminal CK1, which controls the second transistor M22 and the third transistor M23 to be turned off. The first node N1 maintains the low voltage level of the third stage h3 by the coupling effect of the first capacitor C1, so that the fourth transistor M24 and the sixth transistor M26 are turned on, and the high level signal provided by the first level signal terminal V1 enables the output signal terminal OUT to output the high level through the turned-on sixth transistor M26. In this process, the second clock signal terminal CK2 transmits a low level signal to turn on the fifth transistor M25, and the high level output from the first level signal terminal V1 puts the potentials of the second node N2 and the third node N3 high via the turned-on fourth transistor M24 and the turned-on fifth transistor M25, so that the seventh transistor M27 and the first transistor M21 are turned off.
Thereafter, the operations of the third stage h3 and the fourth stage h4 are alternately performed until the input signal terminal IN receives the next low level.
Fig. 9 is a schematic diagram of a driving method of a display panel according to an embodiment of the present invention, where the display panel includes an antenna module 1, a display module 2, and a control module 3, and is shown in fig. 1, fig. 2, fig. 4, and fig. 9. The antenna module 1 comprises an inductive antenna. The display module 2 includes a scan driving circuit 21 and a plurality of pixel driving circuits 202, and the pixel driving circuits 202 include a scan control signal terminal S and a light emission control signal terminal E; the scan driving circuit 21 includes a plurality of scan driving units 210 connected in cascade, and an output terminal of the scan driving unit 210 transmits a scan control signal to a scan control signal terminal S.
The working state of the display panel comprises a first state, and the driving method of the display panel provided by the embodiment of the invention comprises the following steps:
step S1: and under the first state, controlling the induction antenna to work and controlling the scanning driving unit to output a non-effective level signal.
According to the driving method of the display panel provided by the embodiment of the invention, the induction antenna is controlled to work in the first state, and the scanning driving unit in the scanning driving circuit is controlled to output the non-effective level signal in the first state, so that the scanning control unit in the pixel driving circuit can be ensured to be in the off state when the induction antenna works, and the problem of screen flashing of the display panel in the first state can be avoided.
Alternatively, as shown in fig. 5, the scan driving circuit 21 further includes a start input line STV; the start input line STV is electrically connected to the input signal terminal IN of the first stage scan driving unit 210; the controlling the scan driving unit to output the inactive level signal in the first state in the above step S1 includes: in the first state, the start input line STV is controlled to transmit an inactive level signal.
With continued reference to fig. 5, the scan driving circuit 21 further includes a first clock signal line CK and a second clock signal line XCK; the first clock signal line CK is electrically connected to the first clock signal terminal CK1 of the odd-numbered scan driving unit 210 and the second clock signal terminal CK2 of the even-numbered scan driving unit 210, respectively; the second clock signal line XCK is electrically connected to the second clock signal terminal CK2 of the odd-numbered scan driving unit 210 and the first clock signal terminal CK1 of the even-numbered scan driving unit 210, respectively. The step S1 of controlling the scan driving unit 210 to output the inactive level signal in the first state further includes: in the first state, the first clock signal line CK is controlled to transmit a constant high voltage signal or a constant low voltage signal, and the second clock signal line XCK is controlled to transmit a constant high voltage signal or a constant low voltage signal.
Optionally, as shown in fig. 4, the working state of the display panel further includes a second state; the driving method provided by the embodiment of the invention further comprises the following steps: in the second state, the sensing antenna is controlled to be turned off, and the scan driving unit 210 is controlled to output an active level signal.
Illustratively, in the embodiment of the present invention, controlling the scan driving unit 210 to output the active level signal in the second state includes: in a second state, the start input line is controlled to transmit an active level signal.
Exemplarily, in an embodiment of the present invention, controlling the scan driving unit 210 to output the inactive level signal in the second state further includes:
in a second state, the first clock signal line CK and the second clock signal line XCK are controlled to transmit pulse signals; and, when the first clock signal line CK transmits an active level signal, the second clock signal line XCK transmits an inactive level signal, and when the second clock signal line XCK transmits an active level signal, the first clock signal line CK transmits an inactive level signal.
Optionally, as shown in fig. 2, the display panel further includes a light-emitting driving circuit 22, the light-emitting driving circuit 22 includes a plurality of cascaded light-emitting driving units 220, and an output end of the light-emitting driving unit 220 transmits a light-emitting control signal to a light-emitting control signal end E. In the embodiment of the present invention, the control module 3 is further electrically connected to the light emitting driving circuit; the driving method of the display panel provided by the embodiment of the invention further comprises the following steps: in the first state, the light emission control unit is controlled to output an active level signal.
The specific driving process of the display panel in different working states has been described in detail in the above embodiments, and is not described herein again.
As shown in fig. 10, fig. 10 is a schematic view of a display device according to an embodiment of the present invention, where the display device includes the display panel 1000. The specific structure of the display panel 100 has been described in detail in the above embodiments, and is not described herein again. Of course, the display device shown in fig. 10 is only a schematic illustration, and the display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic book, or a television.
Optionally, the display device further includes an antenna control chip and a display control chip, the antenna control chip is electrically connected to the sensing antenna, and the display control chip is electrically connected to the scan driving circuit. In the embodiment of the present invention, the control module 3 may be integrated in the antenna control chip or the display control chip to improve the integration of the display device.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (16)
1. A display panel, comprising:
an inductive antenna;
a plurality of pixel driving circuits including a scan control signal terminal and a light emission control signal terminal;
the scanning driving circuit comprises a plurality of cascaded scanning driving units, and the output end of each scanning driving unit transmits a scanning control signal to the scanning control signal end;
a control module; the control module is electrically connected with the induction antenna and the scanning driving circuit respectively;
the working state of the display panel comprises a first state;
in the first state, the control module is used for controlling the induction antenna to work and controlling the scanning driving unit to output a non-effective level signal.
2. The display panel according to claim 1,
the scan driving circuit further includes a start input line; the starting input line is electrically connected with an input signal end of the first-stage scanning driving unit;
the control module comprises a starting input control unit which is electrically connected with the starting input line; in the first state, the start input control unit is used for controlling the start input line to transmit an inactive level signal.
3. The display panel according to claim 2,
the scanning driving circuit also comprises a first clock signal line and a second clock signal line;
the first clock signal line is respectively and electrically connected with a first clock signal end of the odd-numbered scanning driving unit and a second clock signal end of the even-numbered scanning driving unit; the second clock signal line is respectively and electrically connected with a second clock signal end of the odd-numbered scanning driving unit and a first clock signal end of the even-numbered scanning driving unit;
the control module further comprises a first clock control unit and a second clock control unit, wherein the first clock control unit is electrically connected with the first clock signal line, and the second clock control unit is electrically connected with the second clock signal line;
in the first state, the first clock control unit is configured to control the first clock signal line to transmit a constant high voltage signal or a constant low voltage signal, and the second clock control unit is configured to control the second clock signal line to transmit a constant high voltage signal or a constant low voltage signal.
4. The display panel according to claim 1,
the working state of the display panel also comprises a second state;
in the second state, the control module is further configured to control the sensing antenna to be turned off, and control the scan driving unit to output an active level signal.
5. The display panel according to claim 4,
the scan driving circuit further includes a start input line; the starting input line is electrically connected with an input signal end of the first-stage scanning driving unit;
the control module comprises a starting input control unit which is electrically connected with the starting input line; in the second state, the start input control unit is used for controlling the start input line to transmit an active level signal.
6. The display panel according to claim 5,
the scanning driving circuit also comprises a first clock signal line and a second clock signal line;
the first clock signal line is respectively and electrically connected with a first clock signal end of the odd-numbered scanning driving unit and a second clock signal end of the even-numbered scanning driving unit; the second clock signal line is respectively and electrically connected with a second clock signal end of the odd-numbered scanning driving unit and a first clock signal end of the even-numbered scanning driving unit;
the control module further comprises a first clock control unit and a second clock control unit, wherein the first clock control unit is electrically connected with the first clock signal line, and the second clock control unit is electrically connected with the second clock signal line;
in the second state, the first clock control unit is used for controlling the first clock signal line to transmit a pulse signal, and the second clock control unit is used for controlling the second clock signal line to transmit a pulse signal; and, when the first clock signal line transmits an active level signal, the second clock signal line transmits a non-active level signal, and when the second clock signal line transmits an active level signal, the first clock signal line transmits a non-active level signal.
7. The display panel according to claim 1, further comprising:
the light-emitting driving circuit comprises a plurality of cascaded light-emitting driving units, and the output end of each light-emitting driving unit transmits a light-emitting control signal to the light-emitting control signal end;
the control module is also electrically connected with the light-emitting drive circuit; the control module is further used for controlling the light-emitting driving unit to output an effective level signal in the first state.
8. A driving method of a display panel, the display panel comprising:
an inductive antenna;
a plurality of pixel driving circuits including a scan control signal terminal and a light emission control signal terminal;
the scanning driving circuit comprises a plurality of cascaded scanning driving units, and the output end of each scanning driving unit transmits a scanning control signal to the scanning control signal end;
the working state of the display panel comprises a first state; the driving method includes:
and under the first state, controlling the induction antenna to work and controlling the scanning driving unit to output a non-effective level signal.
9. The driving method according to claim 8,
the scan driving circuit further includes a start input line; the starting input line is electrically connected with an input signal end of the first-stage scanning driving unit;
controlling the scan driving unit to output a non-active level signal in the first state, including:
in the first state, the start input line is controlled to transmit an inactive level signal.
10. The driving method according to claim 9, wherein the scan driving circuit further includes a first clock signal line and a second clock signal line; the first clock signal line is respectively and electrically connected with a first clock signal end of the odd-numbered scanning driving unit and a second clock signal end of the even-numbered scanning driving unit; the second clock signal line is respectively and electrically connected with a second clock signal end of the odd-numbered scanning driving unit and a first clock signal end of the even-numbered scanning driving unit;
controlling the scan driving unit to output a non-active level signal in the first state further comprises:
and in the first state, controlling the first clock signal line to transmit a constant high voltage signal or a constant low voltage signal, and controlling the second clock signal line to transmit a constant high voltage signal or a constant low voltage signal.
11. The driving method according to claim 8,
the working state of the display panel also comprises a second state;
the driving method further includes:
and under the second state, the induction antenna is controlled to be closed, and the scanning driving unit is controlled to output an effective level signal.
12. The driving method according to claim 11,
the scan driving circuit further includes a start input line; the starting input line is electrically connected with an input signal end of the first-stage scanning driving unit;
controlling the scan driving unit to output an active level signal in the second state, including:
and in the second state, controlling the starting input line to transmit an effective level signal.
13. The driving method according to claim 12, wherein the scan driving circuit further includes a first clock signal line and a second clock signal line;
the first clock signal line is respectively and electrically connected with a first clock signal end of the odd-numbered scanning driving unit and a second clock signal end of the even-numbered scanning driving unit; the second clock signal line is respectively and electrically connected with a second clock signal end of the odd-numbered scanning driving unit and a first clock signal end of the even-numbered scanning driving unit;
controlling the scan driving unit to output a non-active level signal in the second state further comprises:
in the second state, controlling the first clock signal line and the second clock signal line to transmit pulse signals; and, when the first clock signal line transmits an active level signal, the second clock signal line transmits an inactive level signal, and when the second clock signal line transmits an active level signal, the first clock signal line transmits an inactive level signal.
14. The driving method according to claim 8, wherein the display panel further comprises:
the light-emitting drive circuit comprises a plurality of cascaded light-emitting drive units, and the output end of each light-emitting drive unit transmits a light-emitting control signal to the light-emitting control signal end;
the control module is also electrically connected with the light-emitting drive circuit;
the driving method further includes:
and in the first state, controlling the light-emitting driving unit to output an effective level signal.
15. A display device characterized by comprising the display panel according to any one of claims 1 to 7.
16. The display device according to claim 15, further comprising an antenna control chip electrically connected to the sensing antenna and a display control chip electrically connected to the scan driving circuit; the control module is integrated with the antenna control chip or the display control chip.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114974126A (en) * | 2022-06-29 | 2022-08-30 | 武汉天马微电子有限公司 | Display panel, driving method thereof and display device |
| CN115862509A (en) * | 2022-11-29 | 2023-03-28 | 厦门天马微电子有限公司 | Display panel, driving method of display panel and display device |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010001229A (en) * | 1999-06-02 | 2001-01-05 | 구자홍 | Apparatus for Driving Plasma Display Panel Drived with Radio Frequency |
| US20160063907A1 (en) * | 2014-09-02 | 2016-03-03 | Apple Inc. | Electronic Device Resistant to Radio-Frequency Display Interference |
| CN108900669A (en) * | 2018-06-26 | 2018-11-27 | 维沃移动通信有限公司 | touch screen scanning method and mobile terminal |
| CN109461412A (en) * | 2018-12-26 | 2019-03-12 | 武汉天马微电子有限公司 | Organic light-emitting display panel and organic light-emitting display device |
| CN110364107A (en) * | 2018-04-09 | 2019-10-22 | 苹果公司 | Emission of radio frequency signals induction display artifact reduction system and method |
| CN111179802A (en) * | 2019-06-20 | 2020-05-19 | 友达光电股份有限公司 | Display system |
-
2022
- 2022-03-18 CN CN202210272252.4A patent/CN114596807A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010001229A (en) * | 1999-06-02 | 2001-01-05 | 구자홍 | Apparatus for Driving Plasma Display Panel Drived with Radio Frequency |
| US20160063907A1 (en) * | 2014-09-02 | 2016-03-03 | Apple Inc. | Electronic Device Resistant to Radio-Frequency Display Interference |
| CN110364107A (en) * | 2018-04-09 | 2019-10-22 | 苹果公司 | Emission of radio frequency signals induction display artifact reduction system and method |
| CN108900669A (en) * | 2018-06-26 | 2018-11-27 | 维沃移动通信有限公司 | touch screen scanning method and mobile terminal |
| CN109461412A (en) * | 2018-12-26 | 2019-03-12 | 武汉天马微电子有限公司 | Organic light-emitting display panel and organic light-emitting display device |
| CN111179802A (en) * | 2019-06-20 | 2020-05-19 | 友达光电股份有限公司 | Display system |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114974126A (en) * | 2022-06-29 | 2022-08-30 | 武汉天马微电子有限公司 | Display panel, driving method thereof and display device |
| CN115862509A (en) * | 2022-11-29 | 2023-03-28 | 厦门天马微电子有限公司 | Display panel, driving method of display panel and display device |
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