CN114446381A - eMMC fault analysis method, eMMC fault analysis device, readable storage medium and electronic equipment - Google Patents
eMMC fault analysis method, eMMC fault analysis device, readable storage medium and electronic equipment Download PDFInfo
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- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C29/56008—Error analysis, representation of errors
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- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
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Abstract
The invention discloses an eMMC fault analysis method, a device, a readable storage medium and electronic equipment, wherein fault analysis firmware is written into an SRAM of the eMMC; the failure analysis firmware is used for obtaining analysis data corresponding to the eMMC and sending the analysis data to the host, so that failure analysis of the eMMC is realized, the failure analysis firmware is not positioned on a Nand flash Memory like the conventional normal firmware but is written into an SRAM (Static Random-Access Memory) of the eMMC, even if the eMMC fails, the master control of the eMMC can still receive a command of the host through the failure analysis firmware, normal response to the command is realized, the host can know and analyze failure occurrence reasons through the obtained data, and failure analysis of the eMMC is realized while an abnormal field is not damaged.
Description
Technical Field
The invention relates to the technical field of memory systems, in particular to an eMMC fault analysis method, an eMMC fault analysis device, a readable storage medium and electronic equipment.
Background
Some anomalies inevitably occur with eMMC (Embedded MultiMedia Card) during product use or testing. When the abnormity happens, a debugging tool can be used for checking the related information so as to analyze the fault, and the abnormity problem is conveniently positioned and solved. The checking of the related information is usually performed through a Vendor Command (protocol Command) set by firmware, and when the eMMC is in a worse condition, such as abnormal power-on initialization, firmware loss and the like, a Command cannot be normally responded under the conditions, so that the abnormal sample wafer cannot be further analyzed through a direct Vendor Command mode, and if the fault particles are required to be operated normally again, the abnormal sample wafer can only be subjected to destructive modes such as re-opening the card and the like, which causes the loss of the abnormal field.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: an eMMC fault analysis method, an eMMC fault analysis device, a readable storage medium and an electronic device are provided, which can realize eMMC fault analysis without destroying an abnormal field.
In order to solve the technical problems, the invention adopts a technical scheme that:
an eMMC fault analysis method comprises the following steps:
writing the fault analysis firmware into an SRAM of the eMMC;
and obtaining analysis data corresponding to the eMMC through the fault analysis firmware, and sending the analysis data to a host.
In order to solve the technical problem, the invention adopts another technical scheme as follows:
an eMMC fault analysis device, comprising:
the firmware writing module is used for writing the fault analysis firmware into an SRAM of the eMMC;
and the data sending module is used for obtaining analysis data corresponding to the eMMC through the fault analysis firmware and sending the analysis data to a host.
In order to solve the technical problem, the invention adopts another technical scheme as follows:
a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of a method of eMMC fault analysis described above.
In order to solve the technical problem, the invention adopts another technical scheme as follows:
an electronic device includes a memory, a processor, and a computer program stored on the memory and executable on the processor, where the processor implements the steps of the above-described eMMC failure analysis method when executing the computer program.
The invention has the beneficial effects that: the failure analysis firmware is written in an SRAM of the eMMC, analysis data corresponding to the eMMC is obtained through the failure analysis firmware, and the analysis data are sent to a host, so that failure analysis of the eMMC is achieved, the failure analysis firmware is not located on a Nand flash Memory like the existing normal firmware, but is written in the SRAM (Static Random-Access Memory) of the eMMC, even if the eMMC fails, an eMMC main control can still receive a command of the host through the failure analysis firmware, normal response to the command is achieved, the host can know and analyze failure occurrence reasons through the obtained data, and accordingly failure analysis of the eMMC is achieved while an abnormal field is not damaged.
Drawings
Fig. 1 is a flowchart illustrating steps of an eMMC fault analysis method according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an eMMC fault analysis apparatus according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present invention;
fig. 4 is a schematic view of an operation interface of a debugging tool in the eMMC fault analysis method according to the embodiment of the present invention.
Detailed Description
In order to explain technical contents, achieved objects, and effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
Referring to fig. 1, an embodiment of the present invention provides an eMMC fault analysis method, including:
writing the fault analysis firmware into an SRAM of the eMMC;
and obtaining analysis data corresponding to the eMMC through the fault analysis firmware, and sending the analysis data to a host.
From the above description, the beneficial effects of the present invention are: the failure analysis firmware is written in an SRAM of the eMMC, analysis data corresponding to the eMMC is obtained through the failure analysis firmware, and the analysis data are sent to a host, so that failure analysis of the eMMC is achieved, the failure analysis firmware is not located on a Nand flash Memory like the existing normal firmware, but is written in the SRAM (Static Random-Access Memory) of the eMMC, even if the eMMC fails, an eMMC main control can still receive a command of the host through the failure analysis firmware, normal response to the command is achieved, the host can know and analyze failure occurrence reasons through the obtained data, and accordingly failure analysis of the eMMC is achieved while an abnormal field is not damaged.
Further, the writing the failure analysis firmware onto the SRAM of the eMMC previously comprises:
and judging whether the power-on initialization of the eMMC is normal or not, and if not, compiling to obtain fault analysis firmware corresponding to the eMMC.
As can be seen from the above description, when the eMMC cannot be normally powered on and initialized, it indicates that the eMMC is abnormal and cannot normally process the command, and then the corresponding failure analysis firmware is compiled.
Further, the determining whether the power-on initialization of the eMMC is normal, and if not, compiling to obtain the fault analysis firmware corresponding to the eMMC includes:
and reading the capacity of the eMMC, judging whether the capacity is normal capacity, and if not, compiling to obtain fault analysis firmware corresponding to the eMMC.
As can be seen from the above description, when the eMMC can be normally powered on and initialized, the normal capacity of the eMMC can be read, and if the read capacity is abnormal, it indicates that the eMMC enters Rom Mode (master control read only Mode), cannot normally process a command, and the eMMC fails at present, so that the working state of the eMMC is simply and effectively determined.
Further, the failure analysis firmware includes boot firmware and command processing firmware data;
the writing of the failure analysis firmware onto the SRAM of the eMMC includes:
writing the boot firmware into an SRAM of an eMMC;
writing the command processing firmware data into an SRAM of the eMMC;
the obtaining analysis data corresponding to the eMMC through the fault analysis firmware includes:
and processing firmware data according to the command and operating the NandFlash by the boot firmware to obtain analysis data corresponding to the eMMC.
As can be seen from the above description, the writing of the failure analysis firmware is divided into two steps, the boot firmware is written into the SRAM of the eMMC, then the command processing firmware data is written into the SRAM of the eMMC, the boot firmware can boot the subsequent data to be written into the Nand of the eMMC, the command processing firmware data realizes the cmd driver (command processing) function through software, and the firmware structure does not contain the firmware data to be flushed, so that the firmware cannot be flushed into the system block after all the firmware is written, and the writing of the failure analysis firmware is realized.
Further, the obtaining, by the fault analysis firmware, analysis data corresponding to the eMMC, and sending the analysis data to a host includes:
acquiring a fault analysis instruction sent by a host;
and operating the fault analysis firmware according to the fault analysis instruction to obtain analysis data corresponding to the eMMC, and sending the analysis data to the host.
As can be seen from the above description, the fault analysis firmware is operated according to the obtained fault analysis instruction sent by the host to obtain the analysis data corresponding to the eMMC, and the analysis data is sent to the host, so that the command processing is normally realized under the condition of eMMC fault, and the eMMC fault analysis is realized while the abnormal site is not damaged.
Further, the fault analysis instruction comprises a read instruction;
the read instruction includes physical block information;
the operating the fault analysis firmware according to the fault analysis instruction to obtain analysis data corresponding to the eMMC, and sending the analysis data to the host includes:
reading data of a physical block corresponding to the physical block information by using the fault analysis firmware according to the reading instruction;
and analyzing the data to obtain analysis data, and sending the analysis data to the host.
As can be seen from the above description, the failure analysis firmware is used to read the data of the physical block corresponding to the physical block information according to the read instruction, analyze the read data to obtain the analysis data, and send the analysis data to the host, so that when a failure occurs, a response to the host read instruction is implemented without destroying the data inside the eMMC.
Further, the obtaining of the fault analysis instruction sent by the host includes:
and judging whether a fault analysis instruction sent by a host exists in a register of the eMMC, if so, acquiring the fault analysis instruction sent by the host, and if not, returning to the step of judging whether the fault analysis instruction sent by the host exists in the register of the eMMC.
As can be seen from the above description, it is possible to respond to a command sent by the host in a timely manner by continuously determining whether a fault analysis command sent by the host exists in a register of the eMMC.
Referring to fig. 2, another embodiment of the present invention provides an eMMC fault analysis apparatus, including:
the firmware writing module is used for writing the fault analysis firmware into an SRAM of the eMMC;
and the data sending module is used for obtaining analysis data corresponding to the eMMC through the fault analysis firmware and sending the analysis data to a host.
Another embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon, which when executed by a processor, performs the steps of a method for eMMC fault analysis as described above.
Referring to fig. 3, another embodiment of the present invention provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and running on the processor, where the processor implements the steps of the eMMC failure analysis method when executing the computer program.
The above-described eMMC failure analysis method of the present invention is applicable to a failed eMMC, and is described below by way of specific embodiments:
example one
The eMMC consists of three parts, namely a main control part, an SRAM and a NandFlash; the normal firmware is received on the SRAM through the main control in the mass production stage, and is finally written into the NandFlash, and some erasing and writing operations are carried out on the NandFlash in the process;
referring to fig. 1 and 4, a method for analyzing an eMMC fault according to the present embodiment includes:
s0, determining whether the power-on initialization of the eMMC is normal, and if not, compiling to obtain a fault analysis firmware corresponding to the eMMC, which specifically includes:
reading the capacity of the eMMC, judging whether the capacity is normal capacity or not, and if not, compiling to obtain fault analysis firmware corresponding to the eMMC;
wherein the failure analysis firmware comprises boot firmware and command processing firmware data; the normal capacity is a normal capacity such as 128G and 512G;
for example, the debugging tool reads the capacity of the eMMC, and the read capacity is 128M, which means that the eMMC enters a Rom Mode (master control read only Mode), cannot normally process a command, that is, cannot call firmware to an SRAM, and if the capacity is determined not to be the normal capacity, the fault analysis firmware corresponding to the eMMC is compiled;
s1, writing the failure analysis firmware into the SRAM of the eMMC, specifically including:
the location of the failure analysis firmware on the SRAM is the same as the SRAM address of the normal firmware for mass production operations, which means that when the master writes the failure analysis firmware onto the SRAM, the eMMC proceeds to a Debug flow instead of the mass production flow;
s11, writing the boot firmware into an SRAM of the eMMC;
specifically, the boot firmware is written into an SRAM of the eMMC through main control, and the boot firmware guides subsequent data to be written into the NandFlash;
s12, writing the command processing firmware data into the SRAM of the eMMC;
specifically, the command processing firmware data is written into the SRAM of the eMMC through main control, a cmd driver (command processing) function is realized on software, and a signal from a host can be received and processed;
because the fault analysis firmware structure does not contain firmware downloading data, the fault analysis firmware structure cannot be downloaded to a system block after all firmware is written;
s2, obtaining analysis data corresponding to the eMMC through the fault analysis firmware, and sending the analysis data to a host;
in an optional implementation manner, the obtaining, in S2, analysis data corresponding to the eMMC through the fault analysis firmware specifically includes:
processing firmware data according to the command and operating the NandFlash by the boot firmware to obtain analysis data corresponding to the eMMC;
in another optional embodiment, the S2 specifically includes:
s21, acquiring a fault analysis command sent by the host, specifically including:
s211, judging whether a fault analysis instruction sent by a host exists in a register of the eMMC, if so, executing S212, and if not, executing S213;
specifically, when a host sends a fault analysis instruction, a register inside the eMMC records the fault analysis instruction, and a Debug FW (fault analysis firmware) judges whether the fault analysis instruction sent by a host exists in the register of the eMMC, if so, S212 is executed, if not, S213 is executed, after the current instruction is processed, the Debug FW acquires a specific command and a parameter through a value of the register, and different processing is performed according to the difference between the command and the parameter;
s212, acquiring a fault analysis instruction sent by the host;
s213, returning to execute S211;
wherein the fault analysis instruction comprises a read instruction, and the read instruction is CMD 18; the read instruction includes physical block information;
the fault analysis instructions may further include a write instruction, which is CMD 25;
s22, operating the failure analysis firmware according to the failure analysis instruction to obtain analysis data corresponding to the eMMC, and sending the analysis data to the host, which specifically includes:
s221, reading data of the physical block corresponding to the physical block information by using the fault analysis firmware according to the reading instruction;
s222, analyzing the data to obtain analysis data, and sending the analysis data to the host;
when the physical block is a system block, the analysis data includes information such as an ECC (Error correction Code) condition, VT (CELL on voltage probability density) distribution, PE (erasure) times, valid data, and the like of the physical block, and when the physical block is another conventional block, the analysis data includes an ECC condition and VT distribution of the physical block;
the host can send a fault analysis instruction through a debugging tool, the eMMC runs Debug FW on the SRAM, can normally receive a processing command and returns corresponding analysis data to the debugging tool of the host, and the debugging tool processes relevant data;
as shown in fig. 4, the bottom right red box in fig. 4 is the address selection of the physical block to be read, Blk represents the block number to be read, BlkCnt is the number of blocks to be read, and the top left red box is the operation option, which operates inside the red box as a physical page read/write/erase block;
the method is different from the method that normal mass production firmware can be written into NandFlash, the Debug firmware only falls on an SRAM, the position of the Debug firmware on the SRAM is the same as the address of the SRAM for mass production operation of the normal firmware, which means that when the Debug firmware is written on the SRAM by a main control, the eMMC can carry out a Debug flow instead of a mass production flow, the main control can receive an upper-layer command through the Debug firmware to realize normal response to the command, so that the main control can know and analyze the fault occurrence reason through the acquired data, and the eMMC fault analysis is realized while an abnormal field is not damaged.
Example two
Referring to fig. 2, an eMMC failure analysis apparatus includes:
the firmware writing module is used for writing the fault analysis firmware into an SRAM of the eMMC;
and the data sending module is used for obtaining analysis data corresponding to the eMMC through the fault analysis firmware and sending the analysis data to a host.
EXAMPLE III
A computer-readable storage medium having stored thereon a computer program which, when executed by a processor, may implement the steps of the eMMC failure analysis method in one embodiment.
Example four
Referring to fig. 3, an electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor executes the computer program to implement the steps of the eMMC failure analysis method according to the first embodiment.
In summary, according to the eMMC fault analysis method, the eMMC fault analysis device, the readable storage medium, and the electronic device provided by the present invention, the fault analysis firmware is written into the SRAM of the eMMC, and the fault analysis firmware includes boot firmware and command processing firmware data; the method comprises the steps of uninterruptedly judging whether a fault analysis instruction sent by a host exists in a register of the eMMC, if so, obtaining the fault analysis instruction sent by the host, responding the instruction sent by the host in time, operating fault analysis firmware according to the fault analysis instruction to obtain analysis data corresponding to the eMMC, sending the analysis data to the host, realizing fault analysis of the eMMC, enabling the fault analysis firmware to be located on a Nand flash Memory like the existing normal firmware, but written into an SRAM (Static Random-Access Memory) of the eMMC, enabling an eMMC main control to receive a command of the host through the fault analysis firmware even if the eMMC fails, realizing normal response to the command, enabling the host to know and analyze the cause of the fault through the obtained data, and meanwhile not damaging an abnormal field, eMMC failure analysis is implemented.
In the above embodiments provided in the present application, it should be understood that the disclosed method, apparatus, computer-readable storage medium, and electronic device may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the modules is only one logical division, and other divisions may be realized in practice, for example, a plurality of components or modules may be combined or integrated into another apparatus, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or components or modules, and may be in an electrical, mechanical or other form.
The components described as separate parts may or may not be physically separate, and parts displayed as components may or may not be physical modules, may be located in one place, or may be distributed on a plurality of network modules. Some or all of the components can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional modules in the embodiments of the present invention may be integrated into one processing module, or each component may exist alone physically, or two or more modules are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode.
The integrated module, if implemented in the form of a software functional module and sold or used as a separate product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
It should be noted that, for the sake of simplicity, the above-mentioned method embodiments are described as a series of acts or combinations, but those skilled in the art should understand that the present invention is not limited by the described order of acts, as some steps may be performed in other orders or simultaneously according to the present invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no acts or modules are necessarily required of the invention.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to the related technical fields, are included in the scope of the present invention.
Claims (10)
1. An eMMC fault analysis method is characterized by comprising the following steps:
writing the fault analysis firmware into an SRAM of the eMMC;
and obtaining analysis data corresponding to the eMMC through the fault analysis firmware, and sending the analysis data to a host.
2. The method of claim 1, wherein writing fault analysis firmware onto an SRAM of the eMMC comprises:
and judging whether the power-on initialization of the eMMC is normal or not, and if not, compiling to obtain fault analysis firmware corresponding to the eMMC.
3. The method of claim 2, wherein the determining whether the power-on initialization of the eMMC is normal, and if not, compiling the fault analysis firmware corresponding to the eMMC comprises:
and reading the capacity of the eMMC, judging whether the capacity is normal capacity, and if not, compiling to obtain fault analysis firmware corresponding to the eMMC.
4. The eMMC fault analysis method of claim 1, wherein the fault analysis firmware includes boot firmware and command processing firmware data;
the writing of the failure analysis firmware onto the SRAM of the eMMC includes:
writing the boot firmware into an SRAM of an eMMC;
writing the command processing firmware data into an SRAM of the eMMC;
the obtaining analysis data corresponding to the eMMC through the fault analysis firmware includes:
and processing firmware data according to the command and operating the NandFlash by the boot firmware to obtain analysis data corresponding to the eMMC.
5. The method of claim 1, wherein obtaining, by the failure analysis firmware, analysis data corresponding to the eMMC and sending the analysis data to a host comprises:
acquiring a fault analysis instruction sent by a host;
and operating the fault analysis firmware according to the fault analysis instruction to obtain analysis data corresponding to the eMMC, and sending the analysis data to the host.
6. The eMMC fault analysis method of claim 5, wherein the fault analysis instruction comprises a read instruction;
the read instruction includes physical block information;
the operating the fault analysis firmware according to the fault analysis instruction to obtain analysis data corresponding to the eMMC, and sending the analysis data to the host includes:
reading data of a physical block corresponding to the physical block information by using the fault analysis firmware according to the reading instruction;
and analyzing the data to obtain analysis data, and sending the analysis data to the host.
7. The eMMC fault analysis method of claim 5, wherein obtaining the fault analysis command sent by the host comprises:
and judging whether a fault analysis instruction sent by a host exists in a register of the eMMC, if so, acquiring the fault analysis instruction sent by the host, and if not, returning to the step of judging whether the fault analysis instruction sent by the host exists in the register of the eMMC.
8. An eMMC fault analysis device, comprising:
the firmware writing module is used for writing the fault analysis firmware into an SRAM of the eMMC;
and the data sending module is used for obtaining analysis data corresponding to the eMMC through the fault analysis firmware and sending the analysis data to a host.
9. A computer readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of a method for eMMC fault analysis as claimed in any one of claims 1 to 7.
10. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the steps of a method of eMMC failure analysis as claimed in any one of claims 1 to 7 when executing the computer program.
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