Disclosure of Invention
The present invention is directed to overcome the above-mentioned drawbacks of the prior art, and an object of the present invention is to provide a method and an apparatus for safely cutting off a virtual fuse based on a feature value, which not only satisfy the requirement of fault retention, but also are safe and efficient and have a very simplified design.
The purpose of the invention can be realized by the following technical scheme:
according to a first aspect of the present invention, there is provided a secure cutting method based on a characteristic valued virtual fuse, the method comprising the steps of:
step S1, self-checking the two-channel software respectively;
step S2, storing the self-checking result characteristic value of the software into a non-volatile storage area exclusive to the software;
step S3, self-checking the two-channel hardware respectively;
step S4, storing the characteristic value of the self-checking result of the hardware into a non-volatile storage area exclusive to the hardware;
step S5, performing self-check of read-write ability on the used nonvolatile storage area;
step S6, storing the characteristic value of the self-checking result of the nonvolatile storage area in a memory area;
step S7, interacting all software and hardware self-checking result characteristic values through the data channel between the two channels, and storing the characteristic values in the nonvolatile storage area of the opposite side;
step S8, the characteristic values are combined into a redundant code value with unique correctness through a fusion algorithm;
step S9, setting GPIO in time sharing mode according to each bit value of each redundant code in the double-channel timing interruption;
step S10, the GPIO outputs the timing output to the shift register and triggers the shift signal of the channel to the channel at the same time;
step S11, comparing the redundant code information after serial-to-parallel conversion by the shift register with the numerical comparator, outputting if the preset state is consistent with the redundant code information, and not outputting if the preset state is inconsistent with the redundant code information.
As a preferred technical solution, in the step S1, the respective self-checking of the dual-channel software specifically includes: and each channel carries out online self-checking on the software according to the original software self-checking logic, and reflects the self-checking result to the software characteristic value.
As a preferable technical scheme, the self-checking fault information of the software and the fault information detected in the running process are fed back to the exclusive non-volatile storage area of the software which can be written in by the software.
As a preferred technical solution, in the step S3, the respective self-test of the dual-channel hardware specifically includes: and each channel carries out online self-checking on the hardware according to the original hardware self-checking logic and reflects the self-checking result to the characteristic value of the hardware.
As a preferable technical scheme, the self-checking fault information of the hardware and the fault information detected in the operation process are fed back to the exclusive non-volatile storage area of the hardware which can be written by software.
As a preferred technical solution, in the step S5, the self-checking of the read-write capability of the used nonvolatile storage area specifically includes:
and performing read-write detection on all 0, all 1 and random values of the used nonvolatile storage area.
As a preferred technical solution, the read-write detection includes a temporary storage area and an exclusive area of the characteristic value, the temporary storage area is detected first, and then the exclusive area is detected, and the characteristic value is transferred during self-checking of the corresponding area, so as to ensure that the characteristic value remains unchanged before and after the exclusive area self-checking.
As a preferred technical scheme, the method mutually corrects and stores fault information through double CPU channels.
As an optimal technical scheme, software and hardware faults of the method can cut off output timely and effectively in a characteristic value coding mode.
According to a second aspect of the present invention, there is provided a secure cutting apparatus based on a characteristic valued dummy fuse, the apparatus comprising:
the software self-checking module is used for self-checking of the dual-channel software;
the software self-checking result storage module is used for storing the characteristic value of the self-checking result of the software into a special non-volatile storage area of the software;
the hardware self-checking module is used for self-checking of the dual-channel hardware;
the hardware self-checking result storage module is used for storing the characteristic value of the self-checking result of the hardware into a special non-volatile storage area of the hardware;
the read-write capability self-checking module is used for performing read-write capability self-checking on the used nonvolatile storage area;
the storage self-checking result storage module is used for storing the self-checking result characteristic value of the nonvolatile storage area into the memory area;
the interaction module is used for interacting all software and hardware self-checking result characteristic values through a data channel between two channels and storing the characteristic values into a nonvolatile storage area of the other party;
the redundant code generation module is used for forming a redundant code value with unique correctness by the characteristic values through a fusion algorithm;
the GPIO setting module is used for setting GPIO in a time-sharing way according to each bit value of each redundant code in the double-channel timing interrupt;
the shift register serial-to-parallel module is used for triggering a channel shift signal to the channel while the GPIO outputs the shift register at regular time;
and the comparison module is used for comparing the redundant code information after serial-parallel conversion by the shift register with the numerical comparator, outputting the redundant code information if the preset state is consistent with the redundant code information, and not outputting the redundant code information if the preset state is inconsistent with the redundant code information.
According to a third aspect of the invention, there is provided an electronic device comprising a memory having stored thereon a computer program and a processor implementing the method when executing the program.
According to a fourth aspect of the invention, there is provided a computer-readable storage medium, on which a computer program is stored which, when executed by a processor, implements the method.
Compared with the prior art, the invention has the following advantages:
1. the invention designs a safety output cutting method based on a characteristic valued virtual fuse.
2. The hardware circuit dependency of the invention is weakened, and the simple shift register and the numerical comparator can be realized.
3. The invention does not need real hardware fuse wires, thereby reducing the maintenance cost.
4. The invention can effectively cut off the output in time by the way of characteristic value coding, thus achieving the purpose of reflecting the fault safety.
5. The software and hardware cutting processing can be simultaneously carried out, and the software is not required to enter a non-output state after the cutting instruction of the software to the hardware is sent.
6. The inventive fault retention need not be achieved by a permanent physical cut-off.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, shall fall within the scope of protection of the present invention.
As shown in FIG. 2, the method of the present invention is embodied as follows.
Step 1, each channel carries out on-line self-checking of software according to the original software self-checking logic, and self-checking results are reflected to software characteristic values;
step 2, storing the characteristic value of the self-checking result of the software into a special non-volatile storage area of the software;
step 3, each channel carries out online self-checking of the hardware according to the original hardware self-checking logic, and the self-checking result is reflected to the characteristic value of the hardware;
step 4, storing the characteristic value of the self-checking result of the hardware into a nonvolatile storage area exclusive for the hardware;
step 5, performing read-write detection of all 0, all 1 and random values on the used nonvolatile storage area, wherein the detection relates to a temporary storage area and an exclusive area of the characteristic value, the temporary storage area is detected firstly, then the exclusive area is detected, and the characteristic value is transferred when self-checking is performed on the corresponding area, so that the characteristic value is kept unchanged before and after the self-checking of the exclusive area;
step 6, storing the characteristic value of the self-checking result of the nonvolatile storage area into a memory area;
step 7, interacting all software and hardware self-checking result characteristic values through a data channel between two channels, and storing the characteristic values into a nonvolatile storage area of the opposite side;
step 8, forming a redundant code value with unique correctness by the characteristic values through a fusion algorithm;
step 9, setting GPIO in a time-sharing manner according to each bit value of each redundant code in the double-channel timing interruption;
step 10, the GPIO regularly outputs a shift signal which is sent to a shift register and triggers the channel to shift signals;
and 11, comparing the redundant code information after serial-parallel conversion by the shift register with a numerical value comparator, outputting if the preset state is consistent with the redundant code information, and not outputting if the preset state is inconsistent with the redundant code information.
The invention has the following characteristics:
the method comprises the following steps of collecting and recording fault detection information in a centralized manner:
1. the hardware fault information, the hardware self-test fault information and the fault information detected in the running process are all fed back to a nonvolatile memory area which can be written by software.
2. The software failure information, the self-checking failure information of the software and the failure information detected in the running process are all fed back to a nonvolatile memory area where the software can be written.
The effectiveness processing and storage method of the fault information record comprises the following steps:
1. and the fault information is characterized and valued, and single bit overturn is prevented.
2. The mutual correction and storage of the fault information of the double CPU channels are required.
Thirdly, a fault information effective reaction method:
1. the storage validity of the nonvolatile storage area is checked.
2. And the characteristic values of the software and hardware fault states are effectively fused into redundant codes.
3. And the software sets the GPIO according to the redundant code in the timing interrupt.
And 4, the GPIO outputs the redundant code serial-parallel conversion through a shift register and then sends the redundant code serial-parallel conversion to a numerical comparator to control the final output.
And fourthly, the nonvolatile storage area ensures that the information is not lost before restarting, and the fault retention is achieved.
The above is a description of method embodiments, and the embodiments of the present invention are further described below by way of apparatus embodiments.
As shown in fig. 3, the present invention provides a safety cut device based on a characteristic valued dummy fuse, comprising:
the software self-checking module 100 is used for self-checking of the dual-channel software;
the software self-checking result storage module 200 is used for storing the characteristic value of the self-checking result of the software into a special non-volatile storage area of the software;
the hardware self-checking module 300 is used for self-checking of the dual-channel hardware;
the hardware self-checking result storage module 400 is used for storing the characteristic value of the self-checking result of the hardware into a dedicated nonvolatile storage area of the hardware;
the read-write capability self-checking module 500 is used for performing read-write capability self-checking on the used nonvolatile storage area;
a storage self-test result storage module 600, configured to store a self-test result characteristic value of the nonvolatile storage area in the memory area;
the interaction module 700 is used for interacting all software and hardware self-checking result characteristic values through a data channel between two channels and storing the characteristic values into a nonvolatile storage area of the opposite side;
a redundant code generation module 800, configured to combine the characteristic values into a redundant code value with unique correctness through a fusion algorithm;
the GPIO setting module 900 is used for setting GPIO in a time-sharing mode according to each bit value of each redundancy code in the double-channel timing interrupt;
the shift register serial-to-parallel module 1000 is used for triggering a channel shift signal to a channel while the GPIO outputs the shift signal to the shift register at regular time;
the comparison module 1100 is configured to compare the redundant code information after serial-to-parallel conversion by the shift register with the numerical comparator, and output the redundant code information if the preset state is consistent with the redundant code information, and not output the redundant code information if the preset state is inconsistent with the redundant code information.
It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working process of the described module may refer to the corresponding process in the foregoing method embodiment, and is not described herein again.
The electronic device of the present invention includes a Central Processing Unit (CPU) that can perform various appropriate actions and processes according to computer program instructions stored in a Read Only Memory (ROM) or computer program instructions loaded from a storage unit into a Random Access Memory (RAM). In the RAM, various programs and data required for the operation of the device can also be stored. The CPU, ROM, and RAM are connected to each other via a bus. An input/output (I/O) interface is also connected to the bus.
A plurality of components in the device are connected to the I/O interface, including: an input unit such as a keyboard, a mouse, etc.; an output unit such as various types of displays, speakers, and the like; storage units such as magnetic disks, optical disks, and the like; and a communication unit such as a network card, modem, wireless communication transceiver, etc. The communication unit allows the device to exchange information/data with other devices via a computer network such as the internet and/or various telecommunication networks.
The processing unit performs the various methods and processes described above, such as methods S1-S11. For example, in some embodiments, the methods S1-S11 may be implemented as a computer software program tangibly embodied in a machine-readable medium, such as a storage unit. In some embodiments, part or all of the computer program may be loaded and/or installed onto the device via ROM and/or the communication unit. When the computer program is loaded into RAM and executed by the CPU, one or more of the steps of methods S1-S11 described above may be performed. Alternatively, in other embodiments, the CPU may be configured to perform methods S1-S11 in any other suitable manner (e.g., by way of firmware).
The functions described herein above may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), an Application Specific Standard Product (ASSP), a system on a chip (SOC), a load programmable logic device (CPLD), and the like.
Program code for implementing the methods of the present invention may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowchart and/or block diagram to be performed. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.