CN114330192A

CN114330192A - GaN HEMT transistor small signal model modeling method

Info

Publication number: CN114330192A
Application number: CN202111447793.8A
Authority: CN
Inventors: 张丽; 刘太君; 叶焱; 许高明
Original assignee: Ningbo University
Current assignee: Ningbo University
Priority date: 2021-11-30
Filing date: 2021-11-30
Publication date: 2022-04-12

Abstract

The invention discloses a modeling method of a small signal model of a GaN HEMT transistor, which is characterized in that in the process of constructing the small signal model, a mixed extraction method is further improved, and only C is optimized_pg、C_gsi、C_pgd、C_gdi、C_pd、C_dsiThe 6 parasitic capacitance values are simple and time-saving in the optimization process, and the problem of error accumulation caused by multi-parameter optimization is greatly reduced; reasonable assumptions are made according to the physical characteristics of the device, so that the obtained small-signal model parameter values have correct physical significance, and the working state of the device can be accurately reflected; the method has the advantages of simple and time-saving parameter extraction process, higher reliability of parameter extraction results, higher transportability and universality, and capability of being used for devices with different structures.

Description

GaN HEMT transistor small signal model modeling method

Technical Field

The invention relates to a small signal model modeling method, in particular to a small signal model modeling method for a GaN HEMT transistor.

Background

The semiconductor device GaN HEMT transistor has the advantages of wide forbidden band, high temperature resistance, high breakdown electric field, large two-dimensional electron gas concentration, large transconductance, high cut-off frequency, low noise, high switching speed and the like, and is widely applied to the fields of integrated circuits and microwave radio frequency. The device model is a necessary way for characterizing the characteristics of the semiconductor device and designing the integrated circuit, plays a crucial role in designing the integrated circuit, and the accuracy of the model directly influences the accuracy of the integrated circuit design.

The extraction of model parameters is important for establishing a transistor small signal model and depends on accurate measurement, a reliable parameter extraction method and the like. The existing parameter extraction method is based on a small signal equivalent circuit model (i.e. a small signal model) of a transistor, and can be divided into a direct extraction method, a numerical optimization method and a mixed extraction method (a method combining the direct extraction and the numerical optimization). The direct extraction method is considered as the simplest and more reliable extraction method, but the method needs to know the process characteristics of the device exactly to extract the element parameters by assuming the multiple relation among elements in the device, is not suitable for being applied to parameter extraction modeling of devices with different structures, and has high limitation. Although the numerical optimization method can be applied to parameter extraction modeling of devices with different structures and has strong universality, the method has high requirement on selection of initial values of elements in the devices, and may cause meaningless element parameters or fall into local optimization, and the reliability of parameter extraction results is not high. The mixed extraction method combines the advantages of a direct extraction method and a numerical optimization method, not only can be applied to parameter extraction modeling of devices with different structures, but also has strong universality and can obtain reliable element parameter values, but the parameter extraction process is complex and time-consuming.

Disclosure of Invention

The invention aims to solve the technical problem of providing a small-signal model modeling method of a GaN HEMT transistor, which can be applied to devices with different structures, has strong universality and high reliability of parameter extraction results, and has a simple and time-saving parameter extraction process.

The technical scheme adopted by the invention for solving the technical problems is as follows: a modeling method of a small signal model of a GaN HEMT transistor comprises the following steps:

step S1: extracting an optimal parasitic capacitance value:

step S101: constructing a small-signal equivalent circuit model of the GaN HEMT transistor in ADS radio frequency simulation software, wherein the small-signal equivalent circuit model comprises a parasitic element and an intrinsic element, and the parasitic element comprises a parasitic elementThe capacitor comprises a generating capacitor C1, a generating capacitor C2, a generating capacitor C3, a generating capacitor C4, a generating capacitor C5, a generating capacitor C6, a parasitic inductor L1, a parasitic inductor L2, a parasitic inductor L3 and a parasitic resistor R1, a parasitic resistor R2 and a parasitic resistor R3; the intrinsic element comprises intrinsic capacitors C7, C8 and C9, intrinsic resistors R4 and R5, intrinsic conductances G1, G2 and G3 and an intrinsic voltage-controlled current source, wherein the output current I of the intrinsic voltage-controlled current source_ds＝V_gsG_me^-jωτWherein G is_mIs the transconductance of GaNHEMT transistor, tau is the time delay of the grid voltage of GaN HEMT transistor, V_gsIs the voltage across the intrinsic capacitor C7, ω is the angular frequency of the GaN HEMT transistor, j is the imaginary sign, and e is the base of the natural logarithm; one end of a parasitic capacitor C1, one end of a parasitic capacitor C3 and one end of a parasitic inductor L1 are connected and the connection ends thereof are equivalent to the gate of a GaN HEMT transistor, the other end of the parasitic capacitor C1, one end of the parasitic inductor L3 and one end of a parasitic capacitor C5 are connected and the connection ends thereof are equivalent to the source of the GaN HEMT transistor, one end of a parasitic capacitor C2, one end of a parasitic capacitor C4, the other end of the parasitic inductor L1 and one end of a parasitic resistor R1 are connected, the other end of the parasitic capacitor C2, the other end of a parasitic inductor L3, one end of a parasitic resistor R3 and a parasitic capacitor C6 are connected, the other end of a parasitic capacitor C3, the other end of a parasitic capacitor C5 and one end of a parasitic inductor L2 are connected and the connection ends thereof are equivalent to the drain of the GaN HEMT transistor, the other end of a parasitic capacitor C4, one end of a parasitic resistor R2, the other end of a parasitic inductor L2 and the other end of a parasitic capacitor C6 are connected, the other end of the parasitic resistor R1, one end of the intrinsic capacitor C7, one end of the intrinsic capacitor C8, one end of the intrinsic conductance G1 and one end of the intrinsic conductance G2 are connected, the other end of the parasitic resistor R2, one end of the intrinsic capacitor C9, the other end of the intrinsic conductance G2, one end of the intrinsic conductance G3, one end of the intrinsic resistor R5 and the anode of the intrinsic voltage-controlled current source are connected, the other end of the parasitic resistor R3, one end of the intrinsic resistor R4, the other end of the intrinsic conductance G1, the other end of the intrinsic capacitor C9, the other end of the intrinsic conductance G3 and the cathode of the intrinsic voltage-controlled current source are connected, the other end of the intrinsic capacitor C7 is connected with the other end of the intrinsic resistor R4, and the other end of the intrinsic capacitor C8 is connected with the other end of the intrinsic resistor R5; let the capacitance value of the parasitic capacitance C1 be C_pgThe capacitance value of the parasitic capacitance C2 is denoted as C_gsiParasitic disease ofThe capacitance value of the capacitor C3 is denoted as C_pgdThe capacitance value of the parasitic capacitance C4 is denoted as C_gdiThe capacitance value of the parasitic capacitance C5 is denoted as C_pdThe capacitance value of the parasitic capacitance C6 is denoted as C_dsi(ii) a The inductance of the parasitic inductor L1 is denoted as L_gThe inductance of the parasitic inductor L2 is denoted as L_dThe inductance of the parasitic inductor L3 is denoted as L_s(ii) a The resistance of the parasitic resistor R1 is denoted as R_gThe resistance value of the parasitic resistor R2 is denoted as R_dThe resistance value of the parasitic resistor R3 is denoted as R_s(ii) a The capacitance value of the intrinsic capacitance C7 is denoted as C_gsThe capacitance value of the intrinsic capacitance C8 is denoted as C_gdThe capacitance value of the intrinsic capacitance C9 is denoted as C_dsThe resistance of the intrinsic resistor R4 is denoted as R_iThe resistance of the intrinsic resistor R5 is denoted as R_gdThe value of the intrinsic conductance G1 is denoted as G_gsfThe value of the intrinsic conductance G2 is denoted as G_gdfThe value of the intrinsic conductance G3 is denoted as G_ds；

Step S102: testing the S parameter of the GaN HEMT transistor in a cold pinch-off bias state to obtain the S parameter of the GaN HEMT transistor at each frequency point in the cold pinch-off bias state, wherein the total number of the frequency points is recorded as N, and the k-th frequency point is recorded as f_kN, and the S parameter of the GaN HEMT transistor at the kth frequency point in the cold pinch-off bias state obtained through the test is recorded as S_k，S_kIs a 2 × 2 matrix, S_kEach element in the series is a plurality;

the small-signal equivalent circuit model of the GaN HEMT transistor is simplified to obtain a first simplified circuit model, the first simplified circuit model only comprises parasitic capacitors C1, C2, C3, C4, C5, C6, intrinsic capacitors C7, C8 and C9, at this time, one end of the parasitic capacitor C1, one end of the parasitic capacitor C2, one end of the parasitic capacitor C5, one end of the parasitic capacitor C6, one end of the intrinsic capacitor C7 and one end of the intrinsic capacitor C9 are connected, the connection ends of the parasitic capacitors are equivalent to the source of the GaN HEMT transistor, the other end of the parasitic capacitor C1, the other end of the parasitic capacitor C2, one end of the parasitic capacitor C3, one end of the parasitic capacitor C4, the other end of the intrinsic capacitor C7 and one end of the intrinsic capacitor C8 are connected, the connection ends of the parasitic capacitors are equivalent to the gate of the GaN HEMT transistor, the other end of the parasitic capacitor C5, the other end of the parasitic capacitor C6, the other end of the parasitic capacitor C3 and the other end of the parasitic capacitor C4 are equivalent to the gate of the GaN HEMT transistor, The other end of the intrinsic capacitor C8 is connected with the other end of the intrinsic capacitor C9, and the connecting end of the intrinsic capacitor C8 is equivalent to the drain electrode of the GaN HEMT transistor; establishing a first simplified circuit model in ADS radio frequency simulation software;

the sum of the capacitance values of the parasitic capacitance C1, the parasitic capacitance C2 and the intrinsic capacitance C7 is used as the total capacitance C of the gate-source branch of the GaN HEMT transistor in the cold pinch-off bias state_gaThe sum of the capacitance values of the parasitic capacitance C3, the parasitic capacitance C4 and the intrinsic capacitance C8 is used as the total gate-drain branch capacitance C of the GaN HEMT transistor in the cold pinch-off bias state_gdcThe sum of the capacitance values of the parasitic capacitance C5, the parasitic capacitance C6 and the intrinsic capacitance C9 is used as the total capacitance C of the drain-source branch of the GaNHEMT transistor in the cold pinch-off bias state_dbTo obtain formulae (1) to (3):

C_ga＝C_pg+C_gsi+C_gs (1)

C_gdc＝C_pgd+C_gd+C_gdi (2)

C_db＝C_pd+C_dsi+C_ds (3)

step S103: respectively converting the S parameters of the GaN HEMT transistor at each frequency point under the cold pinch-off bias state into Y parameters to obtain the Y parameters of the GaN HEMT transistor at each frequency point under the cold pinch-off bias state, and recording the Y parameters of the GaN HEMT transistor at the kth frequency point under the cold pinch-off bias state as Y parameters_k，Y_kIs a 2 × 2 matrix, Y_kEach element in the group is a plural number, and Y is_kIs marked as Y for the 1 st row and 1 st column element_11,kThe 1 st row and 2 nd column elements are marked as Y_12,kLine 2, column 1 element is denoted as Y_21,kAnd the 2 nd row and 2 nd column element is marked as Y_22,k(ii) a At this time, the total capacitance C of the gate-source branch_gaGate-drain branch total capacitance C_gdcTotal capacitance of drain-source branch C_dbThe relation with the Y parameter of the GaN HEMT transistor in a cold pinch-off bias state is as follows:

Im(Y_11,k)+Im(Y_12,k)＝C_ga,kω_k (4)

Im(Y_12,k)＝-C_gdc,kω_k (5)

Im(Y_22,k)+Im(Y_12,k)＝C_db,kω_k (6)

where Im () represents the imaginary part of the complex number, ω_k＝2*π*f_k，ω_kFor the k frequency point f_kA corresponding angular frequency; im (Y)_ij,k) Represents Y_ij,kI 1,2, j 1, 2; c_ga,kDenotes C at the k-th frequency point_gaValue of (A), C_gdc,kDenotes C at the k-th frequency point_gdcValue of (A), C_db,kDenotes C at the k-th frequency point_dbTaking the value of (A);

fitting the imaginary part and angular frequency omega of each element in the Y parameter of the GaN HEMT transistor at the kth frequency point under the cold pinch-off bias state according to the formulas (4) to (6)_kI.e. fitting Im (Y)_11,k)+Im(Y_12,k) And omega_k、Im(Y_12,k) And omega_k、Im(Y_22,k)+Im(Y_12,k) And omega_kThe fitting process is realized in MATLAB software, and Im (Y) is directly obtained through the MATLAB software_11,k)+Im(Y_12,k) And omega_k、Im(Y_12,k) And omega_k、Im(Y_22,k)+Im(Y_12,k) And omega_kThe three fitted linear lines and the slopes of the three fitted linear lines will be Im (Y)_11,k)+Im(Y_12,k) And omega_kThe slope of the fitted linear straight line of (2) is taken as the total capacitance C of the gate-source branch_gaValue of (a), Im (Y)_12,k) And omega_kThe slope of the fitted linear straight line of (1) is used as the total capacitance C of the gate-drain branch_gdcValue of (a), Im (Y)_22,k)+Im(Y_12,k) And omega_kThe slope of the fitted linear straight line of (1) is taken as the total capacitance C of the drain-source branch_dbIs to be fitted to obtain C_ga、C_gdc、C_dbThe values are respectively used as search upper limit values corresponding to the gate-source branch total capacitance, the gate-drain branch total capacitance and the drain-source branch total capacitance in an optimal parasitic capacitance value circulation program in MATLAB software, and the gate-source branch in the optimal parasitic capacitance value circulation program is usedThe search lower limit values corresponding to the total capacitance, the gate-drain branch total capacitance and the drain-source branch total capacitance are set to be 0, namely, 0 is less than or equal to (C)_pg+C_gsi+C_gs)≤C_ga，0≤(C_pd+C_dsi+C_ds)≤C_db,0≤(C_pgd+C_gd+C_gdi)≤C_gdcOptimizing a threshold space for parasitic capacitance; under the cold pinch-off bias state, the physical characteristics of the channel depletion layer of the GaN HEMT device are determined by C_gs＝C_gdMixing C with_gs＝C_gdAs a constraint condition for an optimal parasitic capacitance value circulation procedure;

step S104: executing an optimal parasitic capacitance value circulation program in MATLAB software, wherein the specific flow of the optimal parasitic capacitance value circulation program is as follows: firstly, 6 randomly distributed parasitic capacitance values are generated in an optimized space as C_pg、C_gsi、C_pgd、C_gdi、C_pd、C_dsiAnd analyzing the stability of the 6 capacitance values, namely judging that 0 is less than or equal to (C)_pg+C_gsi+C_gs)≤C_ga，0≤(C_pd+C_dsi+C_ds)≤C_db，0≤(C_pgd+C_gd+C_gdi)≤C_gdcWhether the three conditions are simultaneously satisfied; if the above three conditions cannot be satisfied simultaneously, 6 parasitic capacitance values are regenerated as C according to Metropolis criterion_pg、C_gsi、C_pgd、C_gdi、C_pd、C_dsiIf the three conditions are satisfied simultaneously, the 6 parasitic capacitance values are accepted; then, the 6 parasitic capacitance values are adopted to simulate the first simplified circuit model to obtain the simulated S parameters of the first simplified circuit model at each frequency point, and the simulated S parameters of the first simplified circuit model at the kth frequency point are recorded as S1_k，S1_kIs a 2 × 2 matrix, S1_kEach element in the series is a plurality; calculating the total error epsilon between the S parameter of the GaN HEMT transistor in the cold pinch-off bias state obtained by the test and the simulation S parameter of the first simplified circuit model by adopting the formula (7):

wherein,

is S_kThe ith row and the jth column of (g),

is S1_kElement of ith row and jth column, | non-woven²Representing the modulus and then the square, max (|)²Representing that the maximum value is taken after the modulus square is taken;

then judging whether the total error epsilon reaches the minimum value (the total error minimum value is 0), if so, ending the optimal parasitic capacitance value circulation program, and taking the 6 parasitic capacitance values generated at this time as an optimal group of parasitic capacitance values; if the total error does not reach the minimum value, 6 parasitic capacitance values are generated again according to the Metropolis criterion to carry out next circulation, and the circulation is repeated until the total error is minimum;

step S2: extracting the inductance value of the parasitic inductance and the resistance value of the parasitic resistance:

step S201: testing the S parameter of the GaN HEMT transistor at each frequency point under the weak forward bias state to obtain the S parameter of the GaN HEMT transistor at each frequency point under the weak forward bias state, and recording the S parameter of the GaN HEMT transistor at the kth frequency point under the weak forward bias state as S2_k，S2_kIs a 2 × 2 matrix, S2_kEach element is a plurality, and under the weak forward bias state, the small-signal equivalent circuit model of the GaN HEMT transistor is simplified and the intrinsic capacitance C is increased_g、C_s、C_dObtaining a second simplified circuit model which only comprises parasitic inductances L1, L2 and L3, parasitic resistances R1, R2 and R3 and an intrinsic capacitor C_g、C_s、C_dUnder weak forward bias condition, the grid current of GaN HEMT transistor is higher, and the intrinsic capacitance C_g、C_s、C_dHas a very small capacitance value which is ignored(ii) a One end of the parasitic inductor L1 is equivalent to the grid of the GaN HEMT transistor, the other end of the parasitic inductor L1 is connected with one end of the parasitic resistor R1, and the other end of the parasitic resistor R1 is connected with the intrinsic capacitor C_gIs connected to an intrinsic capacitance C_gAnother terminal of (1), intrinsic capacitance C_dAnd an intrinsic capacitance C_sIs connected to an intrinsic capacitance C_sIs connected with one end of a parasitic resistor R3, the other end of the parasitic resistor R3 is connected with one end of a parasitic inductor L3, the other end of the parasitic inductor L3 is equivalent to the source of the GaN HEMT transistor, and an intrinsic capacitor C_dThe other end of the parasitic resistor R2 is connected with one end of a parasitic inductor L2, and the other end of the parasitic inductor L2 is equivalent to the drain electrode of the GaN HEMT transistor;

step S202: a set of optimal parasitic capacitance values (i.e., C) extracted in the S parameter stripping step S1 of a GaN HEMT transistor tested under weak forward bias condition_pg、C_gsi、C_pgd、C_gdi、C_pd、C_dsiThe optimal capacitance value) of the GaN HEMT transistor is obtained, the Z parameter of the GaN HEMT transistor with the optimal parasitic capacitance value stripped at each frequency point in the weak forward bias state is obtained by converting the Z parameter into the Z parameter, and the Z parameter of the GaN HEMT transistor with the optimal parasitic capacitance value stripped at the kth frequency point in the weak forward bias state is recorded as Z parameter_k，Z_kIs a 2 × 2 matrix, Z_kWherein each element is a complex number, Re () represents the real part of the complex number, Im () represents the imaginary part of the complex number, and Z is represented by_kIs denoted as Z for the element of row 1 and column 1_11,kThe 1 st row and 2 nd column element is marked as Z_12,kLine 2, column 1 element is denoted as Z_21,kAnd the 2 nd row and 2 nd column element is marked as Z_22,k(ii) a The relationship between the Z parameter, which strips a set of optimal parasitic capacitance values under weak forward bias conditions, and the inductance values of the parasitic inductances L1, L2, L3 and the resistance values of the parasitic resistances R1, R2, R3 is expressed as:

Z_11,k＝R_g,k+R_s,k+jω_k(L_g,k+L_s,k) (8)

Z_12,k＝R_s,k+jω_kL_s,k (9)

Z_22,k＝R_d,k+R_s,k+jω_k(L_d,k+L_s,k) (10)

wherein R is_g,kRepresents R at the k-th frequency point_gValue of (A), R_s,kRepresents R at the k-th frequency point_sValue of (A), R_d,kRepresents R at the k-th frequency point_dValue of (A), L_g,kRepresents L at the k-th frequency point_gValue of (A), L_s,kRepresents L at the k-th frequency point_sValue of (A), L_d,kRepresents L at the k-th frequency point_dTaking the value of (A);

in the equations (8), (9), (10), at each frequency point, there is an equation Re (Z)_11,k)＝R_g,k+R_s,k、Re(Z_12,k)＝R_s,kAnd Re (Z)_22,k)＝R_d,k+R_s,kIf it is true, R at each frequency point can be solved from the above three equations_g,k，R_s,kAnd R_d,kValue of R_g,1To R_g,NIs taken as R_gR is to be_s,1To R_s,NIs taken as R_sR is to be_d,1To R_d,NIs taken as R_dFurther reducing errors caused by testing uncertainty, wherein a resistance value calculation formula of the parasitic resistor is as follows:

wherein, Re (Z)_ij,k) Represents Z_kThe real part value of the ith row and jth column element of (1), i is 1,2, j is 1, 2;

step S203, after solving the parasitic resistance, the parasitic resistance is calculated at the two ends of the formulas (8), (9) and (10)While multiplying by angular frequency ω_kFitting omega according to the imaginary part of the Z parameter of the GaN HEMT transistor with the optimal parasitic capacitance stripped in the weak forward bias state_kIm(Z_ij) And omega_k ²I.e. fitting ω_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_11,k)-ω_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_22,k)-ω_k*Im(Z_12,k) And omega_k ²The fitting is realized by MATLAB software, and omega is directly obtained_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_11,k)-ω_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_22,k)-ω_k*Im(Z_12,k) And omega_k ²The slopes of the three fitted linear lines are respectively taken as L_g、L_sAnd L_dIs formulated as:

ω_k Im(Z_12,k)＝L_s,kω_k ² (14)

ω_k Im(Z_11,k)-ω_k Im(Z_12,k)＝L_g,kω_k ² (15)

ω_k Im(Z_22,k)-ω_kIm(Z_12,k)＝L_d,kω_k ² (16)

wherein Im (Z)_ij,k) Represents Z_kI-1, 2, j-1, 2, the imaginary value of the ith row and jth column element of (1).

Step S3: extracting capacitance values of the intrinsic capacitor, resistance values of the intrinsic resistor and conductance values of the intrinsic conductance, and the specific process is as follows:

step S301: testing S parameters of the GaN HEMT transistor in a thermal bias state to obtain S parameters of the GaN HEMT transistor at each frequency point in the thermal bias state, and stripping the S parameters of the GaN HEMT transistor at each frequency point in the thermal bias state from parasitic capacitance, parasitic inductance and parasitic resistance to obtain the GaN HEMT transistor with stripped parasitic capacitance, parasitic inductance and parasitic resistanceConverting the S parameter stripped of the parasitic capacitance, the parasitic inductance and the parasitic resistance into a Y parameter to obtain the Y parameter at each frequency point of the GaN HEMT transistor stripped of the parasitic capacitance, the parasitic inductance and the parasitic resistance in a thermal bias state, and recording the Y parameter at the kth frequency point of the GaN HEMT transistor stripped of the parasitic capacitance, the parasitic inductance and the parasitic resistance in the thermal bias state as the Y parameter

Is a matrix of 2 x 2, and is,

wherein each element is a plural number, will

1 row and 1 column of

Line 1, column 2 elements

Line 2, column 1 elements

Line 2, column 2 elements

The value G of the intrinsic conductance G1, G2 at the k-th frequency point_gsf,k、G_gdf,kBy using

Expressed as:

intrinsic conductance G for each frequency point correspondence_gsf,k、G_gdf,kTaking the average value of the intrinsic conductance under all frequency points as the final value of the intrinsic conductance under the thermal bias state, thereby obtaining the intrinsic conductance G under the thermal bias state_gsf、G_gdfA value of (d);

step S302: from

Middle-stripped intrinsic conductance G_gsf、G_gdfTo obtain a strip of intrinsic conductance G_gsf、G_gdfY parameter of (2), as

Is a matrix of 2 x 2, and is,

1 row and 1 column of

Line 1, column 2 elements

Line 2, column 1 elements

Line 2, column 2 elements

The calculation formula for the remaining 8 eigen-elements at the k-th frequency point is:

where Re () represents the real part of the complex number, Im () represents the imaginary part of the complex number, abs () is the absolute value, C_gs,kDenotes C at the k-th frequency point_gsValue of (A), C_gd,kDenotes C at the k-th frequency point_gdValue of (A), C_ds,kDenotes C at the k-th frequency point_dsValue of (A), G_m,kDenotes G at the k-th frequency point_mValue of (A), G_ds,kDenotes G at the k-th frequency point_dsValue of (A), R_i,kRepresents R at the k-th frequency point_iValue of (A), R_gd,kRepresents R at the k-th frequency point_gdValue of (a), τ_kRepresenting the value of tau at the kth frequency point; taking the mean value of values of all frequency points of the intrinsic element as the parameter final value of the intrinsic element in the thermal bias state aiming at the parameter value of the intrinsic element at each frequency point, thereby obtaining the parameter final value of each intrinsic element in the thermal bias state;

step S4: and substituting the solved optimal parasitic capacitance value, parasitic inductance, parasitic resistance and intrinsic element value into a small-signal equivalent circuit model established by ADS radio frequency simulation software, so as to obtain a complete small-signal model of the GaN HEMT transistor.

Compared with the prior art, the method has the advantages that in the process of constructing the small-signal model of the GaN HEMT transistor, the mixed extraction method is further improved, and only C is optimized_pg、C_gsi、C_pgd、C_gdi、C_pd、C_dsiThe 6 parasitic capacitance values are simple and time-saving in the optimization process, and the problem of error accumulation caused by multi-parameter optimization is greatly reduced; and making reasonable assumptions according to the physical characteristics of the device (i.e. in step S103, under the cold pinch-off bias state, according to the physical characteristics of the channel depletion layer of the GaN HEMT device, assume C_gs＝C_gdMixing C with_gs＝C_gdAs a constraint condition of an optimal parasitic capacitance value circulation program), the reliability of the parameter extraction result is high, so that the obtained small signal model parameter value has correct physical significance, the working state of the device can be accurately reflected, the method can be used for devices with different structures, and the transportability and the universality are high.

Drawings

FIG. 1 is a schematic flow diagram of the present invention;

FIG. 2 is a flowchart of an MATLAB parasitic capacitance optimization procedure of the present invention;

FIG. 3 is a schematic diagram of a small-signal equivalent circuit model of a GaN HEMT device of the invention;

FIG. 4 is a schematic diagram of an equivalent circuit of the GaN HEMT device of the present invention in a cold pinch-off state;

FIG. 5 is a schematic diagram of an equivalent circuit of the GaN HEMT device of the present invention under a weak forward bias condition;

FIG. 6 is a comparison of small signal model simulation data and test data established in the present invention.

Detailed Description

The invention is described in further detail below with reference to the accompanying examples.

Example (b): as shown in fig. 1, a method for modeling a small-signal model of a GaN HEMT transistor includes the steps of:

step S1: extracting an optimal parasitic capacitance value:

step S101: constructing a small-signal equivalent circuit model of the GaN HEMT transistor in ADS radio frequency simulation software, wherein the small-signal equivalent circuit model comprises a parasitic element and an intrinsic element, and the parasitic element comprises parasitic capacitors C1, C2, C3, C4, C5 and C6, parasitic inductors L1, L2 and L3, and parasitic resistors R1, R2 and R3; the intrinsic element comprises intrinsic capacitances C7, C8 and C9, intrinsic resistances R4 and R5, intrinsic conductances G1, G2 and G3, and intrinsic voltage-controlled current source with output current I_ds＝V_gsG_me^-jωτWherein G is_mIs transconductance of GaN HEMT transistor (representing gate voltage V of GaN HEMT transistor_gsTo drain current I_dsControl capability of) tau is the time delay of the gate voltage of the GaN HEMT transistor (arrival time of the gate voltage of the GaN HEMT transistor), V_gsIs the voltage across the intrinsic capacitor C7 (i.e., the gate voltage of the GaN HEMT transistor), ω is the angular frequency of the GaN HEMT transistor, j is the imaginary sign, and e is the base of the natural logarithm; one end of a parasitic capacitor C1, one end of a parasitic capacitor C3 and one end of a parasitic inductor L1 are connected and the connection ends thereof are equivalent to the gate of a GaN HEMT transistor, the other end of the parasitic capacitor C1, one end of the parasitic inductor L3 and one end of a parasitic capacitor C5 are connected and the connection ends thereof are equivalent to the source of the GaN HEMT transistor, one end of a parasitic capacitor C2, one end of a parasitic capacitor C4, the other end of the parasitic inductor L1 and one end of a parasitic resistor R1 are connected, the other end of the parasitic capacitor C2, the other end of a parasitic inductor L3, one end of a parasitic resistor R3 and a parasitic capacitor C6 are connected, the other end of a parasitic capacitor C3, the other end of a parasitic capacitor C5 and one end of a parasitic inductor L2 are connected and the connection ends thereof are equivalent to the drain of the GaN HEMT transistor, the other end of a parasitic capacitor C4, one end of a parasitic resistor R2, the other end of a parasitic inductor L2 and the other end of a parasitic capacitor C6 are connected, the other end of the parasitic resistor R1, one end of the intrinsic capacitor C7, one end of the intrinsic capacitor C8, one end of the intrinsic conductance G1 and one end of the intrinsic conductance G2 are connected, the other end of the parasitic resistor R2, one end of the intrinsic capacitor C9, the other end of the intrinsic conductance G2, one end of the intrinsic conductance G3 and one end of the intrinsic conductanceOne end of a resistor R5 is connected with the anode of the intrinsic voltage-controlled current source, the other end of a parasitic resistor R3, one end of an intrinsic resistor R4, the other end of an intrinsic conductance G1, the other end of an intrinsic capacitor C9, the other end of an intrinsic conductance G3 are connected with the cathode of the intrinsic voltage-controlled current source, the other end of an intrinsic capacitor C7 is connected with the other end of an intrinsic resistor R4, and the other end of an intrinsic capacitor C8 is connected with the other end of an intrinsic resistor R5; let the capacitance value of the parasitic capacitance C1 be C_pgThe capacitance value of the parasitic capacitance C2 is denoted as C_gsiThe capacitance value of the parasitic capacitance C3 is denoted as C_pgdThe capacitance value of the parasitic capacitance C4 is denoted as C_gdiThe capacitance value of the parasitic capacitance C5 is denoted as C_pdThe capacitance value of the parasitic capacitance C6 is denoted as C_dsi(ii) a The inductance of the parasitic inductor L1 is denoted as L_gThe inductance of the parasitic inductor L2 is denoted as L_dThe inductance of the parasitic inductor L3 is denoted as L_s(ii) a The resistance of the parasitic resistor R1 is denoted as R_gThe resistance value of the parasitic resistor R2 is denoted as R_dThe resistance value of the parasitic resistor R3 is denoted as R_s(ii) a The capacitance value of the intrinsic capacitance C7 is denoted as C_gsThe capacitance value of the intrinsic capacitance C8 is denoted as C_gdThe capacitance value of the intrinsic capacitance C9 is denoted as C_dsThe resistance of the intrinsic resistor R4 is denoted as R_iThe resistance of the intrinsic resistor R5 is denoted as R_gdThe value of the intrinsic conductance G1 is denoted as G_gsfThe value of the intrinsic conductance G2 is denoted as G_gdfThe value of the intrinsic conductance G3 is denoted as G_ds；

Step S102: testing the S parameter of the GaN HEMT transistor in a cold pinch-off bias state to obtain the S parameter of the GaN HEMT transistor at each frequency point in the cold pinch-off bias state, wherein the total number of the frequency points is recorded as N, and the k-th frequency point is recorded as f_kN, (the total number of frequency points is closely related to the working frequency range of the GaN HEMT transistor, when the vector network analyzer tests S parameters, frequency points can be automatically generated according to the frequency range set by a user, the user can also set the frequency points according to actual requirements, and the frequency points of the invention are automatically generated by the vector network analyzer) to record the S parameters of the GaN HEMT transistor at the kth frequency point in the cold pinch-off bias state as S_k，S_kIs a 2 × 2 matrix, S_kEach element in the series is a plurality;

the small-signal equivalent circuit model of the GaN HEMT transistor is simplified to obtain a first simplified circuit model, as shown in fig. 4, the first simplified circuit model only includes parasitic capacitors C1, C2, C3, C4, C5, C6, intrinsic capacitors C7, C8, and C9, at this time, one end of the parasitic capacitor C1, one end of the parasitic capacitor C2, one end of the parasitic capacitor C5, one end of the parasitic capacitor C6, one end of the intrinsic capacitor C7, and one end of the intrinsic capacitor C9 are connected, and the connection ends thereof are equivalent to the source of the GaN HEMT transistor, the other end of the parasitic capacitor C1, the other end of the parasitic capacitor C2, one end of the parasitic capacitor C3, one end of the parasitic capacitor C4, the other end of the intrinsic capacitor C7, and one end of the intrinsic capacitor C8, and the connection ends thereof are equivalent to the gate of the GaN HEMT transistor, the other end of the parasitic capacitor C5, the other end of the parasitic capacitor C6, the other end of the parasitic capacitor C3, and the other end of the parasitic capacitor C3 are equivalent to the gate of the source of the parasitic capacitor C3684, The other end of the parasitic capacitor C4, the other end of the intrinsic capacitor C8 and the other end of the intrinsic capacitor C9 are connected, and the connecting end of the connecting end is equivalent to the drain electrode of the GaN HEMT transistor; establishing a first simplified circuit model in ADS radio frequency simulation software;

C_ga＝C_pg+C_gsi+C_gs (1)

C_gdc＝C_pgd+C_gd+C_gdi (2)

C_db＝C_pd+C_dsi+C_ds (3)

step S103: dividing the S parameter of the GaN HEMT transistor at each frequency point under the cold pinch-off bias state obtained by the testRespectively converting the voltage into Y parameters to obtain the Y parameters of the GaN HEMT transistor at each frequency point under the cold pinch-off bias state, and recording the Y parameters of the GaN HEMT transistor at the kth frequency point under the cold pinch-off bias state as Y_k，Y_kIs a 2 × 2 matrix, Y_kEach element in the group is a plural number, and Y is_kIs marked as Y for the 1 st row and 1 st column element_11,kThe 1 st row and 2 nd column elements are marked as Y_12,kLine 2, column 1 element is denoted as Y_21,kAnd the 2 nd row and 2 nd column element is marked as Y_22,k(ii) a At this time, the total capacitance C of the gate-source branch_gaGate-drain branch total capacitance C_gdcTotal capacitance of drain-source branch C_dbThe relation with the Y parameter of the GaN HEMT transistor in a cold pinch-off bias state is as follows:

Im(Y_11,k)+Im(Y_12,k)＝C_ga,kω_k (4)

Im(Y_12,k)＝-C_gdc,kω_k (5)

Im(Y_22,k)+Im(Y_12,k)＝C_db,kω_k (6)

fitting the imaginary part and angular frequency omega of each element in the Y parameter of the GaN HEMT transistor at the kth frequency point under the cold pinch-off bias state according to the formulas (4) to (6)_kI.e. fitting Im (Y)_11,k)+Im(Y_12,k) And omega_k、Im(Y_12,k) And omega_k、Im(Y_22,k)+Im(Y_12,k) And omega_kThe fitting process is realized in MATLAB software, and Im (Y) is directly obtained through the MATLAB software_11,k)+Im(Y_12,k) And omega_k、Im(Y_12,k) And omega_k、Im(Y_22,k)+Im(Y_12,k) And omega_kThe three fitted linear lines and the slopes of the three fitted linear lines will be Im (Y)_11,k)+Im(Y_12,k) And omega_kThe slope of the fitted linear straight line of (2) is taken as the total capacitance C of the gate-source branch_gaValue of (a), Im (Y)_12,k) And omega_kThe slope of the fitted linear straight line of (1) is used as the total capacitance C of the gate-drain branch_gdcValue of (a), Im (Y)_22,k)+Im(Y_12,k) And omega_kThe slope of the fitted linear straight line of (1) is taken as the total capacitance C of the drain-source branch_dbIs to be fitted to obtain C_ga、C_gdc、C_dbThe values are respectively used as the searching upper limit values corresponding to the total capacitance of the gate-source branch, the total capacitance of the gate-drain branch and the total capacitance of the drain-source branch in an optimal parasitic capacitance value circulation program in MATLAB software, and the searching lower limit values corresponding to the total capacitance of the gate-source branch, the total capacitance of the gate-drain branch and the total capacitance of the drain-source branch in the optimal parasitic capacitance value circulation program are set to be 0, namely 0 is more than or equal to (C is more than or equal to_pg+C_gsi+C_gs)≤C_ga，0≤(C_pd+C_dsi+C_ds)≤C_db,0≤(C_pgd+C_gd+C_gdi)≤C_gdcOptimizing a threshold space for parasitic capacitance; under the cold pinch-off bias state, the physical characteristics of the channel depletion layer of the GaN HEMT device are determined by C_gs＝C_gdMixing C with_gs＝C_gdAs a constraint condition for an optimal parasitic capacitance value circulation procedure;

step S104: executing an optimal parasitic capacitance value circulation program in MATLAB software, as shown in FIG. 2, wherein the specific flow of the optimal parasitic capacitance value circulation program is as follows: firstly, 6 randomly distributed parasitic capacitance values are generated in an optimized space as C_pg、C_gsi、C_pgd、C_gdi、C_pd、C_dsiAnd analyzing the stability of the 6 capacitance values, namely judging that 0 is less than or equal to (C)_pg+C_gsi+C_gs)≤C_ga，0≤(C_pd+C_dsi+C_ds)≤C_db，0≤(C_pgd+C_gd+C_gdi)≤C_gdcWhether the three conditions are simultaneously satisfied; if the above three stripsIf the devices cannot be simultaneously established, 6 parasitic capacitance values are regenerated as C according to Metropolis criterion_pg、C_gsi、C_pgd、C_gdi、C_pd、C_dsiIf the three conditions are satisfied simultaneously, the 6 parasitic capacitance values are accepted; then, the 6 parasitic capacitance values are adopted to simulate the first simplified circuit model to obtain the simulated S parameters of the first simplified circuit model at each frequency point, and the simulated S parameters of the first simplified circuit model at the kth frequency point are recorded as S1_k，S1_kIs a 2 × 2 matrix, S1_kEach element in the series is a plurality; calculating the total error epsilon between the S parameter of the GaN HEMT transistor in the cold pinch-off bias state obtained by the test and the simulation S parameter of the first simplified circuit model by adopting the formula (7):

wherein,

is S_kThe ith row and the jth column of (g),

step S201: testing under weak forward bias conditionsObtaining the S parameters of the GaN HEMT transistor at each frequency point under the weak forward bias state by the S parameters of the GaN HEMT transistor at each frequency point, and recording the S parameters of the GaN HEMT transistor at the kth frequency point under the weak forward bias state as S2_k，S2_kIs a 2 × 2 matrix, S2_kEach element is a plurality, and under the weak forward bias state, the small-signal equivalent circuit model of the GaN HEMT transistor is simplified and the intrinsic capacitance C is increased_g、C_s、C_dThen, a second simplified circuit model is obtained, as shown in fig. 5, the second simplified circuit model only includes parasitic inductances L1, L2, and L3, parasitic resistances R1, R2, and R3, and an intrinsic capacitance C_g、C_s、C_dUnder weak forward bias condition, the grid current of GaN HEMT transistor is higher, and the intrinsic capacitance C_g、C_s、C_dThe capacitance value of (2) is very small and is ignored; one end of the parasitic inductor L1 is equivalent to the grid of the GaN HEMT transistor, the other end of the parasitic inductor L1 is connected with one end of the parasitic resistor R1, and the other end of the parasitic resistor R1 is connected with the intrinsic capacitor C_gIs connected to an intrinsic capacitance C_gAnother terminal of (1), intrinsic capacitance C_dAnd an intrinsic capacitance C_sIs connected to an intrinsic capacitance C_sIs connected with one end of a parasitic resistor R3, the other end of the parasitic resistor R3 is connected with one end of a parasitic inductor L3, the other end of the parasitic inductor L3 is equivalent to the source of the GaN HEMT transistor, and an intrinsic capacitor C_dThe other end of the parasitic resistor R2 is connected with one end of a parasitic inductor L2, and the other end of the parasitic inductor L2 is equivalent to the drain electrode of the GaN HEMT transistor;

step S202: a set of optimal parasitic capacitance values (i.e., C) extracted in the S parameter stripping step S1 of a GaN HEMT transistor tested under weak forward bias condition_pg、C_gsi、C_pgd、C_gdi、C_pd、C_dsiThe optimal capacitance value) of the GaNHEMT transistor, then converting the Z parameter into a Z parameter to obtain the Z parameter of the GaNHEMT transistor with a group of optimal parasitic capacitance values stripped at each frequency point under the weak forward bias state, and stripping a group of optimal parasitic electricity from the kth frequency point under the weak forward bias stateThe Z parameter of the GaN HEMT transistor with the capacitance value is recorded as Z_k，Z_kIs a 2 × 2 matrix, Z_kWherein each element is a complex number, Re () represents the real part of the complex number, Im () represents the imaginary part of the complex number, and Z is represented by_kIs denoted as Z for the element of row 1 and column 1_11,kThe 1 st row and 2 nd column element is marked as Z_12,kLine 2, column 1 element is denoted as Z_21,kAnd the 2 nd row and 2 nd column element is marked as Z_22,k(ii) a The relationship between the Z parameter, which strips a set of optimal parasitic capacitance values under weak forward bias conditions, and the inductance values of the parasitic inductances L1, L2, L3 and the resistance values of the parasitic resistances R1, R2, R3 is expressed as:

Z_11,k＝R_g,k+R_s,k+jω_k(L_g,k+L_s,k) (8)

Z_12,k＝R_s,k+jω_kL_s,k (9)

Z_22,k＝R_d,k+R_s,k+jω_k(L_d,k+L_s,k) (10)

in the equations (8), (9), (10), at each frequency point, there is an equation Re (Z)_11,k)＝R_g,k+R_s,k、Re(Z_12,k)＝R_s,kAnd Re (Z)_22,k)＝R_d,k+R_s,kIf it is true, R at each frequency point can be solved from the above three equations_g,k，R_s,kAnd R_d,kValue of R_g,1To R_g,NIs taken as R_gR is to be_s,1To R_s,NIs taken as R_sR is to be_d,1To R_d,NIs taken as R_dFurther reducing the error caused by the uncertainty of the test, and calculating the resistance value of the parasitic resistanceThe formula is as follows:

step S203, after solving the parasitic resistance, multiplying the two ends of the formulas (8), (9) and (10) by the angular frequency omega_kFitting omega according to the imaginary part of the Z parameter of the GaN HEMT transistor with the optimal parasitic capacitance stripped in the weak forward bias state_k Im(Z_ij) And omega_k ²I.e. fitting ω_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_11,k)-ω_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_22,k)-ω_k*Im(Z_12,k) And omega_k ²The fitting is realized by MATLAB software, and omega is directly obtained_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_11,k)-ω_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_22,k)-ω_k*Im(Z_12,k) And omega_k ²The slopes of the three fitted linear lines are respectively taken as L_g、L_sAnd L_dIs formulated as:

ω_k Im(Z_12,k)＝L_s,kω_k ² (14)

ω_k Im(Z_11,k)-ω_k Im(Z_12,k)＝L_g,kω_k ² (15)

ω_k Im(Z_22,k)-ω_k Im(Z_12,k)＝L_d,kω_k ² (16)

step S301: testing S parameters of the GaN HEMT transistor in a thermal bias state to obtain S parameters of the GaN HEMT transistor at each frequency point in the thermal bias state, stripping the S parameters of the GaN HEMT transistor at each frequency point in the thermal bias state from parasitic capacitance, parasitic inductance and parasitic resistance to obtain S parameters stripped from parasitic capacitance, parasitic inductance and parasitic resistance, converting the S parameters stripped from parasitic capacitance, parasitic inductance and parasitic resistance into Y parameters to obtain Y parameters at each frequency point of the GaN HEMT transistor stripped from parasitic capacitance, parasitic inductance and parasitic resistance in the thermal bias state, and recording the Y parameters at the kth frequency point of the GaNHEMT transistor stripped from parasitic capacitance, parasitic inductance and parasitic resistance in the thermal bias state as Y parameters

Is a matrix of 2 x 2, and is,

wherein each element is a plural number, will

1 row and 1 column of

Line 1, column 2 elements

Line 2, column 1 elements

Line 2, column 2 elements

Expressed as:

step S302: from

Is a matrix of 2 x 2, and is,

1 row and 1 column of

Line 1, column 2 elements

Line 2, column 1 elements

Line 2, column 2 elements

In a thermal bias state (a bias state that the grid voltage Vgs of the GaN HEMT transistor is minus 2.8V and the drain voltage Vds is 28V is selected), a complete small-signal model of the GaN HEMT transistor obtained by the method is simulated to obtain a simulated S parameter of the GaN HEMT transistor, and the simulated S parameter is compared with an actually measured S parameter of the GaN HEMT transistor, wherein a comparison curve is shown in FIG. 6 (a solid line is actually measured S parameter data, and a circle is simulated S parameter data). The simulation S parameter and the actual measurement S parameter in the Smith original image in FIG. 6 have good consistency, and the reliability of the GaNHEMT transistor small-signal model modeling method provided by the invention is verified.

Claims

1. A modeling method of a small signal model of a GaN HEMT transistor is characterized by comprising the following steps:

step S1: extracting an optimal parasitic capacitance value:

step S101: constructing a small-signal equivalent circuit model of the GaN HEMT transistor in ADS radio frequency simulation software, wherein the small-signal equivalent circuit model comprises a parasitic element and an intrinsic element, and the small-signal equivalent circuit model comprises a parasitic element and an intrinsic elementThe parasitic elements of (1) comprise parasitic capacitances C1, C2, C3, C4, C5, C6, parasitic inductances L1, L2, L3 and parasitic resistances R1, R2, R3; the intrinsic element comprises intrinsic capacitors C7, C8 and C9, intrinsic resistors R4 and R5, intrinsic conductances G1, G2 and G3 and an intrinsic voltage-controlled current source, wherein the output current I of the intrinsic voltage-controlled current source_ds＝V_gsG_me^-jωτWherein G is_mIs transconductance of the GaN HEMT transistor, tau is time delay of grid voltage of the GaN HEMT transistor, V_gsIs the voltage across the intrinsic capacitor C7, ω is the angular frequency of the GaN HEMT transistor, j is the imaginary sign, and e is the base of the natural logarithm; one end of a parasitic capacitor C1, one end of a parasitic capacitor C3 and one end of a parasitic inductor L1 are connected and the connection ends thereof are equivalent to the gate of a GaN HEMT transistor, the other end of the parasitic capacitor C1, one end of the parasitic inductor L3 and one end of a parasitic capacitor C5 are connected and the connection ends thereof are equivalent to the source of the GaN HEMT transistor, one end of a parasitic capacitor C2, one end of a parasitic capacitor C4, the other end of the parasitic inductor L1 and one end of a parasitic resistor R1 are connected, the other end of the parasitic capacitor C2, the other end of a parasitic inductor L3, one end of a parasitic resistor R3 and a parasitic capacitor C6 are connected, the other end of a parasitic capacitor C3, the other end of a parasitic capacitor C5 and one end of a parasitic inductor L2 are connected and the connection ends thereof are equivalent to the drain of the GaN HEMT transistor, the other end of a parasitic capacitor C4, one end of a parasitic resistor R2, the other end of a parasitic inductor L2 and the other end of a parasitic capacitor C6 are connected, the other end of the parasitic resistor R1, one end of the intrinsic capacitor C7, one end of the intrinsic capacitor C8, one end of the intrinsic conductance G1 and one end of the intrinsic conductance G2 are connected, the other end of the parasitic resistor R2, one end of the intrinsic capacitor C9, the other end of the intrinsic conductance G2, one end of the intrinsic conductance G3, one end of the intrinsic resistor R5 and the anode of the intrinsic voltage-controlled current source are connected, the other end of the parasitic resistor R3, one end of the intrinsic resistor R4, the other end of the intrinsic conductance G1, the other end of the intrinsic capacitor C9, the other end of the intrinsic conductance G3 and the cathode of the intrinsic voltage-controlled current source are connected, the other end of the intrinsic capacitor C7 is connected with the other end of the intrinsic resistor R4, and the other end of the intrinsic capacitor C8 is connected with the other end of the intrinsic resistor R5; let the capacitance value of the parasitic capacitance C1 be C_pgCapacitance value of parasitic capacitance C2Is C_gsiThe capacitance value of the parasitic capacitance C3 is denoted as C_pgdThe capacitance value of the parasitic capacitance C4 is denoted as C_gdiThe capacitance value of the parasitic capacitance C5 is denoted as C_pdThe capacitance value of the parasitic capacitance C6 is denoted as C_dsi(ii) a The inductance of the parasitic inductor L1 is denoted as L_gThe inductance of the parasitic inductor L2 is denoted as L_dThe inductance of the parasitic inductor L3 is denoted as L_s(ii) a The resistance of the parasitic resistor R1 is denoted as R_gThe resistance value of the parasitic resistor R2 is denoted as R_dThe resistance value of the parasitic resistor R3 is denoted as R_s(ii) a The capacitance value of the intrinsic capacitance C7 is denoted as C_gsThe capacitance value of the intrinsic capacitance C8 is denoted as C_gdThe capacitance value of the intrinsic capacitance C9 is denoted as C_dsThe resistance of the intrinsic resistor R4 is denoted as R_iThe resistance of the intrinsic resistor R5 is denoted as R_gdThe value of the intrinsic conductance G1 is denoted as G_gsfThe value of the intrinsic conductance G2 is denoted as G_gdfThe value of the intrinsic conductance G3 is denoted as G_ds；

the sum of the capacitance values of the parasitic capacitance C1, the parasitic capacitance C2 and the intrinsic capacitance C7 is used as the total capacitance C of the gate-source branch of the GaN HEMT transistor in the cold pinch-off bias state_gaThe sum of the capacitance values of the parasitic capacitance C3, the parasitic capacitance C4 and the intrinsic capacitance C8 is used as the total gate-drain branch capacitance C of the GaN HEMT transistor in the cold pinch-off bias state_gdcThe sum of the capacitance values of the parasitic capacitance C5, the parasitic capacitance C6 and the intrinsic capacitance C9 is used as the total capacitance C of the drain-source branch of the GaN HEMT transistor in the cold pinch-off bias state_dbTo obtain formulae (1) to (3):

C_ga＝C_pg+C_gsi+C_gs (1)

C_gdc＝C_pgd+C_gd+C_gdi (2)

C_db＝C_pd+C_dsi+C_ds (3)

Im(Y_11,k)+Im(Y_12,k)＝C_ga,kω_k (4)

Im(Y_12,k)＝-C_gdc,kω_k (5)

Im(Y_22,k)+Im(Y_12,k)＝C_db,kω_k (6)

fitting the imaginary part and angular frequency omega of each element in the Y parameter of the GaN HEMT transistor at the kth frequency point under the cold pinch-off bias state according to the formulas (4) to (6)_kI.e. fitting Im (Y)_11,k)+Im(Y_12,k) And omega_k、Im(Y_12,k) And omega_k、Im(Y_22,k)+Im(Y_12,k) And omega_kThe fitting process is realized in MATLAB software, and Im (Y) is directly obtained through the MATLAB software_11,k)+Im(Y_12,k) And omega_k、Im(Y_12,k) And omega_k、Im(Y_22,k)+Im(Y_12,k) And omega_kThe three fitted linear lines and the slopes of the three fitted linear lines will be Im (Y)_11,k)+Im(Y_12,k) And omega_kThe slope of the fitted linear straight line of (2) is taken as the total capacitance C of the gate-source branch_gaValue of (a), Im (Y)_12,k) And omega_kThe slope of the fitted linear straight line of (1) is used as the total capacitance C of the gate-drain branch_gdcValue of (a), Im (Y)_22,k)+Im(Y_12,k) And omega_kThe slope of the fitted linear straight line of (1) is taken as the total capacitance C of the drain-source branch_dbIs to be fitted to obtain C_ga、C_gdc、C_dbThe values are respectively used as the corresponding search of the total capacitance of the grid-source branch, the total capacitance of the grid-drain branch and the total capacitance of the drain-source branch in the optimal parasitic capacitance value circulation program in MATLAB softwareSetting the search lower limit value corresponding to the total capacitance of the gate-source branch, the total capacitance of the gate-drain branch and the total capacitance of the drain-source branch in the optimal parasitic capacitance value circulation program to be 0, namely, the value is more than or equal to 0 (C)_pg+C_gsi+C_gs)≤C_ga，0≤(C_pd+C_dsi+C_ds)≤C_db,0≤(C_pgd+C_gd+C_gdi)≤C_gdcOptimizing a threshold space for parasitic capacitance; under the cold pinch-off bias state, the physical characteristics of the channel depletion layer of the GaN HEMT device are determined by C_gs＝C_gdMixing C with_gs＝C_gdAs a constraint condition for an optimal parasitic capacitance value circulation procedure;

step S104: executing an optimal parasitic capacitance value circulation program in MATLAB software, wherein the specific flow of the optimal parasitic capacitance value circulation program is as follows: firstly, 6 randomly distributed parasitic capacitance values are generated in an optimized space as C_pg、C_gsi、C_pgd、C_gdi、C_pd、C_dsiAnd analyzing the stability of the 6 capacitance values, namely judging that 0 is less than or equal to (C)_pg+C_gsi+C_gs)≤C_ga，0≤(C_pd+C_dsi+C_ds)≤C_db，0≤(C_pgd+C_gd+C_gdi)≤C_gdcWhether the three conditions are simultaneously satisfied; if the above three conditions cannot be satisfied simultaneously, 6 parasitic capacitance values are regenerated as C according to Metropolis criterion_pg、C_gsi、C_pgd、C_gdi、C_pd、C_dsiIf the three conditions are satisfied simultaneously, the 6 parasitic capacitance values are accepted; then, the 6 parasitic capacitance values are adopted to simulate the first simplified circuit model to obtain the simulated S parameters of the first simplified circuit model at each frequency point, and the simulated S parameters of the first simplified circuit model at the kth frequency point are recorded as S1_k，S1_kIs a 2 × 2 matrix, S1_kEach element in the series is a plurality; calculating and testing the S parameter of the GaN HEMT transistor in the cold pinch-off bias state by adopting the formula (7) and the simulation S parameter of the first simplified circuit modelTotal error ε:

wherein,

is S_kThe ith row and the jth column of (g),

step S201: testing the S parameter of the GaN HEMT transistor at each frequency point under the weak forward bias state to obtain the S parameter of the GaN HEMT transistor at each frequency point under the weak forward bias state, and recording the S parameter of the GaN HEMT transistor at the kth frequency point under the weak forward bias state as S2_k，S2_kIs a 2 × 2 matrix, S2_kEach element is a plurality, and under the weak forward bias state, the small-signal equivalent circuit model of the GaN HEMT transistor is simplified and the intrinsic capacitance C is increased_g、C_s、C_dObtaining a second simplified circuit model which only comprises parasitic inductances L1, L2 and L3, parasitic resistances R1, R2 and R3 and an intrinsic capacitor C_g、C_s、C_dUnder weak forward bias condition, the grid electrode of GaN HEMT transistorHigh current, intrinsic capacitance C_g、C_s、C_dThe capacitance value of (2) is very small and is ignored; one end of the parasitic inductor L1 is equivalent to the grid of the GaN HEMT transistor, the other end of the parasitic inductor L1 is connected with one end of the parasitic resistor R1, and the other end of the parasitic resistor R1 is connected with the intrinsic capacitor C_gIs connected to an intrinsic capacitance C_gAnother terminal of (1), intrinsic capacitance C_dAnd an intrinsic capacitance C_sIs connected to an intrinsic capacitance C_sIs connected with one end of a parasitic resistor R3, the other end of the parasitic resistor R3 is connected with one end of a parasitic inductor L3, the other end of the parasitic inductor L3 is equivalent to the source of the GaN HEMT transistor, and an intrinsic capacitor C_dThe other end of the parasitic resistor R2 is connected with one end of a parasitic inductor L2, and the other end of the parasitic inductor L2 is equivalent to the drain electrode of the GaN HEMT transistor;

step S202: a set of optimal parasitic capacitance values (i.e., C) extracted in the S parameter stripping step S1 of a GaN HEMT transistor tested under weak forward bias condition_pg、C_gsi、C_pgd、C_gdi、C_pd、C_dsiThe optimal capacitance value) of the GaN HEMT transistor is obtained, the Z parameter of the GaN HEMT transistor with the optimal parasitic capacitance value stripped at each frequency point in the weak forward bias state is obtained, and the Z parameter of the GaN HEMT transistor with the optimal parasitic capacitance value stripped at the kth frequency point in the weak forward bias state is recorded as Z parameter_k，Z_kIs a 2 × 2 matrix, Z_kWherein each element is a complex number, Re () represents the real part of the complex number, Im () represents the imaginary part of the complex number, and Z is represented by_kIs denoted as Z for the element of row 1 and column 1_11,kThe 1 st row and 2 nd column element is marked as Z_12,kLine 2, column 1 element is denoted as Z_21,kAnd the 2 nd row and 2 nd column element is marked as Z_22,k(ii) a The relationship between the Z parameter, which strips a set of optimal parasitic capacitance values under weak forward bias conditions, and the inductance values of the parasitic inductances L1, L2, L3 and the resistance values of the parasitic resistances R1, R2, R3 is expressed as:

Z_11,k＝R_g,k+R_s,k+jω_k(L_g,k+L_s,k) (8)

Z_12,k＝R_s,k+jω_kL_s,k (9)

Z_22,k＝R_d,k+R_s,k+jω_k(L_d,k+L_s,k) (10)

step S203, after solving the parasitic resistance, multiplying the two ends of the formulas (8), (9) and (10) by the angular frequency omega_kFitting omega according to the imaginary part of the Z parameter of the GaN HEMT transistor with the optimal parasitic capacitance stripped in the weak forward bias state_kIm(Z_ij) And omega_k ²I.e. fitting ω_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_11,k)-ω_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_22,k)-ω_k*Im(Z_12,k) And omega_k ²The fitting is realized by MATLAB software, and omega is directly obtained_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_11,k)-ω_k*Im(Z_12,k) And omega_k ²、ω_k*Im(Z_22,k)-ω_k*Im(Z_12,k) And omega_k ²The slopes of the three fitted linear lines are respectively taken as L_g、L_sAnd L_dIs formulated as:

ω_kIm(Z_12,k)＝L_s,kω_k ² (14)

ω_kIm(Z_11,k)-ω_kIm(Z_12,k)＝L_g,kω_k ² (15)

ω_kIm(Z_22,k)-ω_kIm(Z_12,k)＝L_d,kω_k ² (16)

step S301: testing S parameter of GaN HEMT transistor under thermal bias state to obtain each timeThe method comprises the steps of obtaining S parameters of the GaN HEMT transistor at each frequency point, stripping off parasitic capacitance, parasitic inductance and parasitic resistance from the S parameters of the GaN HEMT transistor at each frequency point in a thermal bias state to obtain S parameters stripped off the parasitic capacitance, parasitic inductance and parasitic resistance, converting the S parameters stripped off the parasitic capacitance, parasitic inductance and parasitic resistance into Y parameters to obtain Y parameters at each frequency point of the GaN HEMT transistor stripped off the parasitic capacitance, parasitic inductance and parasitic resistance in the thermal bias state, and recording the Y parameters at the kth frequency point of the GaN HEMT transistor stripped off the parasitic capacitance, parasitic inductance and parasitic resistance in the thermal bias state as the Y parameters

Is a matrix of 2 x 2, and is,

wherein each element is a plural number, will

1 row and 1 column of

Line 1, column 2 elements

Line 2, column 1 elements

Line 2, column 2 elements

Expressed as:

step S302: from

Is a matrix of 2 x 2, and is,

1 row and 1 column of

Line 1, column 2 elements

Line 2, column 1 elements

Line 2, column 2 elements

where Re () represents the real part of a complex number and Im () represents a complex numberImaginary part, abs () is the absolute value, C_gs,kDenotes C at the k-th frequency point_gsValue of (A), C_gd,kDenotes C at the k-th frequency point_gdValue of (A), C_ds,kDenotes C at the k-th frequency point_dsValue of (A), G_m,kDenotes G at the k-th frequency point_mValue of (A), G_ds,kDenotes G at the k-th frequency point_dsValue of (A), R_i,kRepresents R at the k-th frequency point_iValue of (A), R_gd,kRepresents R at the k-th frequency point_gdValue of (a), τ_kRepresenting the value of tau at the kth frequency point; taking the mean value of values of all frequency points of the intrinsic element as the parameter final value of the intrinsic element in the thermal bias state aiming at the parameter value of the intrinsic element at each frequency point, thereby obtaining the parameter final value of each intrinsic element in the thermal bias state;