CN114267633A - Interconnection structure based on carbon nano tube and preparation method - Google Patents

Interconnection structure based on carbon nano tube and preparation method Download PDF

Info

Publication number
CN114267633A
CN114267633A CN202110615520.3A CN202110615520A CN114267633A CN 114267633 A CN114267633 A CN 114267633A CN 202110615520 A CN202110615520 A CN 202110615520A CN 114267633 A CN114267633 A CN 114267633A
Authority
CN
China
Prior art keywords
layer
hole
ions
catalyst layer
catalyst
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110615520.3A
Other languages
Chinese (zh)
Inventor
季明华
张汝京
欧阳雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qingdao Shengrui Photoelectric Technology Co ltd
Original Assignee
Qingdao Shengrui Photoelectric Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qingdao Shengrui Photoelectric Technology Co ltd filed Critical Qingdao Shengrui Photoelectric Technology Co ltd
Priority to CN202110615520.3A priority Critical patent/CN114267633A/en
Publication of CN114267633A publication Critical patent/CN114267633A/en
Pending legal-status Critical Current

Links

Images

Abstract

The invention provides an interconnection structure based on carbon nano tubes and a preparation method thereof.A carbon nano tube layer with higher filling rate is formed in a through hole with micron-sized size to realize the compact filling of the through hole, so that the carbon nano tube layer in the through hole has lower resistance and good conductivity, thereby meeting the requirement of large current, and the carbon nano tube layer with higher filling rate also has good thermal stability and high mechanical strength, and can reduce energy consumption, thereby effectively replacing metal interconnection through the carbon nano tube layer with higher filling rate.

Description

Interconnection structure based on carbon nano tube and preparation method
Technical Field
The invention relates to the field of power integrated circuit manufacturing, in particular to an interconnection structure based on carbon nano tubes and a preparation method thereof.
Background
Carbon Nanotubes (CNTs) have many excellent mechanical, electrical and chemical properties, and with the research of CNTs and nanomaterials in recent years, the broad application prospects of CNTs are continuously revealed.
In the field of power integrated circuit manufacture, carbon nanotubes are usedHas good thermal conductivity (the thermal conductivity ranges from 1750w/mk to 5800w/mk), and the thermal conductivity of the diamond is even higher than that of diamond with the best thermal conductivity known at present; the carrier transport mode of the carbon nano tube is different from that of other metal conductors, and belongs to ballistic transport, and the mean free path of electrons in the carbon nano tube reaches the micron order, so that the carbon nano tube has the capacity of bearing large current density (more than 109A/cm)2) (ii) a Carbon nanotubes also have good mechanical strength, thermal stability and low energy consumption. Thus, carbon nanotubes have been recognized as a new interconnect material that can replace metal interconnects.
However, the research on the interconnection of carbon nanotubes is mainly focused on the field of vertical via interconnection, that is, the growth of carbon nanotubes mainly takes metal (such as iron, nickel, etc.) as a catalyst and vertically grows from the bottom of the via, however, the filling rate of the carbon nanotubes prepared by the method in the via is low, so that the resistance of the carbon nanotubes is still high, and the conductivity is affected.
Therefore, it is necessary to provide a novel interconnection structure based on carbon nanotubes and a method for manufacturing the same to conduct large current.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present invention provides an interconnect structure based on carbon nanotubes and a method for fabricating the same, which are used to solve the problem of low filling density of carbon nanotubes in vias in the conventional power integrated circuit technology.
To achieve the above and other related objects, the present invention provides a method for fabricating an interconnection structure based on carbon nanotubes, comprising the steps of:
providing a substrate;
forming a first conductive layer on the substrate;
forming an interlayer dielectric layer on the substrate and the first conductive layer, wherein the interlayer dielectric layer is provided with a through hole, the surface of the first conductive layer is exposed by the through hole, and the through hole has a micron-scale size;
forming a first catalyst layer on the bottom surface of the through hole, and forming a second catalyst layer on the side wall surface of the through hole;
forming a carbon nano tube layer filling the through hole in the through hole by adopting a catalytic chemical vapor deposition method;
flattening the carbon nanotube layer and exposing the surface of the interlayer dielectric layer;
and forming a second conductive layer covering the carbon nano tube layer and part of the interlayer dielectric layer.
Optionally, the range of the opening width of the through hole includes 1 μm to 100 μm, and the range of the height of the through hole includes 1 μm to 300 μm.
Optionally, the filling rate of the carbon nanotube layer in the through hole ranges from 96% to 100%.
Optionally, the method for forming the first catalyst layer comprises a vertical implantation method, and the method for forming the second catalyst layer comprises an inclined implantation method, wherein the implantation energy is less than or equal to 100Kev, and the implantation dosage is greater than or equal to 1 × 1015ions/cm2So as to respectively form the first catalyst layer and the second catalyst layer which are densely distributed.
Alternatively, the method of forming the first catalyst layer and the second catalyst layer includes a spin-on injection method.
Optionally, the first catalyst layer comprises one or a combination of Fe ions, Ni ions, Co ions and Al ions; the second catalyst layer comprises one or a combination of Fe ions, Ni ions, Co ions and Al ions.
Optionally, the first catalyst layer and the second catalyst layer have different materials.
Optionally, when the carbon nanotube layer is formed, the reaction temperature includes 600 ℃ to 700 ℃, and the reaction pressure includes 50mbar to 100 mbar.
The present invention also provides a carbon nanotube-based interconnect structure, comprising:
a substrate;
a first conductive layer on the substrate;
the interlayer dielectric layer is positioned on the substrate and the first conducting layer, a through hole is formed in the interlayer dielectric layer, the surface of the first conducting layer is exposed through the through hole, and the through hole is in a micron-scale size;
a first catalyst layer and a second catalyst layer, wherein the first catalyst layer is positioned on the bottom surface of the through hole, and the second catalyst layer is positioned on the side wall surface of the through hole;
the carbon nano tube layer is positioned in the through hole and fills the through hole;
and the second conducting layer is positioned on the carbon nano tube layer and part of the interlayer dielectric layer.
Optionally, the range of the opening width of the through hole includes 1 μm to 100 μm, and the range of the height of the through hole includes 1 μm to 300 μm.
Optionally, the filling rate of the carbon nanotube layer in the through hole ranges from 96% to 100%.
Optionally, the first catalyst layer comprises one or a combination of Fe ions, Ni ions, Co ions and Al ions; the second catalyst layer comprises one or a combination of Fe ions, Ni ions, Co ions and Al ions; the first catalyst layer and the second catalyst layer are made of different materials.
As described above, according to the interconnection structure based on carbon nanotubes and the preparation method thereof of the present invention, the carbon nanotube layer with a high filling rate can be formed in the through hole with a micron-sized size to achieve dense filling of the through hole, such that the carbon nanotube layer in the through hole has a low resistance to have a good conductivity to satisfy a requirement of a large current, and the carbon nanotube layer with a high filling rate also has a good thermal stability, a high mechanical strength, and a reduced energy consumption, such that metal interconnection can be effectively replaced by the carbon nanotube layer with a high filling rate.
Drawings
FIG. 1 is a schematic flow chart of a process for fabricating a carbon nanotube-based interconnect structure according to the present invention.
Fig. 2-7 are schematic structural diagrams illustrating steps of fabricating a carbon nanotube-based interconnect structure according to an embodiment of the invention.
Fig. 8-14 are schematic structural diagrams illustrating steps of fabricating a carbon nanotube-based interconnect structure according to another embodiment of the invention.
Description of the element reference numerals
101. 201 substrate
102. 202 bottom dielectric layer
103. 203 first conductive layer
104. 204 interlayer dielectric layer
105. 205 through hole mask layer
106. 206 through hole
107. 207 first catalyst layer
108. 208 second catalyst layer
109. 209 carbon nanotube layer
110. 210 second conductive layer
300 TiN layer
Width D1, D2
Height H1, H2
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1 to 14. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
Example one
Referring to fig. 7, the present embodiment provides a carbon nanotube-based interconnect structure, which includes a substrate 101, a first conductive layer 103, an interlayer dielectric layer 104, a first catalyst layer 107, a second catalyst layer 108, a carbon nanotube layer 109, and a second conductive layer 110. The preparation process flow refers to fig. 1.
In this embodiment, in the through hole 106 with the micron-sized dimension, the carbon nanotube layer 109 with a high filling rate can be used to densely fill the through hole 106, so that the carbon nanotube layer 109 in the through hole 106 has a lower resistance and a good conductivity, thereby meeting the requirement of a large current, and the carbon nanotube layer with a higher filling rate also has a good thermal stability, a high mechanical strength, and can reduce energy consumption, so that the carbon nanotube layer 109 with a higher filling rate can effectively replace metal interconnection to electrically connect the first conductive layer 103 and the second conductive layer 110.
Referring to fig. 2 to 7, schematic structural diagrams of steps of fabricating the carbon nanotube-based interconnect structure in this embodiment are shown.
First, referring to fig. 2, the substrate 101 is provided, and the first conductive layer 103 is formed on the substrate 101.
Specifically, the substrate 101 may be a semiconductor material, such as silicon, germanium, silicon germanium, or the like, and the substrate 101 may further have a semiconductor structure therein, and the specific type of the semiconductor structure is not limited herein. The surface of the substrate 101 may further have an underlying dielectric layer 102, and the material of the underlying dielectric layer 102 may include silicon oxide or a low-K (K is less than 3.9) dielectric material. The first conductive layer 103 may be electrically connected to the semiconductor structure in the substrate 101, for example, the first conductive layer 103 may be electrically connected to a source/drain region of an MOS transistor through a plug penetrating through the bottom dielectric layer 102. In this embodiment, the bottom dielectric layer 102 is disposed between the first conductive layer 103 and the substrate 101, but the invention is not limited thereto, and in other embodiments, the bottom dielectric layer 102 may not be disposed as needed.
By way of example, the material of the first conductive layer 103 includes, but is not limited to, Cu, Al, W, AlCu, and Al2O3Specifically, the configuration may be set as needed, and the AlCu alloy is used as an example in the present embodiment, but is not limited thereto.
Referring to fig. 3, an interlayer dielectric layer 104 is formed on the substrate 101 and the first conductive layer 103, the interlayer dielectric layer 104 has the through hole 106 therein, the through hole 106 exposes the surface of the first conductive layer 103, and the through hole 106 has a micron-scale size.
Specifically, the material of the interlayer dielectric layer 104 includes silicon oxide or a low-K dielectric material or an ultra-low-K dielectric material. When the material of the interlayer dielectric layer 104 is a low-K dielectric material or an ultra-low-K dielectric material, the material of the interlayer dielectric layer 104 may be SiOH, SiCOH, FSG, BSG, PSG, BPSG, or the like. In this embodiment, the interlayer dielectric layer 104 is made of silicon oxide, and the interlayer dielectric layer 104 is located on the bottom dielectric layer 102, but the material of the interlayer dielectric layer 104 is not limited thereto.
By way of example, the opening width D1 of the via 106 ranges from 1 μm to 100 μm, and the height H1 of the via 106 ranges from 1 μm to 300 μm.
Specifically, the through holes 106 are micron-sized, the opening width D1 of the through holes 106 may range from 1 μm to 100 μm, such as a value within any limits of 20 μm, 50 μm, 80 μm, etc., and the height H1 of the through holes 106 may range from 1 μm to 300 μm, such as a value within any limits of 10 μm, 20 μm, 50 μm, 80 μm, etc. In this embodiment, the through hole 106 has a larger size, wherein the shape of the through hole 106 may be a cylinder, and the radial direction of the through hole 106 is parallel to the surface of the substrate 101, but is not limited thereto, and in other embodiments, the shape of the through hole 106 may be selected as needed.
Wherein the method for forming the through hole 106 comprises the following steps:
forming a through hole mask layer 105 on the surface of the interlayer dielectric layer 104, wherein the through hole mask layer 105 is provided with a mask opening penetrating through the through hole mask layer 105, and the mask opening is positioned above the first conductive layer 103;
and etching the interlayer dielectric layer 104 at the bottom of the mask opening by using the through hole mask layer 105 as a mask until the surface of the first conductive layer 103 is exposed.
In this embodiment, the through hole mask layer 105 is a TiN hard mask layer, and after the through hole 106 is formed, the through hole mask layer 105 is retained, so that the through hole mask layer 105 can be used as a protective layer in a subsequent process. But not limited thereto, in other embodiments, the via mask layer 105 may be removed first, and is not limited herein.
Next, referring to fig. 4 and 5, the first catalyst layer 107 is formed on the bottom surface of the through hole 106, and the second catalyst layer 108 is formed on the sidewall surface of the through hole 106.
As an example, the order of forming the first catalyst layer 107 and the second catalyst layer 108 may include simultaneous formation or step formation, wherein, when step formation is employed, the preparation order may include forming the first catalyst layer 107 first, followed by forming the second catalyst layer 108; or the second catalyst layer 108 is formed first, and then the first catalyst layer 107 is formed; the method for forming the first catalyst layer 107 and the second catalyst layer 108 includes one or a combination of a deposition method, a sputtering method, or an ion implantation method.
Specifically, in this embodiment, in order to better form the dense carbon nanotube layer 109, the catalyst layer is preferably formed by a step method, and an ion implantation method with high directionality is preferred, but not limited thereto. In this embodiment, a method of forming the first catalyst layer 107 first and then forming the second catalyst layer 108 is adopted, wherein the method of forming the first catalyst layer 107 includes a vertical implantation method, the method of forming the second catalyst layer 108 includes an inclined implantation method, and further, the implantation energy is 100Kev or less, such as 50Kev or 80Kev, and the implantation dose is 1 × 10 or more15ions/cm2E.g. 2X 1015ions/cm2、5×1015ions/cm2、8×1015ions/cm2And the like, so as to form the first catalyst layer 107 and the second catalyst layer 108 which can be densely distributed in the through hole 106 by controlling the process conditions of ion implantation, so as to facilitate the subsequent growth of the dense carbon nanotube layer 109.
As an example, in order to further improve the distribution uniformity and compactness of the first catalyst layer 107 and the second catalyst layer 108, the ion implantation is preferably performed by a spin implantation method, and preferably performed by a multi-angle implantation method, for example, the angle range of the ion implantation may include 10 ° to 80 °, but is not limited thereto, and the specific implantation angle may be adjusted as required, for example, including 20 °, 45 °, 60 °, 75 °, and the like, and is not limited thereto.
As an example, one or a combination of Fe ions, Ni ions, Co ions, and Al ions may be included in the first catalyst layer 107; one or a combination of Fe, Ni, Co, and Al ions may be included in the second catalyst layer 108.
Specifically, the materials of the first catalyst layer 107 and the second catalyst layer 108 may be selected according to the requirement, wherein the first catalyst layer 107 and the second catalyst layer 108 may be made of the same material or different materials, in this embodiment, in order to prepare the dense and high-quality carbon nanotube layer 109, and because the bottom and the sidewall of the through hole 106 have different materials, it is preferable that the first catalyst layer 107 and the second catalyst layer 108 are made of different materials, so as to grow the dense and uniformly distributed first catalyst layer 107 and second catalyst layer 108, so as to prepare for subsequently preparing the dense and high-quality carbon nanotube layer 109, if the first catalyst layer 107 may be made of an Fe catalyst, and the second catalyst layer 108 may be made of a Co catalyst or an Al catalyst, but is not limited thereto, if necessary, the first catalyst layer 107 or the second catalyst layer 108 may contain two or more kinds of catalytic ions. The through hole mask layer 105 can prevent catalytic ions from being implanted into the top surface of the interlayer dielectric layer 104 by an ion implantation process.
As an example, after the ion implantation process and before the growing of the carbon nanotube layer 109, a step of annealing the first catalyst layer 107 and the second catalyst layer 108 may be further included to facilitate the subsequent growth of the carbon nanotube layer 109 in the through hole 106. The temperature of the annealing treatment may be 200 ℃ to 500 ℃, such as 200 ℃, 300 ℃, 400 ℃ or 500 ℃, but is not limited thereto, and in other embodiments, the annealing treatment may not be performed.
Next, referring to fig. 6, the carbon nanotube layer 109 is formed in the via hole 106 by using a catalytic chemical vapor deposition method.
Specifically, the process conditions for forming the carbon nanotube layer 109 in the through hole 106 by using the catalytic chemical vapor deposition method may include: introducing a carbon source gas, e.g. comprising C, into the reaction chamber2H2、CH4The carbon source gas is catalytically grown to form the carbon nanotube layer 109 under the conditions that the reaction temperature is 600-700 ℃, such as 620 ℃, 650 ℃, 680 ℃ and the like, and the reaction pressure is 50-100 mbar, such as 60mbar, 80mbar, 90mbar and the like. By controlling the process conditions of the carbon nanotube layer 109, the high-quality and dense carbon nanotube layer 109 can be prepared, so as to improve the filling rate of the carbon nanotube layer 109 in the through hole 106. In this embodiment, the carbon source gas is C2H2And H2The reaction temperature of the mixed gas is 650 ℃, and the reaction pressure is 80mbar, so that the high-quality and dense carbon nanotube layer 109 is formed by growth under the conditions of high temperature and low pressure, wherein the filling rate of the carbon nanotube layer 109 in the through hole 106 can reach 96% -100%, such as 97%, 98%, and the like. In this embodiment, the filling rate of the carbon nanotube layer 109 can reach 99%, so that the carbon nanotube layer 109 with high density and high filling rate can provide an interconnection structure with low resistance, good conductivity and high current demand, and the carbon nanotube layer 109 with high filling rate also has good thermal stability, high mechanical strength and low energy consumption, thereby effectively replacing metal interconnection.
Next, referring to fig. 7, the carbon nanotube layer 109 is planarized, and the surface of the interlayer dielectric layer 104 is exposed.
Specifically, in this embodiment, the carbon nanotube layer 109 with a dense and high filling rate may be prepared, so that the carbon nanotube layer 109 has high mechanical strength, and therefore, when the carbon nanotube layer 109 is planarized, an additional encapsulation layer for fixing and protecting the carbon nanotube layer 109 is not required to be formed, and an additional conductive material is not required to be filled in order to improve the filling rate and reduce the resistance to improve the conductivity, so that the process steps may be reduced, the cost may be reduced, and the quality of the product may be improved. Of course, if necessary, a part of the encapsulation layer or the filling layer may be formed, and is not limited herein. The method for planarizing the carbon nanotube layer 109 may include a CMP method to remove the damaged carbon nanotube layer 109 until the surface of the interlayer dielectric layer 104 is exposed, but the planarization method is not limited thereto.
Finally, referring to fig. 7, a second conductive layer 110 is formed to cover the carbon nanotube layer 109 and a portion of the interlayer dielectric layer 104. The material of the second conductive layer 110 may be a metal, such as, but not limited to, Ti metal or Pt metal.
Accordingly, the present embodiment also provides a carbon nanotube-based interconnect structure, which can be formed by the above method, but is not limited thereto.
Referring to fig. 7, the interconnect structure includes the substrate 101, a first conductive layer 103, an interlayer dielectric layer 104, a first catalyst layer 107, a second catalyst layer 108, a carbon nanotube layer 109, and a second conductive layer 110. The first conductive layer 103 is located on the substrate 101, the interlayer dielectric layer 104 is located on the substrate 101 and the first conductive layer 103, the interlayer dielectric layer 104 has a through hole 106 therein, the through hole 106 exposes the surface of the first conductive layer 103, the through hole 106 has a micron-sized size, the first catalyst layer 107 is located on the bottom surface of the through hole 106, the second catalyst layer 108 is located on the sidewall surface of the through hole 106, the carbon nanotube layer 109 is located in the through hole 106 and fills the through hole 106, and the second conductive layer 110 is located on the carbon nanotube layer 109 and a portion of the interlayer dielectric layer 104.
By way of example, the opening width D1 of the via 106 ranges from 1 μm to 100 μm, and the height H1 of the via 106 ranges from 1 μm to 300 μm.
As an example, the filling rate of the carbon nanotube layer 109 in the through hole 106 ranges from 96% to 100%.
As an example, the first catalyst layer 107 includes one or a combination of Fe ions, Ni ions, Co ions, and Al ions; the second catalyst layer 108 includes one or a combination of Fe ions, Ni ions, Co ions, and Al ions; the first catalyst layer 107 and the second catalyst layer 108 have different materials.
The detailed preparation, material and structure of the interconnection structure based on carbon nanotubes are not described herein.
Example two
The embodiment also provides another interconnection structure and preparation based on carbon nanotubes, and the difference from the first embodiment is mainly as follows: the order of forming the catalyst layers and the material of the catalyst layers are different. Fig. 8-14 are schematic structural views of steps of fabricating the carbon nanotube-based interconnect structure according to this embodiment.
Referring to fig. 14, the present embodiment provides a carbon nanotube-based interconnect structure, which includes a substrate 201, an underlying dielectric layer 202, a first conductive layer 203, an interlayer dielectric layer 204, a first catalyst layer 207 and a second catalyst layer 208, a carbon nanotube layer 209, a second conductive layer 210, and a TiN layer 300.
Wherein the bottom dielectric layer 202 is located on the substrate 201, the first conductive layer 203 is located on the bottom dielectric layer 202, the interlayer dielectric layer 204 is located on the bottom dielectric layer 202 and the first conductive layer 203, a through hole 206 is formed in the interlayer dielectric layer 204, the surface of the first conductive layer 203 is exposed out of the through hole 206, the through hole 206 has micron-sized dimensions, including micron-sized opening width D2 and micron-sized height H2, the through hole 206 is formed by a through hole mask layer 205, the TiN layer 300 covers the bottom and the side wall of the through hole 206, the first catalyst layer 207 is located on the surface of the TiN layer 300 at the bottom, the second catalyst layer 208 is located on the surface of the TiN layer 300 at the side wall, wherein at least one of the first catalyst layer 207 and the second catalyst layer 208 is a Ni catalyst, the carbon nanotube layer 209 is located in the through hole 206, and the through hole 206 is filled, and the second conductive layer 210 is located on the carbon nanotube layer 209 and a portion of the interlayer dielectric layer 204.
Further, in this embodiment, in order to prepare the dense and high-quality carbon nanotube layer 209, the first catalyst layer 207 and the second catalyst layer 208 may be made of different materials so as to grow the dense and uniformly distributed first catalyst layer 207 and second catalyst layer 208, and prepare for subsequently preparing the dense and high-quality carbon nanotube layer 209, for example, the first catalyst layer 207 may be a Ni catalyst, and the second catalyst layer 208 may be a Fe catalyst, but is not limited thereto. Since the Ni catalyst is used in this embodiment, the TiN layer 300 is formed in the via hole 206 before the first catalyst layer 207 and the second catalyst layer 208 are formed in order to enhance the effect of the Ni catalyst. The present embodiment uses a step-and-inject method to form the catalyst layer, which forms the second catalyst layer 208 first and then forms the first catalyst layer 207, but is not limited thereto.
For the material, structure, and preparation of the interconnection structure, reference may be made to the first embodiment, which is not described herein.
In summary, according to the interconnection structure based on carbon nanotubes and the preparation method thereof, the carbon nanotube layer with higher filling rate is formed in the through hole with micron-sized dimensions to realize compact filling of the through hole, so that the carbon nanotube layer in the through hole has lower resistance and good conductivity, thereby meeting the requirement of large current, and the carbon nanotube layer with higher filling rate also has good thermal stability and high mechanical strength, and can reduce energy consumption, thereby effectively replacing metal interconnection through the carbon nanotube layer with higher filling rate.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (12)

1. A preparation method of an interconnection structure based on carbon nano tubes is characterized by comprising the following steps:
providing a substrate;
forming a first conductive layer on the substrate;
forming an interlayer dielectric layer on the substrate and the first conductive layer, wherein the interlayer dielectric layer is provided with a through hole, the surface of the first conductive layer is exposed by the through hole, and the through hole has a micron-scale size;
forming a first catalyst layer on the bottom surface of the through hole, and forming a second catalyst layer on the side wall surface of the through hole;
forming a carbon nano tube layer filling the through hole in the through hole by adopting a catalytic chemical vapor deposition method;
flattening the carbon nanotube layer and exposing the surface of the interlayer dielectric layer;
and forming a second conductive layer covering the carbon nano tube layer and part of the interlayer dielectric layer.
2. The method of claim 1, wherein: the range of the opening width of the through hole includes 1 μm to 100 μm, and the range of the height of the through hole includes 1 μm to 300 μm.
3. The method of claim 1, wherein: the filling rate of the carbon nano tube layer in the through hole ranges from 96% to 100%.
4. The method of claim 1, wherein: the method for forming the first catalyst layer comprises a vertical implantation method, and the method for forming the second catalyst layer comprises an inclined implantation method, wherein the implantation energy is less than or equal to 100Kev, and the implantation dosage is greater than or equal to 1 × 1015ions/cm2So as to respectively form the first catalyst layer and the second catalyst layer which are densely distributed.
5. The method of claim 1, wherein: the method of forming the first catalyst layer and the second catalyst layer includes a spin-on injection method.
6. The method of claim 1, wherein: the first catalyst layer comprises one or a combination of Fe ions, Ni ions, Co ions and Al ions; the second catalyst layer comprises one or a combination of Fe ions, Ni ions, Co ions and Al ions.
7. The method of claim 1, wherein: the first catalyst layer and the second catalyst layer are made of different materials.
8. The method of claim 1, wherein: and when the carbon nano tube layer is formed, the reaction temperature is 600-700 ℃, and the reaction pressure is 50-100 mbar.
9. A carbon nanotube-based interconnect structure, comprising:
a substrate;
a first conductive layer on the substrate;
the interlayer dielectric layer is positioned on the substrate and the first conducting layer, a through hole is formed in the interlayer dielectric layer, the surface of the first conducting layer is exposed through the through hole, and the through hole is in a micron-scale size;
a first catalyst layer and a second catalyst layer, wherein the first catalyst layer is positioned on the bottom surface of the through hole, and the second catalyst layer is positioned on the side wall surface of the through hole;
the carbon nano tube layer is positioned in the through hole and fills the through hole;
and the second conducting layer is positioned on the carbon nano tube layer and part of the interlayer dielectric layer.
10. The carbon nanotube-based interconnect structure of claim 9, wherein: the range of the opening width of the through hole includes 1 μm to 100 μm, and the range of the height of the through hole includes 1 μm to 300 μm.
11. The carbon nanotube-based interconnect structure of claim 9, wherein: the filling rate of the carbon nano tube layer in the through hole ranges from 96% to 100%.
12. The carbon nanotube-based interconnect structure of claim 9, wherein: the first catalyst layer comprises one or a combination of Fe ions, Ni ions, Co ions and Al ions; the second catalyst layer comprises one or a combination of Fe ions, Ni ions, Co ions and Al ions; the first catalyst layer and the second catalyst layer are made of different materials.
CN202110615520.3A 2021-06-02 2021-06-02 Interconnection structure based on carbon nano tube and preparation method Pending CN114267633A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110615520.3A CN114267633A (en) 2021-06-02 2021-06-02 Interconnection structure based on carbon nano tube and preparation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110615520.3A CN114267633A (en) 2021-06-02 2021-06-02 Interconnection structure based on carbon nano tube and preparation method

Publications (1)

Publication Number Publication Date
CN114267633A true CN114267633A (en) 2022-04-01

Family

ID=80824571

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110615520.3A Pending CN114267633A (en) 2021-06-02 2021-06-02 Interconnection structure based on carbon nano tube and preparation method

Country Status (1)

Country Link
CN (1) CN114267633A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102130091A (en) * 2010-12-17 2011-07-20 天津理工大学 Composite through-hole interconnecting structure for integrated circuit chip and preparation method thereof
CN110085589A (en) * 2018-01-26 2019-08-02 中芯国际集成电路制造(天津)有限公司 Carbon nanotube module, semiconductor devices and manufacturing method
CN110648966A (en) * 2018-06-27 2020-01-03 中芯国际集成电路制造(上海)有限公司 Non-volatile memory and forming method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102130091A (en) * 2010-12-17 2011-07-20 天津理工大学 Composite through-hole interconnecting structure for integrated circuit chip and preparation method thereof
CN110085589A (en) * 2018-01-26 2019-08-02 中芯国际集成电路制造(天津)有限公司 Carbon nanotube module, semiconductor devices and manufacturing method
CN110648966A (en) * 2018-06-27 2020-01-03 中芯国际集成电路制造(上海)有限公司 Non-volatile memory and forming method thereof

Similar Documents

Publication Publication Date Title
US9613854B2 (en) Method and apparatus for back end of line semiconductor device processing
US7768099B2 (en) MIM capacitor integrated into the damascene structure and method of making thereof
JP5550515B2 (en) Graphene wiring and manufacturing method thereof
CN103579186B (en) Through hole is connected to device
TWI461349B (en) Carbon nanotube wiring and its manufacturing method
JP5379848B2 (en) Structure and process for the incorporation of conductive contacts
US20060157771A1 (en) Integrated circuit memory devices and capacitors having carbon nanotube electrodes and methods of forming same
KR100827524B1 (en) Method for manufacturing semiconductor device
JP5414756B2 (en) Semiconductor device and manufacturing method thereof
KR20080003997A (en) Interlayer wiring of semiconductor device using carbon nanotube and manufecturing process of the same
US20140113428A1 (en) Method for Integrating MnOz Based Resistive Memory with Copper Interconnection Back-End Process
CN102468328A (en) Contact structure for reducing gate resistance and method of making the same
JP2008258187A (en) Electronic device, and manufacturing method thereof
US8692224B2 (en) High consistency resistive memory and manufacturing method thereof
US8338822B2 (en) Electrical connection structure having elongated carbon structures with fine catalyst particle layer
TWI505359B (en) Semiconductor devices and methods of forming same
US20210057333A1 (en) Interconnect Structures with Low-Aspect-Ratio Contact Vias
US20220352012A1 (en) Via structure and methods for forming the same
CN102130091B (en) Composite through-hole interconnecting structure for integrated circuit chip
US20140284799A1 (en) Semiconductor device and method of manufacturing the same
JP2014086622A (en) Semiconductor device and manufacturing method of the same
JP2015061042A (en) Method for manufacturing wiring structure, and wiring structure
CN114267633A (en) Interconnection structure based on carbon nano tube and preparation method
US20040018716A1 (en) Semiconductor device and production method therefor
US20160086889A1 (en) Carbon nanotube interconnect structure, and method of manufacturing the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination