CN114221833B - BMS system data communication method - Google Patents

BMS system data communication method Download PDF

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Publication number
CN114221833B
CN114221833B CN202111536393.4A CN202111536393A CN114221833B CN 114221833 B CN114221833 B CN 114221833B CN 202111536393 A CN202111536393 A CN 202111536393A CN 114221833 B CN114221833 B CN 114221833B
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stage
data
data packet
complete
bit
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CN114221833A (en
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尚德华
杜鹏飞
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Aopu Shanghai New Energy Co Ltd
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Aopu Shanghai New Energy Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L2012/40208Bus networks characterized by the use of a particular bus standard
    • H04L2012/40215Controller Area Network CAN

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)

Abstract

The invention relates to a BMS system data communication method, which comprises the following steps: allocating different physical addresses for each first level of the BMS three-level architecture; setting periodic phase offset for first stages of different physical addresses, so that the period of each first stage for transmitting a complete data packet is distributed in different sampling periods for completing data acquisition at a second stage; the first stage receives the data acquisition request of the second stage, and after acquiring the battery pack data, the first stage sends a simplified data packet or a complete data packet according to the physical address and the periodic phase offset. According to the BMS system data communication method, the transmission deviation amount of the data packet is reduced, so that the data is greatly reduced, the bus pressure is reduced, the data capacity is reduced, the system response time is prolonged, and the BMS system communication pressure is reduced. Meanwhile, the complete data packet is sent regularly, so that the accumulation error is prevented, the sending period of the complete data packet is homogenized, the occurrence of communication traffic jam is effectively prevented, and the data transmission efficiency is improved.

Description

BMS system data communication method
Technical Field
The invention relates to the technical field of new energy lithium battery energy storage, in particular to a BMS system data communication method.
Background
With the state's inclination to the policy of the new energy industry, lithium battery and BMS (battery management system ) systems are widely used in many fields. In recent years, as energy storage devices are gradually expanded, the accuracy and frequency requirements of sampling data are gradually improved, and the communication pressure on a three-stage architecture of a BMS system is rapidly increased.
For a three-level architecture BMS system, two-level and three-level communication usually depends on a CAN bus, and a two-level BCU (Battery Control Unit, a battery control unit) collects information such as battery pack voltage, temperature and the like provided by each level BMU (Battery Management Unit, a battery management unit), packages the information into a cluster data packet and uploads the cluster data packet to three levels. As the system is increased, the sampling precision and the frequency demand are gradually increased, and the pressure of data on a bus is increased and is gradually unbearable. In a container type energy storage power station, about 10 seconds is often required for completing data uploading of all clusters once. This means that the whole system is faced with a system delay of around 10s, which is unacceptable for lithium battery energy storage BMS systems that require real-time response. Meanwhile, voltage acquisition data typically needs to be accurate to millivolts, and the data generated by the voltage acquisition data typically needs to occupy 32 bits (bytes). Its temperature value typically requires the same amount of data. Taking a 16-string battery pack as an example, less than 100ms is required for collecting one cycle, at least 10000 bits of data are generated per second. In a container-type energy storage power station, thousands of battery packs are typically deployed, which generates an extremely large communication pressure on the bus per second of data. If a higher-speed communication mode, such as LAN communication, is adopted, the hardware design is often more complex, and a special LAN communication chip needs to be adapted, so that the cost is increased. Meanwhile, LAN communication debugging is more complex, and development difficulty is increased.
Disclosure of Invention
Accordingly, it is desirable to provide a BMS system data communication method capable of reducing a BMS system communication pressure and providing data transmission efficiency in response to the above-mentioned technical problems.
A BMS system data communication method, the method comprising:
allocating different physical addresses for each first level of the BMS three-level architecture;
setting periodic phase offset for first stages of different physical addresses, so that the period of each first stage for transmitting a complete data packet is distributed in different sampling periods for completing data acquisition at a second stage;
and the first stage receives the data acquisition request of the second stage, and after acquiring the battery pack data, the first stage sends a simplified data packet or a complete data packet according to the physical address and the periodic phase offset.
Further, after the first stage collects the battery pack data, the battery pack data are edited into a simplified data packet and a complete data packet respectively.
Further, the first stage sends a reduced data packet or a complete data packet according to the physical address and the periodic phase offset, including:
the first stage judges whether the cycle of sending the simplified data packet is in accordance with the physical address and the cycle phase offset; if yes, then
Calculating a deviation value by combining the current battery pack data acquisition value and the last battery pack data acquisition value, and judging whether the deviation value is larger than a deviation threshold value or not; if yes, then
The first stage sends a complete data packet to the second stage.
Further, the first stage sends the complete data packet to the second stage, and then further includes:
the second stage corrects the previously received reduced data packet based on the received complete data packet.
Further, if the deviation value is smaller than the deviation threshold value, the first stage sends the reduced data packet to the second stage.
Further, the number of sampling periods required by the second stage to complete one data acquisition is not smaller than the number of the first stage.
Further, each sampling period of the second stage is distributed with one complete data packet period.
Further, the second stage is used for uniformly distributing a plurality of complete data packet periods of different first stages in a sampling period required by completing one data acquisition.
Further, the packet length of the reduced data packet is 21 bits, and the reduced data packet comprises a 2-bit initial frame, a 4-bit address frame, a 1-bit judging frame, an 8-bit data frame, a 4-bit check frame and a 2-bit end frame which are sequentially arranged.
Further, the 49 bits of the packet length of the complete data packet include a 2-bit start frame, a 4-bit address frame, a 1-bit decision frame, a 32-bit data frame, an 8-bit check frame and a 2-bit end frame, which are sequentially arranged.
According to the BMS system data communication method, the transmission deviation amount of the data packet is reduced, so that the data is greatly reduced, the bus pressure is reduced, the data capacity is reduced, the system response time is prolonged, and the BMS system communication pressure is reduced. Meanwhile, the complete data packet is sent regularly, so that the accumulation error is prevented, the sending period of the complete data packet is homogenized, the occurrence of communication traffic jam is effectively prevented, and the data transmission efficiency is improved.
Drawings
Fig. 1 is a flowchart illustrating a data communication method of a BMS system according to an embodiment;
fig. 2 is a communication mode diagram of a three-level architecture of a BMS;
FIG. 3 is a diagram illustrating a full packet cycle phase offset;
fig. 4 is a simplified data packet and a complete data packet.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
As shown in fig. 1, in one embodiment, a BMS system data communication method includes the steps of:
in step S110, a different physical address is allocated to each first level of the BMS three-level architecture. Referring to fig. 2, a communication mode of the BMS three-level architecture is shown. The third stage sequentially sends query packets to the second stage through the CAN bus, and the second stage sequentially sends data packets to the third stage after receiving the instruction. The data packet comprises a complete data packet and a simplified data packet, and the third-level data processing needs to be processed according to the judgment flag bit. The second stage sends an inquiry packet to the first stage through the respective bus, and the first stage is responsible for collecting various data in the battery pack and sending the data to the upper stage. For a three-level architecture BMS system, if the transmission period of the data calibration complete data packet of each cluster is the same and the transmission time is the same, the complete data packet can be transmitted to three levels by all BMS secondary stages at a certain time, so that the bus data pressure is suddenly increased, the system delay is suddenly increased, and the communication traffic jam occurs, which is unacceptable. Therefore, the BMS secondary is required to add the phase offset corresponding to the address according to the physical address of the BMS secondary in the BMS system on the premise of unchanged transmission period of the complete data packet. So that the transmission time of the complete packet per cluster is evenly distributed in the sampling period of the whole system.
In step S120, the period phase offset is set for the first stage of different physical addresses, so that the period of each first stage for transmitting the complete data packet is distributed in different sampling periods for completing the data acquisition at the second stage. Specifically, the number of sampling periods required for the second stage to complete one data acquisition is not smaller than the number of the first stage. Each sampling period of the second stage is distributed with one complete packet period. The second stage is used for uniformly distributing a plurality of complete data packet periods of different first stages in a sampling period required by one-time data acquisition. When the BMS system is installed, different physical addresses can be allocated to each first stage, in order to avoid that a plurality of stages send complete data packets to the second stage simultaneously in the same period, the stages are required to set period phase offset according to own physical addresses, so that periods of sending complete packets by each stage are uniformly distributed in the second-stage primary acquisition period, and communication traffic jam is prevented. Referring to fig. 3, in order to prevent traffic jams, the first stage should determine respective full packet transmission offsets according to its own physical address and total period. For example, if there are three first stages whose physical addresses are 01, 02, and 03, the total period of acquisition of the second stage is 3 periods, the offset of the first stage pack1 is 0, the offset of pack2 is 1, and the offset of pack3 is 2. The complete packet transmissions are now evenly separated during the 3 cycles of the second stage acquisition.
Step S130, the first stage receives the data acquisition request of the second stage, and after acquiring the battery pack data, the first stage sends the simplified data pack or the complete data pack according to the physical address and the periodic phase offset. After the first stage collects the battery pack data, the battery pack data are respectively edited into a simplified data packet and a complete data packet. When the first communication is carried out, the second stage needs to send an inquiry instruction to the first stage, the first stage responds according to the physical address of the second stage, and the second stage can calibrate the first stage according to the physical address of the first stage. Meanwhile, the second stage can obtain a period required by one-time acquisition, and the first stage can calculate the period phase offset required by one-time complete packet transmission according to the physical address of the first stage. Then, the second stage sequentially sends data acquisition instructions to the first stage, and after corresponding signals are acquired by the first stage, the first stage judges whether the period for sending the reduced data packet is in accordance with the physical address and the period phase offset; if yes, calculating a deviation value by combining the current battery pack data acquisition value and the last battery pack data acquisition value, and judging whether the deviation value is larger than a deviation threshold value or not; if yes, the first stage sends the complete data packet to the second stage. And correcting the received simplified data packet according to the received complete data packet by the second stage, and eliminating accumulated errors. If the deviation value is smaller than the deviation threshold value, the first stage sends the simplified data packet to the second stage. If the first stage judges that the data packet is in the period of sending the complete data packet according to the physical address and the period phase offset, the first stage sends the complete data packet to the second stage, and the second stage corrects the received simplified data packet according to the received complete data packet. Because the parameters such as voltage, current, temperature and the like of the lithium battery energy storage system are generally linearly changed, no step mutation occurs, the data transmission does not need to transmit complete data every time, and only the deviation amount is needed to be transmitted.
Each transmission of complete data is an absolute value transmission mode, and no negative value exists for voltage, so unsigned data transmission is generally adopted. However, the transmission offset is a relative value transmission method, and since there is a difference between a relative increase and a relative decrease, it is necessary to use signed data transmission. The transmission of the deviation amount should be the deviation amount of the sampled data compared with the last sampled data, and if a certain datum point data is defined and the transmission is compared with the datum point deviation, the deviation amount is accumulated after a plurality of periods, so that the data is increased. Since the digital signal is only an approximate sample of the analog signal, the long-term transmission deviation amount data may increase the receiving-side data accumulation error due to the approximate error of the digital sample. It is necessary to set a data calibration point, and after transmitting the fixed-period reduced deviation amount data, the complete data is transmitted once for correcting the accumulated error. The adoption of the simplified data communication can reduce the delay time of the system to one third, which can reach about 2s, and is certainly a great improvement on the delay of the system. Meanwhile, the requirement of hardware redevelopment is avoided, and the cost is increased little.
As shown in fig. 4, in the present embodiment, the packet length of the reduced data packet is 21 bits, and includes a 2-bit start frame, a 4-bit address frame, a 1-bit decision frame, an 8-bit data frame, a 4-bit check frame, and a 2-bit end frame, which are sequentially arranged. The packet length bit 49 bits of the complete data packet comprises a 2-bit start frame, a 4-bit address frame, a 1-bit decision frame, a 32-bit data frame, an 8-bit check frame and a 2-bit end frame which are sequentially arranged. From left to right, the first two bits are the data start frame for determining the data start position, which may be set to 01, for example. And then four bits are address frames, wherein the address frames are physical addresses corresponding to the pack (battery pack), the physical addresses are set when the BMS is installed, and each pack in each cluster has a unique address. In this example, the address is 0011, which indicates pack No. 3. And then one bit is a reduced or complete judging frame, which is used for judging whether the data packet is a reduced data packet or a complete data packet and determining the total length of the data packet. In this example, a 0 is set as the reduced packet flag, and a 1 is set as the complete packet flag. And after the second stage receives the packet, if the reduced or complete judgment frame is 0, the packet is considered to be a reduced data packet, and the packet length is 21 bits. If the reduced or complete decision frame is 1, the packet is considered to be a complete data packet, and the packet length is 49 bits. The data frames are reduced or completely judged after the frames, the reduced packets are 8 bits, and the complete packets are 32 bits. The data bit is followed by a check frame, the reduced packet is 4 bits, the complete packet is 8 bits, and the check frame can be omitted according to different requirements. The last two bits are the end frame for determining the data end position, which may be set to 10, for example. The transmission of complete voltage data usually requires 32bit data, but since the change of the charge and discharge voltage of the energy storage system is slow and linear, only the deviation of the transmission voltage is needed to be satisfied. Since the voltage data change amount per sampling period is usually several mV, 8bit data is sufficient. The visible transmission deviation amount data can greatly reduce the data transmission amount.
According to the BMS system data communication method, the data packets are simplified, only the deviation amount is transmitted, so that the data is greatly reduced, the bus pressure is reduced, the data capacity is reduced, the system response time is prolonged, and the BMS system communication pressure is reduced. Meanwhile, the complete data packet is sent regularly, so that the accumulation error is prevented, the sending period of the complete data packet is homogenized, the occurrence of communication traffic jam is effectively prevented, and the data transmission efficiency is improved. In addition, the data integrity is not affected by the deviation amount transmission, the complete value can be calculated according to the front and back complete data packets, and the method has obvious advantages compared with the data transmission with the reject precision or the period reduction. Therefore, only the communication protocol is required to be modified, the hardware design is not required to be changed, expensive hardware is not required to be replaced, the cost is low, the speed is high, and the implementation is easy.
The foregoing examples illustrate only a few embodiments of the invention and are described in detail herein without thereby limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.

Claims (7)

1. A method for data communication in a BMS system, the method comprising:
allocating different physical addresses for each first level of the BMS three-level architecture;
setting periodic phase offset for first stages of different physical addresses, so that the period of each first stage for transmitting a complete data packet is distributed in different sampling periods for completing data acquisition at a second stage;
the first stage receives the data acquisition request of the second stage, and after acquiring the battery pack data, the first stage sends a simplified data packet or a complete data packet according to the physical address and the periodic phase offset;
the first stage sends a reduced data packet or a complete data packet according to the physical address and the periodic phase offset, and the method comprises the following steps:
the first stage judges whether the cycle of sending the simplified data packet is in accordance with the physical address and the cycle phase offset; if yes, then
Calculating a deviation value by combining the current battery pack data acquisition value and the last battery pack data acquisition value, and judging whether the deviation value is larger than a deviation threshold value or not; if yes, then
The first stage sends a complete data packet to a second stage, and the second stage corrects a previously received reduced data packet according to the received complete data packet;
and if the deviation value is smaller than the deviation threshold value, the first stage sends the simplified data packet to the second stage.
2. The BMS system data communication method according to claim 1, wherein after the first stage collects the battery pack data, the battery pack data is edited into a reduced data packet and a complete data packet, respectively.
3. The BMS system data communication method according to claim 1, wherein the number of sampling periods required for the second stage to complete one data acquisition is not less than the number of first stages.
4. The BMS system data communication method according to claim 3, wherein each sampling period of said second stage is distributed with one complete packet period.
5. The BMS system data communication method according to claim 3, wherein the second stage uniformly distributes the complete data packet periods of a plurality of different first stages in the sampling period required for completing one data acquisition.
6. The BMS system data communication method of claim 1, wherein the reduced data packet has a packet length of 21 bits and comprises a 2-bit start frame, a 4-bit address frame, a 1-bit decision frame, an 8-bit data frame, a 4-bit check frame, and a 2-bit end frame, which are sequentially arranged.
7. The BMS system data communication method according to claim 1, wherein the packet length bits 49 bits of the complete data packet include a 2-bit start frame, a 4-bit address frame, a 1-bit decision frame, a 32-bit data frame, an 8-bit check frame, and a 2-bit end frame, which are sequentially arranged.
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004072660A (en) * 2002-08-09 2004-03-04 Hitsuki Ryu Communication method and communication system
WO2017101484A1 (en) * 2015-12-18 2017-06-22 中兴通讯股份有限公司 Time synchronization method and device
CN112202623A (en) * 2020-12-03 2021-01-08 北京和利时***工程有限公司 Data processing method and device
WO2021169486A1 (en) * 2020-02-24 2021-09-02 上海蔚来汽车有限公司 Method, system and apparatus for monitoring battery impedance abnormality on basis of charging process
CN214122423U (en) * 2020-10-14 2021-09-03 江苏纵帆微电子有限公司 Battery pack data transmission system
CN113497745A (en) * 2020-04-03 2021-10-12 深圳市优贝特科技有限公司 BMS networking method based on Can communication

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004072660A (en) * 2002-08-09 2004-03-04 Hitsuki Ryu Communication method and communication system
WO2017101484A1 (en) * 2015-12-18 2017-06-22 中兴通讯股份有限公司 Time synchronization method and device
WO2021169486A1 (en) * 2020-02-24 2021-09-02 上海蔚来汽车有限公司 Method, system and apparatus for monitoring battery impedance abnormality on basis of charging process
CN113497745A (en) * 2020-04-03 2021-10-12 深圳市优贝特科技有限公司 BMS networking method based on Can communication
CN214122423U (en) * 2020-10-14 2021-09-03 江苏纵帆微电子有限公司 Battery pack data transmission system
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