CN114122191A - Preparation method of avalanche photodetector - Google Patents
Preparation method of avalanche photodetector Download PDFInfo
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- CN114122191A CN114122191A CN202111207165.2A CN202111207165A CN114122191A CN 114122191 A CN114122191 A CN 114122191A CN 202111207165 A CN202111207165 A CN 202111207165A CN 114122191 A CN114122191 A CN 114122191A
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
- H01L31/1844—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier
- H01L31/107—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode
- H01L31/1075—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure
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- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a preparation method of an avalanche photodetector, which comprises the steps of sequentially growing a p-type InP buffer layer and In on a p-type InP substrate0.53Ga0.47As absorption layer and In1‑x‑yAlxGayAs band width graded layer, p-type In0.52Al0.48As charge control layer, In0.52Al0.48As multiplication layer, InxGa1‑xAsyP1‑yEtching the stop layer and the p-type InP cover layer; etching the p-type InP cover layer, wherein the etched region comprises a central region and one or more annular regions surrounding the central region; secondly, performing epitaxy on the n-type InP in the corroded area to form an n-type InP central collector region and an n-type InP electric field protection ring; then SiO is deposited2Layer, and etching away partial region of SiO2Form a ring of SiO2An isolation layer; then depositing an optical antireflection film and opening the optical antireflection film on the central collector regionForming a metal contact window; then, an upper electrode is constructed and is in contact with the central collector region through a metal contact window; and finally, preparing a back electrode on the back of the InP substrate.
Description
Technical Field
The invention belongs to the technical field of photoelectric detectors, and particularly relates to a preparation method of an avalanche photoelectric detector.
Background
The working principle of the avalanche photodetector is that under a high reverse bias electric field, photons are incident to an i region to enable electrons to jump from a valence band to a conduction band to form an electron-hole pair, and the electron-hole pair is accelerated under the action of a strong electric field and collides with other atoms to generate additional electron-hole pairs and continuously generate the electrons and the hole pairs. Because fewer photons and even single photon incidence can trigger the avalanche multiplication process to cause the change of current macroscopically, the avalanche photodetector has extremely high sensitivity and detection efficiency and has very high application prospect in the field of weak light detection and even single photon detection. Compared with the traditional silicon-based photoelectric detector, the avalanche photoelectric detector based on the III-V group compound semiconductor has higher sensitivity, can perform near-infrared weak light three-dimensional imaging with the wavelength of 1um or more, and has important application in the fields of biochemistry, quantum communication, laser radar and the like.
Most of the existing avalanche photodetectors are based on a separate absorption layer and multiplication layer Structure (SCAM), in which a narrow bandwidth ingaas (p) material is used as the light absorption layer and a high bandwidth InP or InAlAs material is used as the multiplication layer. The structure can effectively improve the breakdown voltage of the detector and reduce tunneling dark current. However, because a large bandwidth difference exists between the absorption layer and the multiplication layer, photogenerated carriers are easily accumulated at the interface of the absorption layer and the multiplication layer, and the response rate is reduced. In addition, the existing preparation methods of the avalanche photodetector are mainly divided into two types: (1) a table top type: the active area is corroded into a cylindrical table top, and the upper electrode and the lower electrode are respectively arranged at the top end of the table top and the lower part of the table top, so that the p area and the n area of the detector are electrically isolated. The preparation method can effectively reduce the parasitic capacitance of the detector, thereby improving the response speed of the detector, but the process flow is complex, particularly the side wall of the table top needs a special passivation process, and the dark current of the side wall of the table top is increased and the breakdown of the side wall of the table top is easily caused, thereby affecting the performance and the reliability of the detector; (2) plane diffusion type: a P-type metal contact layer is formed in a specific region in a Zn diffusion mode, and the non-diffused region is semi-insulating or weak n-type, so that the P region and the n region of the detector can be electrically isolated without mesa etching change. Because mesa etching is not needed, the preparation method can reduce the process complexity to a certain extent and reduce the problems of side wall leakage current and side wall breakdown caused by mesa etching. However, Zn diffusion is a process that is difficult to control accurately and varies widely. Instability of the Zn diffusion process causes inconsistency of the detector, and also reduces yield in production.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a preparation method of an avalanche photodetector.
The invention is realized by the following technical scheme:
a preparation method of an avalanche photodetector comprises the following steps:
the method comprises the following steps: sequentially growing a p-type InP buffer layer and In on a p-type InP substrate0.53Ga0.47As absorption layer and In1-x- yAlxGayAs band width graded layer, p-type In0.52Al0.48As charge control layer, In0.52Al0.48As multiplication layer, InxGa1-xAsyP1-yEtching the stop layer and the p-type InP cover layer;
step two: using SiO2Patterning the hard mask, etching the p-type InP cap layer by etching, the etched region including a central region and one or more annular regions surrounding the central region, the etching being stopped at InxGa1-xAsyP1-yEtching the upper surface of the stop layer;
step three: using SiO2And performing secondary epitaxy on the etched region of the hard mask in the second step to generate n-type InP, wherein an n-type InP central collector region is formed in the central region of the second step, an n-type InP electric field protection ring surrounding the central collector region is formed in the annular region of the second step, and SiO is etched off by using an etching method after secondary epitaxy2Hard masking to obtain a flat surface topography;
step four: depositing SiO on the flat surface of the p-type InP cover layer, the n-type InP central collector region and the n-type InP electric field protection ring obtained in the third step2Layer, then etching away partial region of SiO using a photoresist patterned mask2So that the p-type InP cover is arranged at the periphery of the outermost n-type InP electric field protection ringA ring of SiO is formed on the layer region2An isolation layer;
step five: in the p-type InP cover layer, n-type InP central collector region, n-type InP electric field protection ring, and SiO2Depositing an optical antireflection film on the surface of the isolation layer, and opening a metal contact window on the optical antireflection film above the n-type InP central collector region by using a corrosion method;
step six: forming an upper electrode metal and metal wiring board graph by using photoresist, evaporating metal and carrying out metal stripping to obtain a patterned upper electrode and a patterned metal wiring board, wherein the upper electrode is in contact with the n-type InP central collector region through the metal contact window in the fifth step and is annealed to form ohmic contact; the metal wiring board is positioned on SiO2The right upper side of the isolation layer; the upper electrode is provided with an optical incidence window which is arranged above the n-type InP central collector region;
step seven: and thinning and polishing the back surface of the p-type InP substrate, preparing a back electrode on the lower surface of the p-type InP substrate, and annealing to form ohmic contact.
In the technical scheme, in the first step, the thickness of the p-type InP buffer layer is 0.1-1 um; said In0.53Ga0.47The thickness of the As absorption layer is 1-5um, and the background doping concentration is less than 1 × 1015/cm3The layer is a photon-generated carrier generation layer and is used for absorbing photon energy of 1.0-1.7 um.
In the above technical solution, the In1-x-yAlxGayThe As bandwidth gradient layer comprises N layers of In with gradually changed components1-x- yAlxGayAs layer with N greater than 1, preferably 3 layers, each layer having a bandwidth of 0.75eV to 1.35eV, In1-x-yAlxGayThe bandwidth of each layer of the As bandwidth gradient layer is increased from bottom to top In sequence0.53Ga0.47The bandwidth of the As absorption layer is gradually changed to p-type In0.52Al0.48The As charge controls the bandwidth of the layer, reducing the accumulation of photogenerated carriers at the interface.
In the above technical solution, the p-type In0.52Al0.48The thickness of the As charge control layer is 200-500nm, and the doping concentration is 6 multiplied by 1016/cm3。
In the above technical solution, the In0.52Al0.48The thickness of the As multiplication layer is 300-800nm, and the background doping concentration is less than 1 multiplied by 1015/cm3。
In the above technical solution, the InxGa1-xAsyP1-yThe etch stop layer has a thickness of 10-40nm, a bandwidth of 1.25eV, and is formed by using InxGa1-xAsyP1-yEtching the stop layer to avoid In0.52Al0.48The As multiplication layer is exposed in the air after being corroded to generate oxidation, the surface defect density is reduced, and the dark current generated by surface recombination is reduced.
In the above technical solution, the number of the n-type InP electric field protection rings in the step three is 1 to 10, the width of each n-type InP electric field protection ring is 2 to 15um, and the interval between adjacent n-type InP electric field protection rings is 2 to 20 um.
In the above technical solution, the metal contact window in the fifth step is annular.
In the above technical solution, the second epitaxy in the third step adopts a Metal Organic Chemical Vapor Deposition (MOCVD) or a Molecular Beam Epitaxy (MBE).
In the above technical solution, the SiO2The thickness of the isolation layer is 500nm to 1500 nm.
The invention has the advantages and beneficial effects that:
1. using multiple layers of In1-x-yAlxGayAs band width transition layer to realize In0.53Ga0.47As absorption layer and In0.52Al0.48The bandwidth between the As charge control layers is smoothly transited, so that the accumulation of photon-generated carriers is reduced, and the response speed of the detector is improved.
2. And (3) carrying out patterned etching on the p-type InP cover layer, and filling n-type InP in the etched area through secondary epitaxy to form a central collector area and an electric field protection ring surrounding the central collector area. The central collector region is used for forming ohmic contact with the upper electrode and simultaneously plays a role of a window layer. The electric field protection ring can effectively reduce the electric field intensity at the edge of the collector regionAnd the probability of the breakdown of the edge of the detector is reduced, and the tunneling dark current of the edge is reduced. By using InxGa1-xAsyP1-yEtching the stop layer to avoid In0.52Al0.48As materials are exposed to air after corrosion to generate oxidation, the surface defect density is reduced, and dark current generated by surface recombination is reduced.
3. And filling the etched area with n-type InP by secondary epitaxy by utilizing selective secondary epitaxy. The material grown by secondary epitaxy and the corroded material are the same base material and belong to homoepitaxy, so that the crystal quality of secondary epitaxy is high, and the defect density of an interface is reduced. In addition, the InP of the secondary epitaxy is n-type, a reverse bias PN junction potential barrier is formed with the rest part of the adjacent p-type InP cover layer, and the electrical insulation between the central collector region and other regions is realized.
4. The epitaxial structure adopts a flip structure on the n under the p, so that the use of a Zn diffusion process is avoided. Wherein p-type In0.52Al0.48As charge control layer with unintentional In doping0.52Al0.48The thickness and doping of the As multiplication layer are accurately controlled by the first epitaxial growth, so that the problem of inconsistency of the detector caused by instability of a Zn diffusion process in a preparation method of the diffusion detector does not exist. Meanwhile, the detector adopting the preparation method disclosed by the invention is of a planar structure, and the problems of mesa side wall leakage current and easy breakdown caused by the mesa structure preparation method are solved.
5. SiO with the thickness of 500nm to 1500nm is added between the upper electrode metal wiring board and the p-type InP cover layer2The isolation layer effectively reduces the capacitance between the metal wiring board and the p-type InP cover layer, and improves the response speed of the detector.
6. The upper electrode and the metal routing plate are simultaneously deposited and patterned, so that the process flow is simplified, the consumption of noble metal is saved, and the production cost is reduced.
Drawings
Fig. 1 is a schematic flow chart of a method of manufacturing an avalanche photodetector of the present invention.
Figure 2 is a typical IV plot for an avalanche photodetector of the present invention.
Figure 3 is a typical CV curve plot for an avalanche photodetector of the present invention.
Wherein:
1: a p-type InP substrate, a P-type InP substrate,
2: a p-type InP buffer layer is formed,
3：In0.53Ga0.47an As absorption layer is arranged on the substrate,
4：In1-x-yAlxGaythe As bandwidth gradual-change layer is arranged on the substrate,
5: p-type In0.52Al0.48An As charge control layer, which is a charge control layer,
6：In0.52Al0.48an As multiplication layer is arranged on the substrate,
7：InxGa1-xAsyP1-ythe corrosion of the stop layer is completed,
8: a p-type InP cap layer is formed,
9: an n-type InP central collector region,
10: an n-type InP electric field protection ring,
11：SiO2the isolation layer is arranged on the substrate,
12: an optical anti-reflection film is provided,
13: the metal contact window of the optical antireflection film,
14: upper electrode, 14.1: a metal wire-striking plate is arranged on the base,
15: the optical entrance window of the upper electrode,
16: a back electrode.
For a person skilled in the art, other relevant figures can be obtained from the above figures without inventive effort.
Detailed Description
In order to make the technical solution of the present invention better understood, the technical solution of the present invention is further described below with reference to specific examples.
As shown in fig. 1, a method for manufacturing an avalanche photodetector includes the following steps:
the method comprises the following steps: sequentially growing a p-type InP buffer layer 2 and In on a p-type InP substrate 10.53Ga0.47As absorption layer 3, In1-x-yAlxGayBandwidth of AsGraded layer 4, p-type In0.52Al0.48As charge control layer 5, In0.52Al0.48As multiplication layer 6, InxGa1-xAsyP1-yThe stop layer 7 and the p-type InP cap layer 8 are etched.
Step two: using SiO2Patterning the hard mask, etching the p-type InP cap layer 8 In specific regions by etching, the etched regions including a central region and one or more annular regions surrounding the central region, In this embodiment, an annular region, the annular region and the central region having a gap therebetween, and the etching stopping at InxGa1-xAsyP1-yEtching the upper surface of the stop layer 7; in the case of multiple annular regions, there is also a space between the annular regions.
Step three: using SiO2The hard mask carries out secondary epitaxy on the etched area in the second step to generate n-type InP, the second step comprises the steps of forming an n-type InP central collector area 9 in the central area in the second step, forming an n-type InP electric field protection ring 10 surrounding the central collector area in the annular area in the second step, and after secondary epitaxy, SiO is etched away by using an etching method2Hard masking to achieve a flat surface topography, i.e., flush the top surface of the p-type InP cap layer 8, the top surface of the n-type InP central collector region 9, and the top surface of the n-type InP electric field guard ring 10. Further, the secondary epitaxy may be performed by Metal Organic Chemical Vapor Deposition (MOCVD) or Molecular Beam Epitaxy (MBE).
Step four: depositing SiO on the surfaces of the p-type InP cover layer 8, the n-type InP central collector region 9 and the n-type InP electric field protection ring 10 obtained in the third step2Layer, then etching away partial region of SiO using a photoresist patterned mask2So that a ring of SiO is formed on the p-type InP cover layer 8 region at the periphery of the outermost n-type InP electric field protection ring 102Spacer layer 11, SiO2The thickness of the spacer layer 11 is 1 um.
Step five: a p-type InP cover layer 8, an n-type InP central collector region 9, an n-type InP electric field protection ring 10, and SiO2Depositing an optical antireflection film 12 on the surface of the isolation layer 11, and etching to obtain an optical antireflection film on the n-type InP central collector region 9The antireflection film 12 is provided with an annular metal contact window 13.
Step six: and forming upper electrode metal and metal wiring board graphs by using photoresist, evaporating metal and carrying out metal stripping to obtain the patterned upper electrode 14 and the metal wiring board 14.1. An upper electrode 14 is contacted with the n-type InP central collector region 9 through the metal contact window 13 in the fifth step, and ohmic contact is formed by annealing; the metal wiring board 14.1 is positioned on SiO2Right above the isolation layer 11; the upper electrode 14 has an optical entrance window 15, and the optical entrance window 15 is above the n-type InP central collector region 9.
Step seven: the back surface of the p-type InP substrate 1 is thinned and polished, and then a back electrode 16 is prepared on the lower surface of the p-type InP substrate and is annealed to form ohmic contact.
Further, In the first step, the p-type InP buffer layer 2 is 0.5um thick, which is used to better match the p-type InP substrate 1 with In0.53Ga0.47The difference of lattice constants between the As absorption layers 3 due to the difference of growth conditions ensures the growth quality of the epitaxial layers.
Further, In the first step, In0.53Ga0.47The thickness of the As absorption layer 3 is 2um, and the background doping concentration is less than 1 multiplied by 1015/cm3The layer is a photogenerated carrier generation layer and is designed to absorb photon energy of 1.0-1.7 um as far as possible.
Further, In the first step, In1-x-yAlxGayThe As bandwidth gradual change layer 4 comprises three layers, and the bandwidth of each layer is 0.85eV, 0.95eV and 1.05eV from bottom to top respectively; three layers of bandwidth graded layer In0.53Ga0.47The bandwidth of the As absorption layer 3 is gradually changed to p-type In0.52Al0.48The bandwidth of the As charge control layer 5 can effectively reduce the accumulation of photon-generated carriers at the interface.
Further, In the first step, the p-type In0.52Al0.48The As charge control layer 5 has a thickness of 300nm and a doping concentration of 6X 1016/cm3. The thickness and doping concentration of this layer determine the onset voltage of the detector avalanche effect.
Further, In the first step, In0.52Al0.48The As multiplication layer 6 has a thickness of 500nm and a background doping concentration of less than 1 × 1015/cm3. Said InxGa1-xAsyP1-yThe etch stop layer 7 has a thickness of 20nm and a bandwidth of 1.25 eV. By using InxGa1-xAsyP1-yEtching the stop layer 7 to avoid In0.52Al0.48The As multiplication layer 6 is exposed to air after etching to generate oxidation, reducing the surface defect density, thereby reducing dark current due to surface recombination.
Further, in the third step, the n-type InP central collector region 9 is heavily doped with Si in-situ, the n-type InP electric field protection ring 10 is annular, has a width of 10um (i.e., the difference between the inner diameter and the outer diameter of the n-type InP electric field protection ring is 10um), and has a distance of 15um from the n-type InP central collector region 9, and the electric field protection ring 10 can effectively reduce the fringe electric field of the n-type InP central collector region 9, thereby reducing the probability of fringe breakdown and reducing the tunneling dark current.
Referring to fig. 2, in a typical IV curve of the prepared avalanche photodetector, a is a reverse photocurrent curve corresponding to different voltage values, and b is a reverse dark current curve corresponding to different voltage values, it can be seen that the dark current of the prepared avalanche photodetector is still within 1nA around the breakdown voltage, which is much smaller than the typical dark current value (>10nA) of the mesa avalanche photodetector.
Referring to fig. 3, a typical CV curve of the prepared avalanche photodetector shows that the prepared avalanche photodetector has a small capacitance value under the working voltage, which makes it suitable for use in ultra-high speed photodetection.
The invention has been described in an illustrative manner, and it is to be understood that any simple variations, modifications or other equivalent changes which can be made by one skilled in the art without departing from the spirit of the invention fall within the scope of the invention.
Claims (10)
1. A preparation method of an avalanche photodetector is characterized by comprising the following steps: the method comprises the following steps:
the method comprises the following steps: sequentially growing a p-type InP buffer layer and In on a p-type InP substrate0.53Ga0.47As absorption layer and In1-x-yAlxGayAs band width graded layer, p-type In0.52Al0.48As charge control layer, In0.52Al0.48As multiplication layer, InxGa1-xAsyP1-yEtching the stop layer and the p-type InP cover layer;
step two: using SiO2Patterning the hard mask, etching the p-type InP cap layer by etching, the etched region including a central region and one or more annular regions surrounding the central region, the etching being stopped at InxGa1-xAsyP1-yEtching the upper surface of the stop layer;
step three: using SiO2And performing secondary epitaxy on the etched region of the hard mask in the second step to generate n-type InP, wherein an n-type InP central collector region is formed in the central region of the second step, an n-type InP electric field protection ring surrounding the central collector region is formed in the annular region of the second step, and SiO is etched off by using an etching method after secondary epitaxy2Hard masking to obtain a flat surface topography;
step four: depositing SiO on the flat surface of the p-type InP cover layer, the n-type InP central collector region and the n-type InP electric field protection ring obtained in the third step2Layer, then etching away partial region of SiO using a photoresist patterned mask2So that a ring of SiO is formed on the p-type InP cover layer region at the periphery of the outermost n-type InP electric field protection ring2An isolation layer;
step five: in the p-type InP cover layer, n-type InP central collector region, n-type InP electric field protection ring, and SiO2Depositing an optical antireflection film on the surface of the isolation layer, and opening a metal contact window on the optical antireflection film above the n-type InP central collector region by using a corrosion method;
step six: forming upper electrode metal and metal wiring board pattern by using photoresist, evaporating metal and stripping metal to obtain patterned upper electrodeAnd a metal wiring board, wherein an upper electrode is contacted with the n-type InP central collector region through the metal contact window in the fifth step, and ohmic contact is formed by annealing; the metal wiring board is positioned on SiO2The right upper side of the isolation layer; the upper electrode is provided with an optical incidence window which is arranged above the n-type InP central collector region;
step seven: and thinning and polishing the back surface of the p-type InP substrate, preparing a back electrode on the lower surface of the p-type InP substrate, and annealing to form ohmic contact.
2. The method of preparing an avalanche photodetector as claimed in claim 1, wherein: in the first step, the thickness of the p-type InP buffer layer is 0.1-1 um; said In0.53Ga0.47The thickness of the As absorption layer is 1-5um, and the background doping concentration is less than 1 × 1015/cm3The photon energy absorption device is used for absorbing photon energy of 1.0-1.7 um.
3. The method of preparing an avalanche photodetector as claimed in claim 1, wherein: said In1-x-yAlxGayThe As bandwidth gradient layer comprises N layers of In with gradually changed components1-x-yAlxGayAs layer with N greater than 1, preferably 3 layers, each layer having a bandwidth of 0.75eV to 1.35eV, In1-x-yAlxGayThe bandwidth of each layer of the As bandwidth gradient layer is increased from bottom to top In sequence0.53Ga0.47The bandwidth of the As absorption layer is gradually changed to p-type In0.52Al0.48The As charge controls the bandwidth of the layer, reducing the accumulation of photogenerated carriers at the interface.
4. The method of preparing an avalanche photodetector as claimed in claim 1, wherein: the p-type In0.52Al0.48The thickness of the As charge control layer is 200-500nm, and the doping concentration is 6 multiplied by 1016/cm3。
5. The method of preparing an avalanche photodetector as claimed in claim 1, wherein: said In0.52Al0.48The thickness of the As multiplication layer is 300-800nm, and the background doping concentration is less than 1 multiplied by 1015/cm3。
6. The method of preparing an avalanche photodetector as claimed in claim 1, wherein: said InxGa1-xAsyP1-yThe etch stop layer has a thickness of 10-40nm, a bandwidth of 1.25eV, and is formed by using InxGa1-xAsyP1-yEtching the stop layer to avoid In0.52Al0.48The As multiplication layer is exposed in the air after being corroded to generate oxidation, the surface defect density is reduced, and the dark current generated by surface recombination is reduced.
7. The method of preparing an avalanche photodetector as claimed in claim 1, wherein: the number of the n-type InP electric field protection rings in the third step is 1 to 10, the width of each n-type InP electric field protection ring is 2 to 15um, and the interval between the adjacent n-type InP electric field protection rings is 2 to 20 um.
8. The method of preparing an avalanche photodetector as claimed in claim 1, wherein: and step five, the metal contact window is annular.
9. The method of preparing an avalanche photodetector as claimed in claim 1, wherein: and the secondary epitaxy in the third step adopts a metal organic chemical vapor deposition method or a molecular beam epitaxy method.
10. The method of preparing an avalanche photodetector as claimed in claim 1, wherein: the SiO2The thickness of the isolation layer is 500nm to 1500 nm.
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