CN114050718B - Capacitive voltage division soft switching inverter with commutation action point bias voltage switching function - Google Patents

Capacitive voltage division soft switching inverter with commutation action point bias voltage switching function Download PDF

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CN114050718B
CN114050718B CN202111167470.3A CN202111167470A CN114050718B CN 114050718 B CN114050718 B CN 114050718B CN 202111167470 A CN202111167470 A CN 202111167470A CN 114050718 B CN114050718 B CN 114050718B
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time
auxiliary
switch
current
point
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CN114050718A (en
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禹健
樊启航
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Shanxi University
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Shanxi University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4241—Arrangements for improving power factor of AC input using a resonant converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses a capacitive voltage division soft switching inverter with a commutation action point bias voltage switching function, which can realize ZVS conduction of a main loop switch and ZCS conduction of an auxiliary loop switch. The bias voltage of the commutation action point is switched, so that the converter is suitable for two states of high and low input voltages. The charge balance keeps the capacitive division point in a constant voltage state. The efficiency and the power density are effectively improved, and the cost and the EMI are reduced.

Description

Capacitive voltage division soft switching inverter with commutation action point bias voltage switching function
Technical Field
The invention relates to the technical field of power electronic current transformation, in particular to a capacitive voltage division soft switching inverter with a current transformation action point offset voltage switching function.
Background
Power factor correction PFC is typically used to increase the power factor PF and reduce total harmonic distortion. In many PFC circuits, boost converters are widely used due to their simple structure, continuous input current and strong uniformity of characteristics. The bridge-free Boost PFC reduces the conduction loss by reducing the number of semiconductor devices on a working loop, thereby achieving the purpose of improving the efficiency. However, the problem of switching loss in the bridgeless PFC is remarkable, and when the switching frequency is increased, the switching loss in the circuit is increased, and especially when the circuit is operated in CCM, the reverse recovery current of the freewheeling diode increases the turn-on loss of the switching tube. The high switching frequency operation is realized, the topological structure and the control scheme of the auxiliary converter soft switching converter do not influence the working mode of the original main loop while optimizing parameters, and the switching loss is reduced without increasing the switching stress.
Divan proposed in 1989 the first modern soft switching converter: an active clamp resonance type DC-Link inverter AC-RDCL. The de donker in 1990 proposed an auxiliary resonant commutated pole converter ARCP. In the ARCP inverter initially proposed, the commutation current pulse is generated by an auxiliary circuit consisting of a DC-link DC bus capacitor, a bi-directional switch and a resonant inductor, i.e. capacitive voltage division is used. The topology structure is simple, and parameters such as efficiency, output power and power density are improved.
However, the technical bottleneck is always that the charge of the capacitive voltage division point in the direct current link is unbalanced, the voltage is unstable, and the application of low output frequency is particularly prominent. A complex detection and delay control circuit is needed, and energy storage before the current conversion of the current conversion inductor is controlled according to the voltage of the voltage division point and the load current.
The inverter with inductance voltage division can keep the voltage of the voltage division point stable, and control is simplified. The coupling inductance voltage division type topology comprises a series voltage division type and a parallel voltage division type. Typically a zero voltage switching ZVT inverter with one resonant pole having two coupled inductors. The auxiliary circuit adopts a transformer with saturated iron core and works at zero load frequency. Various inverters based on ZVT-2CI have peak efficiency as high as 99%. The problem with inductive voltage-dividing inverters is the unidirectional reset of the excitation current relative to capacitive voltage-dividing inverters. The transformer core cannot be reset in one switching period, the selected transformer core is large in size, and two sets of auxiliary circuits are needed to realize auxiliary current conversion of the main switch under bidirectional current output; and the auxiliary converter diode has no clamping measure, and the overcharging ringing causes high voltage stress and EMI.
Disclosure of Invention
In order to solve the defects and shortcomings of the prior art, the capacitive voltage-dividing soft-switching inverter with the function of converting the offset voltage of the action point is provided, zero-voltage switching on of a main switch is realized, the efficiency and the power density are effectively improved, and the cost and the EMI are reduced.
The technical scheme adopted for solving the technical problems is as follows: provided is a capacitive voltage division soft switching inverter with commutation point bias voltage switching, comprising: first main switching tube S 1 Second main switching tube S 2 Third main switching tube S 3 Fourth main switching tube S 4 Flying capacitor C F Main loop DC bus capacitor C B Auxiliary loop DC bus capacitor C aB First auxiliary capacitor C a1 A second auxiliary capacitor C a2 First auxiliary diode D a1 First auxiliary diode D a2 Third auxiliary switch tube S a3 Fourth auxiliary switching tube S a4 Fifth auxiliary diode D a5 Sixth auxiliary switching tube S a6 Seventh auxiliary switching tube S a7 Eighth auxiliary diode D a8 Filter inductance L in Input power supplyV in Auxiliary commutation inductance L r ；
Wherein the first main switching tube S 1 Source electrode of (a) and second main switching tube S 2 The drain electrode of (a) is connected with the point a, the third main switch tube S 3 Source electrode of (d) and fourth main switching tube S 4 The drain electrode of (a) is connected with the point b, and a second main switch tube S 2 Source electrode of (c) and third main switching tube S 4 Is connected with the drain electrode of the capacitor C at the point O F One end of the cable is connected with the point a, and the other end of the cable is connected with the point b; fifth auxiliary diode D a5 And a first auxiliary diode D a1 Is connected to the point c, the first auxiliary diode D a1 Anode of (D) and second auxiliary diode D a2 Is connected to the point D, the second auxiliary diode D a2 Positive electrode of (a) and a third auxiliary switch tube S a3 The collector of (a) is connected to the point P, a third auxiliary switch tube S a3 Emitter and fourth auxiliary switching tube S a4 The collector of (C) is connected to point e, the first auxiliary capacitor C a1 One end is connected with the point d, the other end is connected with the point e, and the auxiliary circuit direct current bus capacitor C aB The positive electrode is connected with the point c, and the negative electrode is connected with a fourth auxiliary switching tube S a4 An emitter of (a); sixth auxiliary switching tube S a6 Emitter and seventh auxiliary switching tube S a7 The collector of (a) is connected to the Q point, a seventh auxiliary switch tube S a7 Emitter of (D) and eighth auxiliary diode D a8 Is connected with the negative electrode of the battery; second auxiliary capacitor C a2 One end is connected with the O point, and the other end is connected with a seventh auxiliary switching tube S a7 An emitter of (a); auxiliary commutation inductance L r One end is connected with the P point, and the other end is connected with the Q point; filter inductance L in One end is connected with the O point, and the other end is connected with the input power V in Is a positive electrode of (a); first main switch S 1 Drain electrode of (C) and main circuit dc bus capacitor C B A fourth main switch S connected with the positive electrode of the transistor 4 Source electrode of (a), fourth auxiliary switch tube S a4 Emitter of (D), eighth auxiliary diode D a8 Positive electrode of (a), input power V in Negative electrode of (C) and main circuit DC bus capacitor B Is connected with the negative electrode of the battery;
setting i load For flowing through the filterWave inductance L in Instantaneous current of I load For flowing through the filter inductance L in Average current of (2); c (C) 1 -C 4 Main switch S 1 -S 4 Equivalent parallel capacitors of (a), the capacitance values are all C m-oss ； C a3 -C a4 Is an auxiliary switch S a3 -S a4 Equivalent parallel capacitance of C a6 -C a7 Is an auxiliary switch S a6 -S a7 Equivalent parallel capacitors of (a), the capacitance values are all C a-oss The method comprises the steps of carrying out a first treatment on the surface of the Commutating resonance current I r The definition is as follows: converter resonant inductor L r Maximum current passing through the filter inductor L in Current I in (a) load Taking into account the difference between the requirements of the ZVS on-time of the main switch that needs to be commutated and i load Determining a measurement error; i.e load From input power V in The inflow O-point is defined as positive; i.e Lr The flow from point P to point Q is defined as positive.
When (when)At the time S a6 General purpose, S a7 Break, i load >0；
The circuit is in a stable state S 2 、S 4 In an on state S 1 、S 3 And S is a3 -S a4 S and S a6 -S a7 In an off state; input power supply current i load Through S 2 、S 4 And C F Freewheeling;
t 0 at the moment, the auxiliary switch S is turned on a4 And S is a6 Delay D A1 After that, turn off S 2 ；
Turn off S 2 Delay D A2 Open S 3 ；
S 3 Keep open, D A3 After that, the auxiliary switch S is opened a6 And S is a4 The main switch S is turned off 4 ；
T Δ1 Control by the main loop SPWM;
opening the main switch S 4 Delay D A4 Switch on main switch S 1 ；
T Δ2 Control by the main loop SPWM;
main switch S 1 Keep on, delay D A5 Switch on auxiliary switch S a3 And S is a6 ；
D A5 ＝τ
τ is controlled by the main loop SPWM;
auxiliary switch S a3 And S is a6 Keep on, delay D A6 After that, turn off S 1 ；
Turn off S 1 Delay D A7 Open S 4 ；
S 4 Keep open, D A8 After that, the auxiliary switch S is opened a3 And S is a6 ；
If turn off S 3 Returning to the initial stable state;
when (when)At the time S a6 Break, S a7 General, i load >0; the principle of the corresponding switching action is to balance the charge flowing in and out of the converter capacitor.
The working process of the circuit running in different modes is as follows:
when (when)At the time S a6 General purpose, S a7 Break, i load >0；
Mode 1, t<t 0 ： Circuit arrangement In a stable state S 2 、S 4 In an on state S 1 、S 3 And S is a3 -S a4 S and S a6 -S a7 In an off state; input power supply current i load Through S 2 、S 4 And C F Freewheeling;
mode 2, t 0 -t 1 ：t 0 At the moment of time of day, opening up Auxiliary switch S a4 And S is a6 Auxiliary diode D a2 Is naturally conducted and commutates the inductive current i Lr Linear increase from zero; t is t A Time, i Lr The value of (t) reaches I load ；t 1 At time instant, the commutation inductance current i Lr (t) size and filter inductance L in The sum of the current and the precharge current I load +I r Equal;
wherein t is 0 From time to t Time 1 Time period T between 0-1 The method comprises the following steps:
mode 3, t 1 -t 2 ：t 1 At the moment, turn off S 2 The potential at the point O starts to drop, and the converter inductance L r With main switch S 2 Equivalent parallel capacitance C of (2) 2 And a main switch S 3 Equivalent output capacitance C 3 Resonance occurs for C 2 Charging pair C 3 Discharging; t is t 2 At the moment, the potential of the O point reaches 0;
the time domain expression of the commutation inductance current is:
wherein:
wherein t is 1 From time to t 2 Time period T between moments 1-2 The method comprises the following steps:
mode 4, t 2 -t 3 :t 2 At the moment, the main switch S 3 Is turned on by the body diode L r The current in (a) starts to linearly decrease, t B Time of daySwitch on main loop switch S 3 ，t C Time, L r The current in (1) is linearly reduced to I load ；t 3 Time, L r The current in (2) decreases linearly to 0;
S 3 the ZVS on allowed period of time t 2 From time to t C Time period T between moments 2-C ：
Wherein t is 2 From time to t 3 Time period T between moments 2-3 The method comprises the following steps:
mode 5, t 3 -t 4 ：t 3 Time of day, auxiliary switching tube S a6 Disconnection at T Δ1 Before, the fourth auxiliary switch tube S is turned off at any time a4 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is Δ1 Controlled by SPWM (sinusoidal pulse Width modulation); wherein t is 3 From time to t 4 Time period T between moments 3-4 The method comprises the following steps:
T 3-4 ＝T Δ1
mode 6, t 4 -t 5 :t 4 At the moment, the main switching tube S is turned off 4 The potential at the point O starts to rise; t is t 5 At the moment, the potential of O point rises to V DC Third main switching tube S 1 Natural conduction, delay T Δ2 After that, the main switch tube S is turned on 1 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is Δ2 Controlled by SPWM; the current is at S 1 、S 3 、L in 、C F 、 C B And V in Circulating in the formed loop;
wherein t is 4 From time to t 5 Time period T between moments 4-5 The method comprises the following steps:
mode 7,t 5 -t 6 ：t 5 +T Δ2 At +τ, the auxiliary switch S is turned on a3 And S is a6 Auxiliary diode D a1 Natural conduction, current-converting inductance i Lr Linear increase from zero; t is t D Time, i Lr The value of (t) reaches I load ；t 6 At time instant, the commutation inductance current i Lr (t) size and filter inductance L in Sum of the currents in (1) and the precharge current (I) load +I r Equal;
wherein t is 5 From time to t 6 Time period T between moments 5-6 The method comprises the following steps:
mode 8,t 6 -t 7 ：t 6 At the moment, turn off S 1 O point potential drops, and the converter inductance L r With main switch S 1 Equivalent output capacitance C of (2) 1 And a main switch S 4 Equivalent output capacitance C of (2) 4 Resonance occurs in C 1 Charging pair C 4 Discharging; t is t 7 At the moment, the potential of the O point reaches 0;
the time domain expression of the commutation inductance current is:
wherein:
wherein t is 6 From time to t 7 Time period T between moments 6-7 The method comprises the following steps:
mode 9, t 7 -t 8 :t 7 At the moment, the main switch S 4 Is conducted by the body diode of the (2); l (L) r The current in (a) starts to linearly decrease, t E At the moment, the main loop switch S is turned on 4 ，t F Time, L r The current in (1) is linearly reduced to I load ；t 8 Time, L r The current in (2) decreases linearly to 0;
S 4 the ZVS on allowed period of time t 7 To t F Time period T between 7-F ：
Wherein t is 7 From time to t 8 Time period T between moments 7-8 The method comprises the following steps:
mode 10, t 8 -t 9 ：t 8 Time of day, auxiliary switching tube S a6 The auxiliary switching tube S is turned off at any time after the switch-off a3 The method comprises the steps of carrying out a first treatment on the surface of the The current is at S 3 、S 4 And L in Circulating in the formed loop; in this state the main switch S is turned off 3 Returning to mode 1;
when (when)At the time S a6 Break, S a7 General, i load >0; the principle of the corresponding switching action is to balance the charge flowing in and out of the converter capacitor.
Compared with the prior art, the invention provides the capacitive voltage division soft switching inverter with the function point bias voltage switching function, which can realize ZVS conduction of the main loop switch and ZCS conduction of the auxiliary loop switch. And the bias voltage of the commutation action point is switched, so that the method is suitable for two states of high and low input voltages. The charge balance keeps the capacitive division point in a constant voltage state. Effectively improves efficiency and power density, and reduces cost and EMI.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
fig. 1 is a schematic circuit diagram of a capacitive voltage-dividing soft-switching inverter with a commutation point bias voltage switching function.
Fig. 2 is a schematic circuit diagram of a capacitive voltage-dividing soft-switching inverter with a commutation point bias voltage switching in a mode during operation.
Fig. 3 is a schematic circuit connection diagram of a capacitive voltage-dividing soft-switching inverter with a commutation point bias voltage switching in a second mode during operation.
Fig. 4 is a schematic circuit connection diagram of a capacitive voltage division soft switching inverter with a commutation point bias voltage switching in a third mode during operation.
Fig. 5 is a schematic diagram of circuit connection of a capacitive voltage-dividing soft-switching inverter with a commutation point bias voltage switching in mode four during operation.
Fig. 6 is a schematic diagram of circuit connection of a capacitive voltage-dividing soft-switching inverter with a commutation point bias voltage switching in mode five during operation.
Fig. 7 is a schematic diagram of circuit connection of a capacitive voltage-dividing soft-switching inverter with a commutation point bias voltage switching in mode six during operation.
Fig. 8 is a schematic diagram of circuit connection of a capacitive voltage-dividing soft-switching inverter with a commutation point bias voltage switching in mode seven during operation.
Fig. 9 is a schematic diagram of circuit connection of a capacitive voltage-dividing soft-switching inverter with a commutation point bias voltage switching in a mode eight during operation.
Fig. 10 is a schematic diagram of circuit connection of a capacitive voltage-dividing soft-switching inverter with a commutation point bias voltage switching in a mode nine during operation.
Fig. 11 is a schematic diagram of circuit connection of a capacitive voltage-dividing soft-switching inverter with a commutation point bias voltage switching in mode ten during operation.
Fig. 12 is a schematic diagram of driving pulse signals and node voltage waveforms of each switching tube of the capacitive voltage division soft switching inverter with a commutation point bias voltage switching function.
Fig. 13 is a phase plane analysis diagram of a resonant state of a capacitive voltage-dividing soft-switching inverter with a commutation point bias voltage switching according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the detailed description and specific examples, while indicating the invention, are intended for purposes of illustration only and are not intended to limit the scope of the invention. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments of the invention without making any inventive effort, will fall within the scope of the invention.
As shown in fig. 1, the present invention provides a capacitive voltage division soft switching inverter with a commutation action point bias voltage switching, including: first main switching tube S 1 Second main switching tube S 2 Third main switching tube S 3 Fourth main switching tube S 4 Flying capacitor C F Main loop DC bus capacitor C B Auxiliary loop DC bus capacitor C aB First auxiliary capacitor C a1 A second auxiliary capacitor C a2 First auxiliary diode D a1 First auxiliary diode D a2 Third auxiliary switch tube S a3 Fourth auxiliary switching tube S a4 Fifth auxiliary diode D a5 Sixth auxiliary switching tube S a6 Seventh auxiliary switching tube S a7 Eighth auxiliary diode D a8 Filter inductance L in Input power V in Auxiliary commutation inductance L r ；
Wherein the first main switching tube S 1 Source electrode of (a) and second main switching tube S 2 The drain electrode of (a) is connected with the point a, the third main switch tube S 3 Source electrode of (d) and fourth main switching tube S 4 The drain electrode of (a) is connected with the point b, and a second main switch tube S 2 Source electrode of (c) and third main switching tube S 4 Is connected with the drain electrode of the capacitor C at the point O F One end of the cable is connected with the point a, and the other end of the cable is connected with the point b; fifth auxiliary diode D a5 And a first auxiliary diode D a1 Is connected to the point c, the first auxiliary diode D a1 Anode of (D) and second auxiliary diode D a2 Is connected to the point D, the second auxiliary diode D a2 Positive electrode of (a) and a third auxiliary switch tube S a3 The collector of (a) is connected to the point P, a third auxiliary switch tube S a3 Emitter and fourth auxiliary switching tube S a4 The collector of (C) is connected to point e, the first auxiliary capacitor C a1 One end is connected with the point d, the other end is connected with the point e, and the auxiliary circuit direct current bus capacitor C aB The positive electrode is connected with the point c, and the negative electrode is connected with a fourth auxiliary switching tube S a4 An emitter of (a); sixth auxiliary switching tube S a6 Emitter and seventh auxiliary switching tube S a7 The collector of (a) is connected to the Q point, a seventh auxiliary switch tube S a7 Emitter of (D) and eighth auxiliary diode D a8 Is connected with the negative electrode of the battery; second auxiliary capacitor C a2 One end is connected with the O point, and the other end is connected with a seventh auxiliary switching tube S a7 An emitter of (a); auxiliary commutation inductance L r One end is connected with the P point, and the other end is connected with the Q point; filter inductance L in One end is connected with the O point, and the other end is connected with the input power V in Is a positive electrode of (a); first main switch S 1 Drain electrode of (C) and main circuit dc bus capacitor C B A fourth main switch S connected with the positive electrode of the transistor 4 Source electrode of (a), fourth auxiliary switch tube S a4 Emitter of (D), eighth auxiliary diode D a8 Positive electrode of (a), input power V in Negative electrode of (C) and main circuit DC bus capacitor B Is connected with the negative electrode of the battery;
the waveforms of the driving pulse signals of the switching transistors and the voltage waveforms of the main nodes are shown in fig. 12. Setting i load For flowing through the filter inductance L in Instantaneous current of I load For flowing through the filter inductance L in Average current of (2); c (C) 1 -C 4 Main switch S 1 -S 4 Equivalent parallel capacitors of (a), the capacitance values are all C m-oss ；C a3 -C a4 Is an auxiliary switch S a3 -S a4 Equivalent parallel capacitance of C a6 -C a7 Is an auxiliary switch S a6 -S a7 Equivalent parallel capacitors of (a), the capacitance values are all C a-oss The method comprises the steps of carrying out a first treatment on the surface of the Commutating resonance current I r The definition is as follows: commutation resonance inductance L r Maximum electricity passing throughFlow and filter inductance L in Current I in (a) load Taking into account the difference between the requirements of the ZVS on-time of the main switch requiring commutation and i load Determining a measurement error; i.e load From input power V in The inflow O-point is defined as positive; i.e Lr The flow from point P to point Q is defined as positive. Specific elements and parameters are shown in table 1:
TABLE 1 element and parameter Table
When (when)At the time S a6 General purpose, S a7 Break, i load >0。
The circuit is in a stable state S 2 、S 4 In an on state S 1 、S 3 And S is a3 -S a4 S and S a6 -S a7 In an off state; input power supply current i load Through S 2 、S 4 And C F And (5) freewheeling.
t 0 At the moment, the auxiliary switch S is turned on a4 And S is a6 Delay D A1 After that, turn off S 2 ；
Turn off S 2 Delay D A2 Open S 3 ；
S 3 Keep open, D A3 After that, the auxiliary switch S is opened a6 And S is a4 The main switch S is turned off 4 ；
T Δ1 Controlled by the main loop SPWM.
Opening the main switch S 4 Delay D A4 Switch on main switch S 1 ；
T Δ2 Controlled by the main loop SPWM.
Main switch S 1 Keep on, delay D A5 Switch on auxiliary switch S a3 And S is a6 ；
D A5 ＝τ
τ is controlled by the main loop SPWM.
Auxiliary switch S a3 And S is a6 Keep on, delay D A6 After that, turn off S 1 ；
Turn off S 1 Delay D A7 Open S 4 ；
S 4 Keep open, D A8 After that, the auxiliary switch S is opened a3 And S is a6 ；
If turn off S 3 Then return to the initial steady state.
When (when)At the time S a6 Break, S a7 General, i load >0, which corresponds to the switching action, the principle is to balance the charge flowing in and out of the converter capacitor.
The working processes of different modes of circuit operation are as follows:
when (when)At the time S a6 General purpose, S a7 Break, i load >0；
As shown in fig. 2, in the case of mode 1, t<t 0 ： Circuit arrangement In a stable state S 2 、S 4 In an on state S 1 、S 3 And S is a3 -S a4 S and S a6 -S a7 In an off state; input power supply current i load Through S 2 、S 4 And C F Freewheeling;
as shown in fig. 3, in the case of mode 2, t 0 -t 1 ：t 0 At the moment of time of day, opening up Auxiliary switch S a4 And S is a6 Auxiliary diode D a2 Natural conduction, current-converting inductance i Lr Linear increase from zero; t is t A Time, i Lr The value of (t) reaches I load ；t 1 At time instant, the commutation inductance current i Lr (t) size and Filtering inductance L in Sum of the currents in (1) and the precharge current (I) load +I r Equal;
wherein t is 0 From time to t Time 1 Time period T between 0-1 The method comprises the following steps:
as shown in fig. 4, in the case of mode 3, t 1 -t 2 ：t 1 At the moment, turn off S 2 The potential of the point O begins to drop, and the converter inductance L r With main switch S 2 Equivalent parallel capacitance C of (2) 2 And a main switch S 3 Equivalent output capacitance C 3 Resonance occurs in C 2 Charging pair C 3 Discharging; t is t 2 At the moment, the potential of the O point reaches 0;
the time domain expression of the commutation inductance current is:
wherein:
wherein t is 1 From time to t 2 Time period T between moments 1-2 The method comprises the following steps:
as shown in fig. 5, in the case of mode 4, t 2 -t 3 :t 2 At the moment, the main switch S 3 Is turned on by the body diode L r The current in (1) starts to decrease linearly, t B At the moment, the main loop switch S is turned on 3 ，t C Time, L r The current in (1) is linearly reduced to I load ；t 3 Time, L r The current in (2) decreases linearly to 0;
S 3 the ZVS on allowed period of time t 2 From time to t C Time period T between moments 2-C ：
Wherein t is 2 From time to t 3 Time period T between moments 2-3 The method comprises the following steps:
as shown in fig. 6, in the case of mode 5, t 3 -t 4 ：t 3 Time of day, auxiliary switching tube S a6 Break off, at T Δ1 Before, the fourth auxiliary switch tube S is turned off at any time a4 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is Δ1 Controlled by SPWM (sinusoidal pulse Width modulation);
wherein t is 3 From time to t 4 Time period T between moments 3-4 The method comprises the following steps:
T 3-4 ＝T Δ1
as shown in fig. 7, in the case of mode 6, t 4 -t 5 :t 4 At the moment, the main switching tube S is turned off 4 The potential at the point O starts to rise; t is t 5 At the moment, the potential of O point rises to V DC Third main switching tube S 1 Natural conduction, delay T Δ2 After that, the main switch tube S is turned on 1 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is Δ2 Controlled by SPWM; the current is at S 1 、S 3 、L in 、C F 、C B And V in Circulating in the formed loop;
wherein t is 4 From time to t 5 Time period T between moments 4-5 The method comprises the following steps:
as shown in fig. 8, in the case of mode 7, t 5 -t 6 ：t 5 +T Δ2 At +τ, the auxiliary switch S is turned on a3 And S is a6 Auxiliary diode D a1 Natural conduction, current-converting inductance i Lr Linear increase from zero; t is t D Time, i Lr The value of (t) reaches I load ；t 6 At time instant, the commutation inductance current i Lr (t) size and filter inductance L in Sum of the currents in (1) and the precharge current (I) load +I r Equal;
wherein t is 5 From time to t 6 Time period T between moments 5-6 The method comprises the following steps:
as shown in fig. 9, in the case of mode 8, t 6 -t 7 ：t 6 At the moment, turn off S 1 The potential of the point O is reduced, and the converter inductance L r With main switch S 1 Equivalent output capacitance C of (2) 1 And a main switch S 4 Equivalent output capacitance C of (2) 4 Resonance occurs in C 1 Charging pair C 4 Discharging; t is t 7 At moment, the potential of the O point reaches 0;
the time domain expression of the commutation inductance current is:
wherein:
wherein t is 6 From time to t 7 Time period T between moments 6-7 The method comprises the following steps:
as shown in fig. 10, in the case of mode 9, t 7 -t 8 :t 7 At the moment, the main switch S 4 Is conducted by a body diode; l (L) r The current in (1) starts to decrease linearly, t E At the moment, the main loop switch S is turned on 4 ， t F Time, L r The current in (1) is linearly reduced to I load ；t 8 Time, L r The current in (2) decreases linearly to 0;
S 4 the ZVS on allowed period of time t 7 To t F Time period T between 7-F ：
Wherein t is 7 From time to t 8 Time period T between moments 7-8 The method comprises the following steps:
as shown in fig. 11, in the case of mode 10, t 8 -t 9 ：t 8 Time of day, auxiliary switching tube S a6 The auxiliary switching tube S is turned off at any time after the switch-off a3 The method comprises the steps of carrying out a first treatment on the surface of the The current is at S 3 、S 4 And L in Circulating in the formed loop; in this state the main switch S is turned off 3 Returning to mode 1;
when (when)At the time S a6 Break, S a7 General, i load >0; the principle of the corresponding switching action is to balance the charge flowing in and out of the converter capacitor.
The embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those having ordinary skill in the art without departing from the spirit of the present invention and the scope of the claims, which are all within the protection of the present invention.

Claims (3)

1. A capacitive voltage dividing soft switching inverter for switching a commutation point bias voltage, comprising: first main switching tube S 1 Second main switching tube S 2 Third main switching tube S 3 Fourth main switching tube S 4 Flying capacitor C F DC bus capacitor of main loopC B Auxiliary loop DC bus capacitor C aB First auxiliary capacitor C a1 A second auxiliary capacitor C a2 First auxiliary diode D a1 First auxiliary diode D a2 Third auxiliary switch tube S a3 Fourth auxiliary switching tube S a4 Fifth auxiliary diode D a5 Sixth auxiliary switching tube S a6 Seventh auxiliary switching tube S a7 Eighth auxiliary diode D a8 Filter inductance L in Input power V in Auxiliary commutation inductance L r ；
Wherein the first main switching tube S 1 Source electrode of (a) and second main switching tube S 2 The drain electrode of (a) is connected with the point a, the third main switch tube S 3 Source electrode of (d) and fourth main switching tube S 4 The drain electrode of (a) is connected with the point b, and a second main switch tube S 2 Source electrode of (c) and third main switching tube S 3 Is connected with the drain electrode of the capacitor C at the point O F One end of the cable is connected with the point a, and the other end of the cable is connected with the point b; fifth auxiliary diode D a5 And a first auxiliary diode D a1 Is connected to the point c, the first auxiliary diode D a1 Anode of (D) and second auxiliary diode D a2 Is connected to the point D, the second auxiliary diode D a2 Positive electrode of (a) and a third auxiliary switch tube S a3 The collector of (a) is connected to the point P, a third auxiliary switch tube S a3 Emitter and fourth auxiliary switching tube S a4 The collector of (C) is connected to point e, the first auxiliary capacitor C a1 One end is connected with the point d, the other end is connected with the point e, and the auxiliary circuit direct current bus capacitor C aB The positive electrode is connected with the point c, and the negative electrode is connected with a fourth auxiliary switching tube S a4 An emitter of (a); sixth auxiliary switching tube S a6 Emitter and seventh auxiliary switching tube S a7 The collector of (a) is connected to the Q point, a seventh auxiliary switch tube S a7 Emitter of (D) and eighth auxiliary diode D a8 Is connected with the negative electrode of the battery; second auxiliary capacitor C a2 One end is connected with the O point, and the other end is connected with a seventh auxiliary switching tube S a7 An emitter of (a); auxiliary commutation inductance L r One end is connected with the P point, and the other end is connected with the Q point; filter inductance L in One end of the connecting rod is connected with the O point,the other end is connected with an input power supply V in Is a positive electrode of (a); first main switch S 1 Drain electrode of (C) and main circuit dc bus capacitor C B A fourth main switch S connected with the positive electrode of the transistor 4 Source electrode of (a), fourth auxiliary switch tube S a4 Emitter of (D), eighth auxiliary diode D a8 Positive electrode of (a), input power V in Negative electrode of (C) and main circuit DC bus capacitor B Is connected with the negative electrode of the battery;
setting i load For flowing through the filter inductance L in Instantaneous current of I load For flowing through the filter inductance L in Average current of (2); c (C) 1 -C 4 Main switch S 1 -S 4 Equivalent parallel capacitors of (a), the capacitance values are all C m-oss ；C a3 -C a4 Is an auxiliary switch S a3 -S a4 Equivalent parallel capacitance of C a6 -C a7 Is an auxiliary switch S a6 -S a7 Equivalent parallel capacitors of (a), the capacitance values are all C a-oss The method comprises the steps of carrying out a first treatment on the surface of the Commutating resonance current I r The definition is as follows: converter resonant inductance L r Maximum current passing through the filter inductor L in Current I in (a) load Taking into account the difference between the requirements of the ZVS on-time of the main switch requiring commutation and i load Determining a measurement error; i.e load From input power V in The inflow O-point is defined as positive; i.e Lr The flow from point P to point Q is defined as positive.
2. The commutating action point bias voltage switched capacitive divided soft switching inverter of claim 1 wherein the circuit operates in two modes altogether, wherein,
working condition one: when (when)At the time S a6 General purpose, S a7 Break, i load >0；
The circuit is in a stable state S 2 、S 4 In an on state S 1 、S 3 And S is a3 -S a4 S and S a6 -S a7 In an off state; input power supply currenti load Through S 2 、S 4 And C F Freewheeling; t is t 0 At the moment, the auxiliary switch S is turned on a4 And S is a6 Delay D A1 After that, turn off S 2 ；
Turn off S 2 Delay D A2 Open S 3 ；
S 3 Keep open, D A3 After that, the auxiliary switch S is opened a6 And S is a4 The main switch S is turned off 4 ；
T Δ1 Control by the main loop SPWM;
opening the main switch S 4 Delay D A4 Switch on main switch S 1 ；
T Δ2 Control by the main loop SPWM;
main switch S 1 Keep on, delay D A5 Switch on auxiliary switch S a3 And S is a6 ；
D A5 ＝τ
τ is controlled by the main loop SPWM;
auxiliary switch S a3 And S is a6 Keep on, delay D A6 After that, turn off S 1 ；
Turn off S 1 Delay D A7 Open S 4 ；
S 4 Keep open, D A8 After that, the auxiliary switch S is opened a3 And S is a6 ；
If turn off S 3 Returning to the initial stable state;
working condition II: when (when)At the time S a6 Break, S a7 General, i load >0；
The circuit is in a stable state S 1 、S 2 In an on state S 3 、S 4 And S is a3 -S a4 S and S a6 -S a7 In an off state; input power supply current i load Through S 1 、S 2 And C B Freewheeling;
t 0 at the moment, the auxiliary switch S is turned on a7 And S is a3 Delay D A1 After that, turn off S 1 ；
Turn off S 1 Delay D A2 Open S 4 ；
S 4 Keep open, D A3 After that, the auxiliary switch S is opened a3 And S is a7 The main switch S is turned off 4 ；
T Δ1 Control by the main loop SPWM;
disconnect S a3 、S a7 And S is 4 Delay D A4 Switch on main switch S 1 ；
T Δ1 Control by the main loop SPWM;
main switch S 1 Keep on, delay D A5 Switch on auxiliary switch S a7 And S is a4 ；
D A5 ＝τ
τ is controlled by the main loop SPWM;
auxiliary switch S a7 And S is a4 Keep on, delay D A6 After that, turn off S 2 ；
Turn off S 2 Delay D A7 Open S 3 ；
S 3 Keep open, D A8 After that, the auxiliary switch S is opened a7 And S is a4 ；
If turn off S 4 Then return to the initial steady state.
3. The commutating action point bias voltage switched capacitive voltage division soft switching inverter of claim 2 wherein the circuit operates in two modes:
working condition one: when (when)At the time S a6 General purpose, S a7 Break, i load >0；
Mode 1, t<t 0 ： Circuit arrangement In a stable state S 2 、S 4 In an on state S 1 、S 3 And S is a3 -S a4 S and S a6 -S a7 In an off state; input power supply current i load Through S 2 、S 4 And C F Freewheeling;
mode 2, t 0 -t 1 ：t 0 At the moment, the auxiliary switch S is turned on a4 And S is a6 Auxiliary diode D a2 Natural conduction, current-converting inductance i Lr Linear increase from zero; t is t A Time, i Lr The value of (t) reaches I load ；t 1 At time instant, the commutation inductance current i Lr (t) size and filter inductance L in Sum of the currents in (1) and the precharge current (I) load +I r Equal;
wherein t is 0 From time to t Time 1 Time period T between 0-1 The method comprises the following steps:
mode 3, t 1 -t 2 ：t 1 At the moment, turn off S 2 The potential at the point O starts to drop, and the converter inductance L r With main switch S 2 Equivalent parallel capacitance C of (2) 2 And a main switch S 3 Equivalent output capacitance C 3 Resonance occurs in C 2 Charging pair C 3 Discharging; t is t 2 At the moment, the potential of the O point reaches 0;
the time domain expression of the commutation inductance current is:
wherein:
wherein t is 1 From time to t 2 Time period T between moments 1-2 The method comprises the following steps:
in the mode 4 of the present invention,t 2 -t 3 :t 2 at the moment, the main switch S 3 Is turned on by the body diode L r The current in (1) starts to decrease linearly, t B At the moment, the main loop switch S is turned on 3 ，t C Time, L r The current in (1) is linearly reduced to I load ；t 3 Time, L r The current in (2) decreases linearly to 0;
S 3 the ZVS on allowed period of time t 2 From time to t C Time period T between moments 2-C ：
Wherein t is 2 From time to t 3 Time period T between moments 2-3 The method comprises the following steps:
mode 5, t 3 -t 4 ：t 3 Time of day, auxiliary switching tube S a6 Disconnection at T Δ1 Before, the fourth auxiliary switch tube S is turned off at any time a4 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is Δ1 Controlled by SPWM (sinusoidal pulse Width modulation); wherein t is 3 From time to t 4 Time period T between moments 3-4 The method comprises the following steps:
T 3-4 ＝T Δ1
mode 6, t 4 -t 5 :t 4 At the moment, the main switching tube S is turned off 4 The potential at the point O starts to rise; t is t 5 Time, O pointThe potential rises to V DC Third main switching tube S 1 Natural conduction, delay T Δ2 After that, the main switch tube S is turned on 1 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is Δ2 Controlled by SPWM; the current is at S 1 、S 3 、L in 、C F 、C B And V in Circulating in the formed loop;
wherein t is 4 From time to t 5 Time period T between moments 4-5 The method comprises the following steps:
mode 7,t 5 -t 6 ：t 5 +T Δ2 At +τ, the auxiliary switch S is turned on a3 And S is a6 Auxiliary diode D a1 Natural conduction, current-converting inductance i Lr Linear increase from zero; t is t D Time, i Lr The value of (t) reaches I load ；t 6 At time instant, the commutation inductance current i Lr (t) size and filter inductance L in Sum of the currents in (1) and the precharge current (I) load +I r Equal;
wherein t is 5 From time to t 6 Time period T between moments 5-6 The method comprises the following steps:
mode 8,t 6 -t 7 ：t 6 At the moment, turn off S 1 O point potential drops, and the converter inductance L r With main switch S 1 Equivalent output capacitance C of (2) 1 And a main switch S 4 Equivalent output capacitance C of (2) 4 Resonance occurs in C 1 Charging pair C 4 Discharging; t is t 7 At the moment, the potential of the O point reaches 0;
the time domain expression of the commutation inductance current is:
wherein:
wherein t is 6 From time to t 7 Time period T between moments 6-7 The method comprises the following steps:
mode 9, t 7 -t 8 :t 7 At the moment, the main switch S 4 Is conducted by the body diode of the (2); l (L) r The current in (1) starts to decrease linearly, t E At the moment, the main loop switch S is turned on 4 ，t F Time, L r The current in (1) is linearly reduced to I load ；t 8 Time, L r The current in (2) decreases linearly to 0;
S 4 the ZVS on allowed period of time t 7 To t F Time period T between 7-F ：
Wherein t is 7 From time to t 8 Time period T between moments 7-8 The method comprises the following steps:
mode 10, t 8 -t 9 ：t 8 Time of day, auxiliary switching tube S a6 The auxiliary switching tube S is turned off at any time after the switch-off a3 The method comprises the steps of carrying out a first treatment on the surface of the The current is at S 3 、S 4 And L in Circulating in the formed loop; in this state the main switch S is turned off 3 Returning to mode 1;
working condition II: when (when)At the time S a6 Break, S a7 General, i load >0；
Mode 1, t<t 0 : the circuit is in a stable state S 1 、S 2 In an on state S 3 、S 4 And S is a3 -S a4 S and S a6 -S a7 In an off state; input power supply current i load Through S 1 、S 2 And C B Freewheeling;
mode 2, t 0 -t 1 ：t 0 At the moment, the auxiliary switch S is turned on a7 And S is a3 Auxiliary diode D a1 Natural conduction, current-converting inductance i Lr Linear increase from zero; t is t A Time, i Lr The value of (t) reaches I load ；t 1 At time instant, the commutation inductance current i Lr (t) size and filter inductance L in Sum of the currents in (1) and the precharge current (I) load +I r Equal;
wherein t is 0 From time to t 1 Time period T between moments 0-1 The method comprises the following steps:
mode 3, t 1 -t 2 ：t 1 At the moment, turn off S 1 The potential at the point O starts to drop, and the converter inductance L r With main switch S 1 Equivalent parallel capacitance C of (2) 1 And a main switch S 4 Equivalent output capacitance C 4 Resonance occurs in C 1 Charging pair C 4 Discharging; t is t 2 At the moment, the potential of the O point reaches 0;
the time domain expression of the commutation inductance current is:
wherein:
wherein t is 1 From time to t 2 Time period T between moments 1-2 The method comprises the following steps:
mode 4, t 2 -t 3 :t 2 At the moment, the main switch S 4 Is turned on by the body diode of (C), and the auxiliary diode D a8 Natural conduction, L r The current in (1) starts to decrease linearly, t B At the moment, the main loop switch S is turned on 4 ，t C Time, L r The current in (1) is linearly reduced to I load ；t 3 Time, L r The current in (2) decreases linearly to 0;
S 4 the ZVS on allowed period of time t 2 From time to t C Time period T between moments 2-C ：
Wherein t is 2 From time to t 3 Time period T between moments 2-3 The method comprises the following steps:
mode 5, t 3 -t 4 ：t 3 Time of day, auxiliary switching tube S a7 Off, auxiliary diode D a8 Naturally break, at T Δ1 Before, the fourth auxiliary switch tube S is turned off at any time a3 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is Δ1 Controlled by SPWM;
wherein t is 3 From time to t 4 Time period T between moments 3-4 The method comprises the following steps:
T 3-4 ＝T Δ1
mode 6, t 4 -t 5 :t 4 At the moment, the main switching tube S is turned off 4 The potential at the point O starts to rise; t is t 5 At the moment, the potential of the O point rises toThird main switching tube S 1 Natural conduction, delay T Δ2 After that, the main switch tube S is turned on 1 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is Δ2 Controlled by SPWM; the current is at S 1 、S 2 、L in 、C B And V in Circulating in the formed loop;
wherein t is 4 From time to t 5 Time period T between moments 4-5 The method comprises the following steps:
mode 7,t 5 -t 6 ：t 5 +T Δ2 At +τ, the auxiliary switch S is turned on a7 And S is a4 Auxiliary diode D a2 Natural conduction, current-converting inductance i Lr Linear increase from zero; t is t D Time, i Lr The value of (t) reaches I load ；t 6 At time instant, the commutation inductance current i Lr (t) size and filter inductance L in Sum of the currents in (1) and the precharge current (I) load +I r Equal;
wherein t is 5 From time to t 6 Time period T between moments 5-6 The method comprises the following steps:
mode 8,t 6 -t 7 ：t 6 At the moment, turn off S 2 O point potential drops, and the converter inductance L r With main switch S 2 Equivalent output capacitance C of (2) 2 And a main switch S 3 Equivalent output capacitance C of (2) 3 Resonance occurs in C 2 Charging pair C 3 Discharging; t is t 7 At the moment, the potential of the O point reaches 0;
the time domain expression of the commutation inductance current is:
wherein:
wherein t is 6 From time to t 7 Time period T between moments 6-7 The method comprises the following steps:
mode 9, t 7 -t 8 :t 7 At the moment, the main switch S 3 Is conducted by the body diode of the (2); l (L) r The current in (1) starts to decrease linearly, t E At the moment, the main loop switch S is turned on 3 ，t F Time, L r The current in (1) is linearly reduced to I load ；t 8 Time, L r The current in (2) decreases linearly to 0;
S 3 the ZVS on allowed period of time t 7 To t F Time period T between 7-F ：
Wherein t is 7 From time to t 8 Time period T between moments 7-8 The method comprises the following steps:
mode 10, t 8 -t 9 ：t 8 Time of day, auxiliary switching tube S a7 The auxiliary switching tube S is turned off at any time after the switch-off a4 The method comprises the steps of carrying out a first treatment on the surface of the The current is at S 1 、S 3 、C F And L in Circulating in the formed loop; in this state the main switch S is turned off 3 Mode 1 may be returned.
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Publication number Priority date Publication date Assignee Title
KR20110019537A (en) * 2009-08-20 2011-02-28 삼성전기주식회사 Soft switching inverter using soft switching converter
CN102281006A (en) * 2011-03-31 2011-12-14 东北大学 Novel three-level soft switching converter
CN106533224A (en) * 2016-12-08 2017-03-22 东北大学 Novel resonant DC-link soft switching inverter and modulation method thereof

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Publication number Priority date Publication date Assignee Title
KR20110019537A (en) * 2009-08-20 2011-02-28 삼성전기주식회사 Soft switching inverter using soft switching converter
CN102281006A (en) * 2011-03-31 2011-12-14 东北大学 Novel three-level soft switching converter
CN106533224A (en) * 2016-12-08 2017-03-22 东北大学 Novel resonant DC-link soft switching inverter and modulation method thereof

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