CN114050202B - Preparation method of SE-superimposed alkali polishing solar cell and solar cell - Google Patents

Preparation method of SE-superimposed alkali polishing solar cell and solar cell Download PDF

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CN114050202B
CN114050202B CN202111286383.XA CN202111286383A CN114050202B CN 114050202 B CN114050202 B CN 114050202B CN 202111286383 A CN202111286383 A CN 202111286383A CN 114050202 B CN114050202 B CN 114050202B
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silicon wafer
solar cell
silicon
oxidation
chained
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CN114050202A (en
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王英杰
宋飞飞
何悦
任勇
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Hengdian Group DMEGC Magnetics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0236Special surface textures
    • H01L31/02363Special surface textures of the semiconductor body itself, e.g. textured active layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/02168Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1864Annealing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1868Passivation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

The invention relates to a preparation method of an alkali polishing solar cell with SE (selective emitter) superimposed and a solar cell. The process for preparing the solar cell comprises the steps of texturing, diffusion, SE, alkali polishing, annealing and oxidizing, PECVD back film, PECVD positive film, laser grooving and screen printing, and the process is an alkali polishing process, wherein the process is positioned after SE and before oxidizing and annealing, so that an oxide layer grows uniformly and compactly.

Description

Preparation method of SE-superimposed alkali polishing solar cell and solar cell
Technical Field
The invention relates to the field of photovoltaics, relates to the field of solar cell manufacturing, and in particular relates to a preparation method of an alkali polishing solar cell with SE (selective emitter) superimposed and a solar cell.
Background
Photovoltaic power generation is one of the main clean energy sources, and the core of power generation is a solar cell. The solar energy manufacturing process which is mainstream in the market at present comprises working procedures of texturing, diffusion, etching, coating, silk screen and the like. The main stream etching process comprises dry etching, wet etching of an acid polishing system and wet etching of an alkali polishing system. Compared with acid polishing and ion dry etching, the alkali polishing etching has the advantages of good polishing effect, low process weight reduction, good process repeatability, emission reduction, environmental protection and the like. The disadvantage is that an oxidation process is added in the alkali polishing, silicon dioxide is generated on the diffusion surface of the silicon oxide wafer, and the silicon dioxide does not react with alkali in the alkali polishing, so that the diffusion surface is protected. The oxidation process generally comprises tubular oxidation and chain oxidation, and the two technologies are used at present and have advantages and disadvantages. The tube oxidation has the defects of more automatic procedures and high equipment cost; the method has the advantages of stable process, good repeatability and compact oxide layer. The chained oxidation has the advantages of low automation cost, simple working procedure, unstable process, high environmental requirement, relatively poor process repeatability, poor uniformity of an oxide layer and low yield.
CN111883618A discloses a solar cell fabrication process using SE superposition PERC process of alkaline polishing etching after ozone oxidation of the cell diffusion surface. Ozone has stronger oxidizing property than oxygen, so that the oxidizing temperature can be carried out at normal temperature, the crystal defects and the process pollution caused by high temperature are reduced, and the automation is simpler. The disadvantage is that the oxidation effect is uneven and the thickness of the oxidation is low because the ozone is extremely unstable.
CN110010721a discloses a PERC cell process using a tubular thermo-oxidative cell diffusion face. The temperature of the tubular thermal oxidation is 500-800 ℃, and the tubular thermal oxidation has the advantages of good oxidation effect and compact and uniform oxidation layer; the defect is that the high temperature process is added, the pollution of the silicon wafer manufacturing process is increased, and the process sanitation of the thermal oxidation and SE working procedures directly affects the yield. And the demand for automated and oxidation equipment for tubular thermal oxidation processes has increased significantly.
CN111074280a discloses a novel alkaline polishing process, comprising the following steps: s1, pretreatment before alkali polishing: cleaning and preprocessing a workpiece to be subjected to alkali polishing, and drying the cleaned workpiece for later use; s2, preparing a polishing alkali solution: adding pure water, sodium hydroxide, sodium nitrite, sodium fluoride and sodium phosphate into an alkali polishing tank to prepare an alkali polishing solution: s3, alkali polishing: and (3) placing the pretreated workpiece into an alkali polishing groove for polishing treatment. Has the advantages of simple process, low cost, safety and environmental protection. The defects are unstable process, high environmental requirement, poor uniformity of oxide layer and low yield.
How to obtain a solar cell with good uniformity of an oxide layer and environmental friendliness through a simple and stable process is an important research direction in the field.
Disclosure of Invention
In view of the problems existing in the prior art, the invention aims to provide a preparation method of an alkali polishing high-efficiency solar cell with SE overlapped, which adopts an alkali polishing process, ensures that an oxide layer grows uniformly and compactly after SE and before oxidation annealing.
To achieve the purpose, the invention adopts the following technical scheme:
one of the purposes of the invention is to provide a preparation method of an alkali polishing solar cell with SE superimposed, which comprises chained wet oxidation and chained wet PSG removal carried out sequentially.
The invention uses chained wet oxidation, uses concentrated nitric acid to oxidize the silicon wafer after SE process, and then washes the silicon wafer into the next process. The reaction temperature is 80-120 ℃, the oxide layer grows uniformly and compactly, the pollution caused by a high-temperature process can be avoided at a lower temperature, the chained wet method is added before chained PSG removing equipment, the chained PSG removing equipment is matched, and no additional automatic equipment is needed.
As a preferred embodiment of the present invention, the chained wet oxidation and chained wet removal PSG is located between the SE step and the alkaline polishing process.
As a preferable technical scheme of the invention, the chained wet oxidation and chained wet PSG removal uses chained equipment to sequentially perform oxidation, alkaline washing, first water washing, PSG removal, second water washing and drying according to the conveying direction of the battery piece.
As a preferred embodiment of the present invention, nitric acid solution is used for the oxidation.
The mass concentration of the nitric acid solution is preferably 60 to 70%, and the mass concentration may be 60%, 61%, 62%, 63%, 64%, 65%, 66%, 67%, 68%, 69%, 70%, or the like, but is not limited to the recited values, and other non-recited values within the range of values are equally applicable.
The oxidation temperature is preferably 80 to 120 ℃, and the temperature may be 80 ℃, 85 ℃, 90 ℃, 95 ℃, 100 ℃, 105 ℃, 110 ℃, 115 ℃, 120 ℃ or the like, but is not limited to the recited values, and other values not recited in the range of values are equally applicable.
Preferably, the oxidation reaction time is 2 to 8min, and the time may be 2min, 3min, 4min, 5min, 6min, 7min, 8min, or the like, but is not limited to the recited values, and other non-recited values within the range of values are equally applicable.
Preferably, the alkaline wash uses a weak base.
Preferably, the weak base comprises potassium hydroxide and/or sodium hydroxide.
Preferably, the mass concentration of the weak base is 1 to 5%, wherein the mass concentration of the weak base may be 1%, 1.5%, 2%, 2.5%, 3%, 3.5%, 4%, 4.5% or 5%, etc., but is not limited to the recited values, and other non-recited values within the range of the recited values are equally applicable.
Preferably, the PSG-removing solution comprises an HF solution.
Preferably, the mass fraction of the PSG-removing solution is 5-15%, wherein the mass fraction of the PSG-removing solution may be 5%, 6%, 7%, 8%, 9%, 10%, 11%, 12%, 13%, 14% or 15%, etc., but is not limited to the recited values, and other non-recited values within the range of values are equally applicable.
Preferably, the chained wet oxidation and chained wet PSG removal uses a roller to remove the oxide layer on the surface of the battery piece.
As a preferable technical scheme of the invention, the preparation method comprises the following steps: the silicon wafer is sequentially subjected to texturing, diffusion, SE, chained wet oxidation and chained wet PSG removal, alkali polishing, cleaning and etching, thermal oxidation annealing, back passivation, front antireflection, laser grooving, screen printing, sintering and electric injection, so that the solar cell is manufactured.
According to the preferred technical scheme, the texturing comprises the step of forming a light trapping structure on the surface of the textured silicon wafer to obtain the silicon wafer A.
Preferably, the pile surface obtained by the pile is 8 to 10% in reflectance, and the reflectance may be 8%, 9% or 10%, etc., but is not limited to the recited values, and other non-recited values within the range are equally applicable.
Preferably, the diffusion includes forming a PN junction by diffusion, resulting in a silicon wafer B having a lightly doped region.
Preferably, the sheet resistance of the lightly doped region obtained by the diffusion is 110 to 170Ω, and the sheet resistance may be 110Ω, 120Ω, 130Ω, 140Ω, 150Ω, 160Ω, 170Ω, or the like, but is not limited to the recited values, and other values not recited in the numerical range are equally applicable.
Preferably, the SE step includes forming a selectively heavily doped region in the lightly doped region of the surface of the silicon wafer B, to obtain a silicon wafer C.
Preferably, the sheet resistance of the heavily doped region is 50 to 80 Ω, and the sheet resistance may be 50 Ω, 55 Ω, 60 Ω, 65 Ω, 70 Ω, 75 Ω, 80 Ω, or the like, but is not limited to the listed values, and other non-listed values within the range are equally applicable.
Preferably, the chained wet oxidation and chained wet PSG removal are performed on the silicon wafer C to obtain a silicon wafer D.
As a preferable technical scheme of the invention, the alkali polishing, cleaning and etching comprises the step of polishing the back surface of the silicon wafer D by using alkali solution to obtain a silicon wafer E.
Preferably, the alkaline solution comprises sodium hydroxide solution and/or potassium hydroxide solution.
The alkali solution preferably has a mass concentration of 10 to 15%, and the mass concentration may be 10%, 11%, 12%, 13%, 14%, 15%, or the like, but is not limited to the recited values, and other non-recited values within the range are equally applicable.
The reflectance of the back surface of the silicon wafer E is preferably 38 to 45%, and the reflectance may be 38%, 39%, 40%, 41%, 42%, 43%, 44% or 45%, etc., but is not limited to the recited values, and other non-recited values within the range are equally applicable.
Preferably, the thermal oxidation annealing includes oxidizing the diffusion surface of the silicon wafer E to form a silicon dioxide film layer, thereby obtaining a silicon wafer F.
The oxidation temperature is preferably 650 to 750 ℃, and the temperature may be 650 ℃, 660 ℃, 670 ℃, 680 ℃, 690 ℃, 700 ℃, 710 ℃, 720 ℃, 730 ℃, 740 ℃, 750 ℃, or the like, but is not limited to the recited values, and other non-recited values within the range are equally applicable.
Preferably, the time of the oxidation is 15 to 25 minutes, and the time may be 15 minutes, 16 minutes, 17 minutes, 18 minutes, 19 minutes, 20 minutes, 21 minutes, 22 minutes, 23 minutes, 24 minutes, 25 minutes, or the like, but is not limited to the recited values, and other non-recited values within the range of the values are equally applicable.
As a preferable technical scheme of the invention, the back passivation comprises PECVD (plasma enhanced chemical vapor deposition) aluminum oxide or silicon oxynitride, and a silicon nitride film layer is overlapped to obtain the silicon wafer G.
The total film thickness of the silicon nitride film layer is preferably 120 to 150nm, and the film thickness may be 120nm, 125nm, 130nm, 135nm, 140nm, 145nm, 150nm, or the like, but is not limited to the recited values, and other non-recited values within the range are equally applicable.
Preferably, the front side antireflection includes forming a silicon nitride antireflection film on the front side of the silicon wafer G by PECVD to obtain a silicon wafer H.
The thickness of the silicon nitride antireflection film is preferably 65 to 85nm, and the thickness may be 65nm, 66nm, 67nm, 68nm, 69nm, 70nm, 71nm, 72nm, 73nm, 74nm, 75nm, 76nm, 77nm, 78nm, 79nm, 80nm, 81nm, 82nm, 83nm, 84nm, 85nm, or the like, but is not limited to the recited values, and other non-recited values within the range of the values are equally applicable.
Preferably, the laser grooving comprises the step of punching through a passivation layer on the back of the silicon wafer H by using laser to prepare a contact hole, so as to obtain the silicon wafer I.
Preferably, the screen printing comprises screen printing a metal paste on the back side of the silicon wafer I.
Preferably, the sintering comprises forming ohmic contact between the metal paste and the silicon wafer I through sintering, so as to obtain the battery piece.
As a preferable technical scheme of the invention, the preparation method comprises the following steps:
(1) Forming a light trapping structure on the surface of the textured silicon wafer to obtain a silicon wafer A, wherein the reflectivity of the textured surface obtained by texturing is 8-10%;
(2) The silicon wafer A is subjected to diffusion to form a PN junction, so that a silicon wafer B with a lightly doped region is obtained, and the sheet resistance of the lightly doped region obtained by diffusion is 110-170Ω;
(3) Forming a selective heavy doping region in the light doping region on the surface of the silicon wafer B in the step (2) to obtain a silicon wafer C, wherein the sheet resistance of the heavy doping region is 50-80 omega;
(4) Carrying out chained wet oxidation and chained wet PSG removal on the silicon wafer C in the step (3) to obtain a silicon wafer D, sequentially carrying out alkaline washing and water washing with nitric acid mass concentration of 60-70%, oxidation temperature of 80-120 ℃ and weak base mass concentration of 1-5% and HF solution with mass fraction of 5-15% to remove PSG, water washing and drying according to the conveying direction of the battery piece by using chained equipment;
(5) Performing alkali polishing, cleaning and etching by using 10-15% alkali solution, and polishing the back surface of the silicon wafer D in the step (4) by using the alkali solution to obtain a silicon wafer E, wherein the reflectivity of the back surface after alkali polishing is 38-45%;
(6) Performing thermal oxidation annealing at 650-750 ℃ for 15-25 min on the diffusion surface of the silicon wafer F in the oxidation step (5) to form a silicon dioxide film layer, so as to obtain the silicon wafer F;
(7) The back passivation comprises the steps that (6) the silicon wafer F is subjected to PECVD (plasma enhanced chemical vapor deposition) alumina, and a silicon nitride film layer is overlapped to obtain the silicon nitride film layer with the total film thickness of 120-150 nm;
(8) The front side antireflection comprises the steps of forming a silicon nitride antireflection film on the front side of the silicon wafer G through the diffusion surface of the silicon wafer G in the PECVD step (7) to obtain a silicon wafer H with the silicon nitride film thickness of 65-85 nm;
(9) The laser grooving comprises the steps of punching through the passivation layer on the back of the silicon wafer in the step (8) by using laser, and preparing a contact hole to obtain a silicon wafer I;
(10) Screen printing metal paste on the back surface of the silicon wafer I in the step (9), and sintering to enable the metal paste and the silicon wafer to form ohmic contact to obtain a battery piece;
(11) And (5) electrically injecting the cell slice in the step (10) to obtain the solar cell.
The second object of the present invention is to provide a solar cell prepared by the preparation method according to one of the objects.
The process for manufacturing the solar cell comprises the steps of texturing, diffusion, SE, alkali polishing, annealing and oxidizing, PECVD back film, PECVD positive film, laser grooving and screen printing.
Wherein Uoc can reach more than 0.685 volts, and Isc can reach more than 11.3 amperes. FF may be 80% or more, ncell 22.95% or more, EL black spot failure 0.4% or less, and electrical performance failure 0.35% or less.
Drawings
FIG. 1 is a flow chart of the technical scheme of examples 1-5 and comparative example 1 of the present invention.
Detailed Description
The technical scheme of the invention is further described below by the specific embodiments with reference to the accompanying drawings. The following examples are merely illustrative of the present invention and are not intended to represent or limit the scope of the invention as defined in the claims.
Example 1
The present embodiment provides a method for manufacturing a solar cell, including the steps of (as shown in fig. 1):
(1) Forming a light trapping structure on the surface of a textured silicon wafer to obtain a silicon wafer A, forming pyramid textured surfaces on the surface of the silicon wafer A, and performing texturing to obtain textured surfaces with reflectivity of 10%;
(2) The silicon wafer A is subjected to diffusion to form a PN junction, so that a silicon wafer B with a lightly doped region is obtained, and the sheet resistance of the lightly doped region obtained by diffusion is 170Ω;
(3) Forming a selective heavy doping region in the light doping region on the surface of the silicon wafer B in the step (2) to obtain a silicon wafer C, wherein the sheet resistance of the heavy doping region is 50Ω;
(4) Carrying out chained wet oxidation and chained wet PSG removal on the silicon wafer C in the step (3) to obtain a silicon wafer D, sequentially carrying out alkaline washing and water washing with the nitric acid mass concentration of 65% and the temperature of 100 ℃ for 6min, the potassium hydroxide solution mass concentration of 1%, PSG removal with the solution mass fraction of 5% in the conveying direction of the battery piece by using chained equipment, removing an oxide layer on the non-diffusion surface of the battery piece by using a roller with the solution, washing and drying;
(5) Performing alkali polishing, cleaning and etching by using a potassium hydroxide solution with the mass concentration of 15%, and using the potassium hydroxide solution in the step (4) to obtain a silicon wafer E, wherein the reflectivity of the back surface after alkali polishing is 45%;
(6) Performing thermal oxidation annealing at 700 ℃ for 20min on the diffusion surface of the silicon wafer F in the oxidation step (5) to form a silicon dioxide film layer, thereby obtaining the silicon wafer F;
(7) The back passivation comprises the steps that (6) the silicon wafer F is subjected to PECVD (plasma enhanced chemical vapor deposition) alumina, and a silicon nitride film layer is overlapped to obtain the silicon nitride film layer with the total film thickness of 130 nm;
(8) The front side antireflection comprises the steps of forming a silicon nitride antireflection film on the front side through the diffusion surface of the silicon wafer G in the PECVD step (7) to obtain a silicon wafer H with the silicon nitride film thickness of 70 nm;
(9) The laser grooving comprises the steps of punching through the passivation layer on the back of the silicon wafer in the step (8) by using laser, and preparing a contact hole to obtain a silicon wafer I;
(10) Screen printing metal paste on the back surface of the silicon wafer I in the step (9), and sintering to enable the metal paste and the silicon wafer to form ohmic contact to obtain a battery piece;
(11) And (3) performing electric injection, namely obtaining the solar cell by the cell, and exciting hydrogen bonds in an electric injection mode to improve the efficiency of the cell.
Example 2
The present embodiment provides a method for manufacturing a solar cell, including the steps of (as shown in fig. 1):
(1) Forming a light trapping structure on the surface of a textured silicon wafer to obtain a silicon wafer A, forming pyramid textured surfaces on the surface of the silicon wafer A, and performing texturing to obtain textured surfaces with reflectivity of 8%;
(2) The silicon wafer A is subjected to diffusion to form a PN junction, so that a silicon wafer B with a lightly doped region is obtained, and the sheet resistance of the lightly doped region obtained by diffusion is 110Ω;
(3) Forming a selective heavy doping region in the light doping region on the surface of the silicon wafer B in the step (2) to obtain a silicon wafer C, wherein the sheet resistance of the heavy doping region is 80 omega;
(4) Carrying out chained wet oxidation and chained wet PSG removal on the silicon wafer C in the step (3) to obtain a silicon wafer D, sequentially carrying out oxidation for 2min with nitric acid mass concentration of 60% and temperature of 120 ℃ and alkali washing with potassium hydroxide solution mass concentration of 2%, washing with water, carrying out PSG removal by using HF solution with the mass fraction of 8%, removing an oxide layer on a non-diffusion surface of a battery piece in a roller carrying manner by using chained equipment, washing with water and drying;
(5) Performing alkali polishing, cleaning and etching on the back of the silicon wafer D in the step (4) through a potassium hydroxide solution with the mass concentration of 10% to obtain a silicon wafer E, wherein the reflectivity of the back after alkali polishing is 38%;
(6) Performing thermal oxidation annealing at 650 ℃ for 25min on the diffusion surface of the silicon wafer F in the oxidation step (5) to form a silicon dioxide film layer, thereby obtaining the silicon wafer F;
(7) The back passivation comprises the steps that (6) the silicon wafer F is subjected to PECVD (plasma enhanced chemical vapor deposition) alumina, and a silicon nitride film layer is overlapped to obtain the silicon nitride film layer with the total film thickness of 120 nm;
(8) The front side antireflection comprises the steps of forming a silicon nitride antireflection film on the front side through the diffusion surface of the silicon wafer G in the PECVD step (7) to obtain a silicon wafer H with the silicon nitride film thickness of 85 nm;
(9) The laser grooving comprises the steps of punching through the passivation layer on the back of the silicon wafer in the step (8) by using laser to form a contact hole, so as to obtain a silicon wafer I;
(10) Screen printing metal paste on the back surface of the silicon wafer I in the step (9), and sintering to enable the metal paste and the silicon wafer to form ohmic contact to obtain a battery piece;
(11) And (3) performing electric injection, namely obtaining the solar cell by the cell, and exciting hydrogen bonds in an electric injection mode to improve the efficiency of the cell.
Example 3
The present embodiment provides a method for manufacturing a solar cell, including the steps of (as shown in fig. 1):
(1) Forming a light trapping structure on the surface of a textured silicon wafer to obtain a silicon wafer A, forming pyramid texture on the surface, and performing texturing to obtain texture with the reflectivity of 9%;
(2) The silicon wafer A is subjected to diffusion to form a PN junction, so that a silicon wafer B with a lightly doped region is obtained, and the sheet resistance of the lightly doped region obtained by diffusion is 140 omega;
(3) Forming a selective heavy doping region in the light doping region on the surface of the silicon wafer B in the step (2) to obtain a silicon wafer C, wherein the sheet resistance of the heavy doping region is 60 omega;
(4) Carrying out chained wet oxidation and chained wet PSG removal on the silicon wafer C in the step (3) to obtain a silicon wafer D, sequentially carrying out oxidation for 4min with the mass concentration of nitric acid of 70% and the temperature of 80 ℃ and alkali washing with the mass concentration of potassium hydroxide of 1%, water washing, PSG removal of hydrofluoric acid solution with the mass fraction of 15%, removal of an oxide layer on a non-diffusion surface of a battery piece in a roller carrying manner, water washing and drying by using chained equipment according to the conveying direction of the battery piece;
(5) Performing alkali polishing, cleaning and etching on the back of the silicon wafer D in the step (4) through sodium hydroxide solution with the mass concentration of 11% to obtain a silicon wafer E, wherein the reflectivity of the back after alkali polishing is 41%;
(6) Performing thermal oxidation annealing at 750 ℃ for 15min on the diffusion surface of the silicon wafer F in the oxidation step (5) to form a silicon dioxide film layer, thereby obtaining the silicon wafer F;
(7) The back passivation comprises the steps that (6) the silicon wafer F is subjected to PECVD (plasma enhanced chemical vapor deposition) alumina, and a silicon nitride film layer is overlapped to obtain the silicon nitride film layer with the total film thickness of 150 nm;
(8) The front side antireflection comprises the steps of forming a silicon nitride antireflection film on the front side through the diffusion surface of the silicon wafer G in the PECVD step (7) to obtain a silicon wafer H with the silicon nitride film thickness of 65 nm;
(9) The laser grooving comprises the steps of punching through the passivation layer on the back of the silicon wafer in the step (8) by using laser, and preparing a contact hole to obtain a silicon wafer I;
(10) Screen printing metal paste on the back surface of the silicon wafer I in the step (9), and sintering to enable the metal paste and the silicon wafer to form ohmic contact to obtain a battery piece;
(11) And (3) performing electric injection, namely obtaining the solar cell by the cell, and exciting hydrogen bonds in an electric injection mode to improve the efficiency of the cell.
Example 4
The present embodiment provides a method for manufacturing a solar cell, including the steps of (as shown in fig. 1):
(1) Forming a light trapping structure on the surface of a textured silicon wafer to obtain a silicon wafer A, forming pyramid texture on the surface, and performing texturing to obtain a texture with a reflectivity of 8%;
(2) The silicon wafer A is subjected to diffusion to form a PN junction, so that a silicon wafer B with a lightly doped region is obtained, and the sheet resistance of the lightly doped region obtained by diffusion is 155 omega;
(3) Forming a selective heavy doping region in the light doping region on the surface of the silicon wafer B in the step (2) to obtain a silicon wafer C, wherein the sheet resistance of the heavy doping region is 65Ω;
(4) Carrying out chained wet oxidation and chained wet PSG removal on the silicon wafer C in the step (3) to obtain a silicon wafer D, sequentially carrying out oxidation for 8min with the mass concentration of nitric acid of 62% and the temperature of 90 ℃ and alkali washing with the mass concentration of potassium hydroxide solution of 2%, water washing, PSG removal of HF with the mass fraction of 10%, removal of an oxide layer on a non-diffusion surface of a battery piece in a roller carrying manner, water washing and drying by using chained equipment;
(5) Performing alkali polishing, cleaning and etching on the back of the silicon wafer D in the step (4) through a sodium hydroxide solution with the mass concentration of 12% to obtain a silicon wafer E, wherein the reflectivity of the back after alkali polishing is 40%;
(6) Performing thermal oxidation annealing at 720 ℃ for 17min on the diffusion surface of the silicon wafer F in the oxidation step (5) to form a silicon dioxide film layer, thereby obtaining the silicon wafer F;
(7) The back passivation comprises the steps that (6) the silicon wafer F is subjected to PECVD (plasma enhanced chemical vapor deposition) alumina, and a silicon nitride film layer is overlapped to obtain the silicon nitride film layer with the total film thickness of 140 nm;
(8) The front side antireflection comprises the steps of forming a silicon nitride antireflection film on the front side through the diffusion surface of the silicon wafer G in the PECVD step (7) to obtain a silicon wafer H with the silicon nitride film thickness of 75 nm;
(9) The laser grooving comprises the steps of punching through the passivation layer on the back of the silicon wafer in the step (8) by using laser to form a contact hole, so as to obtain a silicon wafer I;
(10) Screen printing metal paste on the back surface of the silicon wafer I in the step (9), and sintering to enable the metal paste and the silicon wafer to form ohmic contact to obtain a battery piece;
(11) And (3) performing electric injection, namely obtaining the solar cell by the cell, and exciting hydrogen bonds in an electric injection mode to improve the efficiency of the cell.
Example 5
The embodiment provides a preparation method of a lithium ion battery anode material, which comprises the following steps (shown in fig. 1):
(1) Forming a light trapping structure on the surface of a textured silicon wafer to obtain a silicon wafer A, wherein pyramid texture is formed in the embodiment, and the reflectivity of the texture obtained by texturing is 9%;
(2) The silicon wafer A is subjected to diffusion to form a PN junction, so that a silicon wafer B with a lightly doped region is obtained, and the sheet resistance of the lightly doped region obtained by diffusion is 125 omega;
(3) Forming a selective heavy doping region in the light doping region on the surface of the silicon wafer B in the step (2) through an SE step to obtain a silicon wafer C, wherein the sheet resistance of the heavy doping region is 70 omega;
(4) Carrying out chained wet oxidation and chained wet PSG removal on the silicon wafer C in the step (3) to obtain a silicon wafer D, sequentially carrying out oxidation for 6min with the nitric acid mass concentration of 67% and the temperature of 110 ℃ and alkali washing with the sodium hydroxide solution mass concentration of 3%, water washing, PSG removal of HF with the solution mass fraction of 6%, removal of an oxide layer on a non-diffusion surface of a battery piece in a roller carrying manner, water washing and drying by using chained equipment;
(5) Performing alkali polishing, cleaning and etching on the back surface of the silicon wafer D in the step (4) through a sodium hydroxide solution with the mass concentration of 14% to obtain a silicon wafer E, wherein the reflectivity of the back surface after alkali polishing is 43%;
(6) Performing thermal oxidation annealing at 680 ℃ for 23min on the diffusion surface of the silicon wafer F in the oxidation step (5) to form a silicon dioxide film layer, thereby obtaining the silicon wafer F;
(7) The back passivation comprises the steps that (6) the silicon wafer F is subjected to PECVD (plasma enhanced chemical vapor deposition) alumina, and a silicon nitride film layer is overlapped to obtain a silicon wafer G with the total film thickness of 125 nm;
(8) The front side antireflection comprises the steps of forming a silicon nitride antireflection film on the front side through the diffusion surface of the silicon wafer G in the PECVD step (7) to obtain a silicon wafer H with the silicon nitride film thickness of 85 nm;
(9) The laser grooving comprises the steps of punching through the passivation layer on the back of the silicon wafer in the step (8) by using laser to form a contact hole, so as to obtain a silicon wafer I;
(10) Screen printing metal paste on the back surface of the silicon wafer I in the step (9), and sintering to enable the metal paste and the silicon wafer to form ohmic contact to obtain a battery piece;
(11) And (3) performing electric injection, namely obtaining the solar cell by the cell, and exciting hydrogen bonds in an electric injection mode to improve the efficiency of the cell.
Comparative example 1
In this comparative example, nitric acid in step (4) was replaced with ozone, the temperature was replaced with normal temperature, and the normal temperature ozone oxidation alkali polishing process was used, and the other conditions were the same as in example 1.
Comparative example 2
This comparative example replaces the step (4) chained wet oxidation and chained wet removal PSG step with a conventional tubular thermal oxidation alkaline polishing process, with the other conditions being the same as in example 1.
Comparative example 3
This comparative example replaces the step (4) chained wet oxidation and chained wet removal PSG step with a conventional chained thermal oxidation alkaline polishing process, with the other conditions being the same as in example 1.
The results of the tests of the electrical properties and the yields of examples 1 to 5 and comparative examples 1 to 3 are shown in Table 1.
Other disadvantages include scratching, unfilled corners, and printing. EL failure is a common philosophy in the industry of use as an EL tester.
TABLE 1
From the above results, it can be seen that comparative example 1, in which the replacement of nitric acid with ozone was performed with alkali polishing, the yield was lowered, the yields increased, uoc, isc, FF and Ncell were also lowered, comparative example 2, in which the chain wet oxidation and chain wet PSG removal steps were replaced with conventional tube type thermal oxidation alkali polishing processes, also resulted in the lowering of the yield, and comparative example 3, in which the chain wet oxidation and chain wet PSG removal steps were replaced with conventional chain type thermal oxidation alkali polishing processes, had lower yields than examples 1 to 5. Therefore, the preparation method of the alkali polishing high-efficiency solar cell with the SE superimposed ensures that the oxide layer grows uniformly and compactly, and provides good electrochemical performance for the solar cell.
The applicant states that the detailed structural features of the present invention are described by the above embodiments, but the present invention is not limited to the above detailed structural features, i.e. it does not mean that the present invention must be implemented depending on the above detailed structural features. It should be apparent to those skilled in the art that any modifications of the present invention, equivalent substitutions of selected components of the present invention, addition of auxiliary components, selection of specific modes, etc., are within the scope of the present invention and the scope of the disclosure.

Claims (1)

1. A method for preparing an SE-superimposed alkali polished solar cell, the method comprising the steps of:
(1) Forming a light trapping structure on the surface of the textured silicon wafer to obtain a silicon wafer A, wherein the reflectivity of the textured surface obtained by texturing is 8-10%;
(2) The silicon wafer A is subjected to diffusion to form a PN junction, so that a silicon wafer B with a lightly doped region is obtained, and the sheet resistance of the lightly doped region obtained by diffusion is 110-170Ω;
(3) Forming a selective heavy doping region in the light doping region on the surface of the silicon wafer B in the step (2) to obtain a silicon wafer C, wherein the sheet resistance of the heavy doping region is 50-80 omega;
(4) Carrying out chained wet oxidation and chained wet PSG removal on the silicon wafer C in the step (3) to obtain a silicon wafer D, sequentially carrying out alkaline washing and water washing with nitric acid mass concentration of 60-70%, oxidation temperature of 80-120 ℃ and weak base mass concentration of 1-5% and HF solution with mass fraction of 5-15% to remove PSG, water washing and drying according to the conveying direction of the battery piece by using chained equipment;
(5) Performing alkali polishing, cleaning and etching by using 10-15% alkali solution, and polishing the back surface of the silicon wafer D in the step (4) by using the alkali solution to obtain a silicon wafer E, wherein the reflectivity of the back surface after alkali polishing is 38-45%;
(6) Performing thermal oxidation annealing at 650-750 ℃ for 15-25 min on the diffusion surface of the silicon wafer F in the oxidation step (5) to form a silicon dioxide film layer, so as to obtain the silicon wafer F;
(7) The back passivation comprises the steps that (6) the silicon wafer F is subjected to PECVD (plasma enhanced chemical vapor deposition) alumina, and a silicon nitride film layer is overlapped to obtain the silicon nitride film layer with the total film thickness of 120-150 nm;
(8) The front side antireflection comprises the steps of forming a silicon nitride antireflection film on the front side of the silicon wafer G through the diffusion surface of the silicon wafer G in the PECVD step (7) to obtain a silicon wafer H with the silicon nitride film thickness of 65-85 nm;
(9) The laser grooving comprises the steps of punching through the passivation layer on the back of the silicon wafer in the step (8) by using laser, and preparing a contact hole to obtain a silicon wafer I;
(10) Screen printing metal paste on the back surface of the silicon wafer I in the step (9), and sintering to enable the metal paste and the silicon wafer to form ohmic contact to obtain a battery piece;
(11) And (5) electrically injecting the cell slice in the step (10) to obtain the solar cell.
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Denomination of invention: A preparation method and solar cell for alkaline polishing solar cells with SE overlay

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