CN114038924A - Back contact heterojunction solar cell based on RIE plasma etching texturing - Google Patents

Back contact heterojunction solar cell based on RIE plasma etching texturing Download PDF

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CN114038924A
CN114038924A CN202111254382.7A CN202111254382A CN114038924A CN 114038924 A CN114038924 A CN 114038924A CN 202111254382 A CN202111254382 A CN 202111254382A CN 114038924 A CN114038924 A CN 114038924A
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rie
plasma etching
silicon substrate
solar cell
texturing
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欧文凯
李含朋
向亮睿
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Pule New Energy Technology Xuzhou Co ltd
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Pule New Energy Technology Xuzhou Co ltd
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    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0745Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer or HIT® solar cells; solar cells
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441Electrode arrangements specially adapted for back-contact solar cells
    • HELECTRICITY
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441Electrode arrangements specially adapted for back-contact solar cells
    • H01L31/022458Electrode arrangements specially adapted for back-contact solar cells for emitter wrap-through [EWT] type solar cells, e.g. interdigitated emitter-base back-contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0236Special surface textures
    • H01L31/02363Special surface textures of the semiconductor body itself, e.g. textured active layers
    • HELECTRICITY
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention relates to a back contact heterojunction solar cell based on RIE (reactive ion etching) texturing, which comprises a crystalline silicon substrate, wherein the front surface of the crystalline silicon substrate comprises at least one passivation layer, and the front surface forms an ultralow-reflectivity surface by an RIE plasma etching method; the back surface of the crystalline silicon substrate comprises a tunneling oxide layer, n + doped amorphous silicon layers/p + doped amorphous silicon layers which are arranged alternately, a laser grooving region, a passivation layer and a metal electrode from inside to outside. The invention has the advantages that: the growth mode of doped amorphous silicon is optimized, the optical absorption of the high-efficiency cell is further improved, the passivation capability of the cell is improved, and the method is suitable for forming a doped amorphous silicon passivation layer and manufacturing a front surface light absorption layer in an interdigital back contact heterojunction solar cell (HBC).

Description

Back contact heterojunction solar cell based on RIE plasma etching texturing
Technical Field
The invention relates to the technical field of solar cells, in particular to a back contact heterojunction solar cell based on RIE (reactive ion etching) texturing.
Background
In recent years, the energy crisis and environmental pressure have promoted the rapid development of solar cell research and industry. Currently, crystalline silicon solar cells are the most mature and widely used solar cells in technology, have a percentage in the photovoltaic market of over 90%, and will dominate for a considerable time in the future. In the photovoltaic industry developing at a high speed, the improvement of the photoelectric conversion efficiency and the reduction of the manufacturing cost of the cell become the root of the whole photovoltaic industry, and with the continuous progress of the photovoltaic cell technology, more and more efficient solar cells enter the field of vision of people.
The photovoltaic leaders plan to continue to promote the progress of the photovoltaic technology in China, and the high-efficiency crystalline silicon technology becomes a development direction. Cost reduction and efficiency improvement are always the constant subjects of the photovoltaic industry, with the continuous technical progress and policy promotion of the industry, the attention of the public is gradually shifted to the electricity consumption cost, and the high-efficiency battery is attracted attention.
The HBC battery has high short-circuit current of the IBC battery and high open-circuit voltage of the HJT battery, the conversion efficiency of a laboratory reaches 26.63%, and the development potential of the HBC battery is proved. The front surface of the HBC battery structure is free of metal electrodes, the P, N layers on the back are orderly and regularly staggered, the series resistance Rs is greatly reduced, the metal electrodes which are in contact with P, N layers at intervals can form good ohmic contact, and short-circuit current is increased. In addition, the excellent intrinsic passivation layer can obtain a high open circuit voltage.
Disclosure of Invention
The invention aims to provide a back contact heterojunction solar cell based on RIE (reactive ion etching) texturing, so as to solve the problems in the background technology.
In order to solve the technical problems, the technical scheme provided by the invention is as follows: a back contact heterojunction solar cell based on RIE (reactive ion etching) texturing comprises a crystalline silicon substrate, wherein the front surface of the crystalline silicon substrate comprises at least one passivation layer, and the front surface forms an ultra-low reflectivity surface through an RIE (reactive ion etching) method; the back surface of the crystalline silicon substrate comprises a tunneling oxide layer, n + doped amorphous silicon layers/p + doped amorphous silicon layers which are arranged alternately, a laser grooving region, a passivation layer and a metal electrode from inside to outside.
Preferably, the crystalline silicon substrate is either an N-type monocrystalline silicon substrate or a P-type monocrystalline silicon substrate.
As a preferred scheme, the front surface of the crystalline silicon substrate is a texturing surface, and a RIE plasma etching method is adopted for texturing;
the process of preparing the needed suede by adopting the RIE plasma etching method comprises the following steps:
1) placing a silicon wafer in a carrying carrier for plasma etching, and sending the silicon wafer into a cavity of plasma etching equipment;
2) vacuumizing the device, maintaining the vacuum degree of the device at 100-2And 100-2Carrying out plasma etching for 1-100 min;
3) after the etching is finished, the reaction gas is closed, the equipment is vacuumized to be below 100mtorr, the equipment is kept for 1-5min, and then 1-10SLM N is introduced2So that the equipment reaches the normal pressure state;
4) and finishing the etching process and taking out the silicon wafer.
Preferably, the back surface of the crystalline silicon substrate is either an acid polished surface or an alkali polished surface.
As a preferable scheme, the passivation layer arranged on the front surface of the crystalline silicon substrate is SiO2、AlOx、SiNx、SiONxOne or a combination of several of them.
Preferably, the tunnel oxide layer on the back surface of the crystalline silicon substrate is formed by any one of atmospheric thermal oxidation and LPCVD thermal oxidation.
Preferably, the n + doped amorphous silicon layer/p + doped amorphous silicon layer arranged alternately is implemented by LPCVD doping technology, wherein the B doping utilizes BCl3Gaseous doping source implementation。
As a preferred scheme, the n + doped amorphous silicon layer and the p + doped amorphous silicon layer are alternately realized by adopting the mask and laser grooving technologies respectively.
Preferably, the passivation layer on the back surface of the crystalline silicon substrate is one or a combination of SiNx and SiONx.
As a preferable scheme, the metal electrode is silver paste.
The invention has the advantages that:
1) the solar cell adopts a cell structure combining a back contact mode and a heterojunction mode, optimizes a doped amorphous silicon growth mode, improves the passivation capacity and the contact capacity of the solar cell under the characteristic of reserving IBC high short-circuit current, and simultaneously effectively reduces the manufacturing cost. The verification proves that the efficiency of the mass production HBC battery adopting the structure of the invention reaches more than 25.5 percent of conversion efficiency, the open-circuit voltage reaches more than 710mV, and the mass production conversion efficiency is higher than 23.5 percent of the mass production conversion efficiency of the current mainstream heterojunction or TOPCon technology.
2) The low-reflectivity black silicon structure on the front surface is prepared by RIE (reactive ion etching) technology, the optical absorption of the high-efficiency battery is further improved, and the current density reaches 42.5mA/cm2Above, match the multiple passivation structure of front surface simultaneously, further promote battery passivation ability.
3) Compared with the prior art, the high-efficiency doped amorphous silicon technology based on LPCVD for the HBC battery respectively realizes the n + doped amorphous silicon layer and the p + doped amorphous silicon layer by utilizing the LPCVD doping technology and the mask grooving technology, the technology keeps the characteristics of no shielding on the front surface and high short-circuit current of the interdigital back contact battery, simultaneously realizes the passivation contact capability on the back surface, greatly improves the open-circuit voltage of the battery, and the mass production of the HBC battery reaches more than 25.5 percent and the open-circuit voltage of the battery reaches more than 710 mV.
4) Particularly in the process preparation of the doped amorphous silicon layer, the n + doped amorphous silicon layer is prepared by using an LPCVD method in the prior TOPCon technology, meanwhile, the low-temperature p + doped amorphous layer is realized by using a BCl3 gaseous source, the doping concentration is easy to control, the manufacturing cost is reduced more critically, a scheme which can be combined with the prior TOPCon mass production technology is provided, and the rapid technical upgrade of a mass production line can be realized.
5) The invention provides a growth method for a low-cost and high-quality doped amorphous silicon passivation layer, and meanwhile, the RIE plasma etching method is applied, so that the front surface reflectivity is greatly reduced, and the light absorption is improved. The method is particularly suitable for forming a doped amorphous silicon passivation layer and manufacturing a front surface light absorption layer in an interdigital back contact heterojunction solar cell (HBC).
Drawings
Fig. 1 is a cross-sectional view of an HBC cell structure of the present invention.
FIG. 2 is a schematic view of RIE plasma etching texture of the present invention.
FIG. 3 is a schematic view of a prior art wet-laid pile.
Reference numbers in the figures: 1. the laser grooving device comprises a crystalline silicon substrate, 2, a passivation layer, 3, a tunneling oxide layer, 4, an n + doped amorphous silicon layer, 5, a p + doped amorphous silicon layer, 6, a laser grooving region, 7, a passivation layer, 8 and a metal electrode.
Detailed Description
The technical solutions of the present invention are further described in detail below with reference to the accompanying drawings, and it should be noted that the detailed description is only for describing the present invention, and should not be construed as limiting the present invention.
As shown in fig. 1, a back contact heterojunction solar cell based on RIE plasma etching texturing comprises a crystalline silicon substrate 1, in this embodiment, the crystalline silicon substrate 1 is an N-type monocrystalline silicon substrate or a P-type monocrystalline silicon substrate, and the front surface of the crystalline silicon substrate 1 is a monocrystalline solar cell, and the reflectivity of the manufactured textured surface is less than 7%, and is greater than 10% compared with that of a traditional wet etching textured surface, which is significantly reduced, so that better light absorption and optimal short circuit current can be obtained.
The process of preparing the needed suede by the RIE plasma etching method comprises the following steps:
1) and placing the silicon wafer in a load carrier for plasma etching, and sending the silicon wafer into a cavity of the plasma etching equipment.
2) Vacuumizing the equipment, keeping the vacuum degree of the equipment at 100-Introducing 100-1000sccm SF6、100-5000sccm O2And 100-2And carrying out selective etching plasma etching for 1-100 min.
3) After the etching is finished, the reaction gas is closed, the equipment is vacuumized to be below 100mtorr, the equipment is kept for 1-5min, and then 1-10SLM N is introduced2So that the equipment reaches the normal pressure state;
4) and finishing the etching process and taking out the silicon wafer.
After the RIE plasma etching method is adopted, the specific surface area of the surface of the battery can be further increased, the light absorption utilization rate is increased, meanwhile, the reflectivity of the front surface can be greatly reduced due to the micro-nano structure, the light utilization rate is further improved, the front surface of the HBC battery is free of any shielding due to the cooperation of the HBC battery described by the invention, and at the moment, the increased light absorption and utilization rate can achieve a better effect and bring higher battery efficiency.
The back surface of the crystalline silicon substrate adopts a volume ratio of 2: 1: 5 HNO3/HF/H2O prepared acid polished surface or KOH alkali polished surface with mass fraction of 49%, the back surface requires reflectivity of more than 30%, and the O is subjected to 5-10min3The cleaning is carried out to achieve the optimal surface state, reduce the surface recombination possibly brought by pollution and provide better conditions for the subsequent passivation process.
The front surface of the crystalline silicon substrate 1 comprises at least one passivation layer 2; the back surface of the crystalline silicon substrate 1 comprises a tunneling oxide layer 3, n + doped amorphous silicon layers 4 and p + doped amorphous silicon layers 5 which are alternately arranged, a laser grooving region 6, a passivation layer 7 and a metal electrode 8 from inside to outside.
The passivation layer on the front surface of the crystalline silicon substrate 1 is one or a combination of several of SiO2, Al2O3, Si3N4 and SiON, and the passivation film can selectively utilize a non-spin plating technology to reduce the back-side spin plating influence. The preparation of the passivation film may be achieved using a horizontal PECVD apparatus.
The tunneling oxide layer on the back surface of the crystalline silicon substrate 1 is prepared by any one of normal-pressure thermal oxidation and LPCVD thermal oxidation, and a good carrier tunneling effect can be obtained when the thickness of the oxide layer is 1-3 nm.
The n + doped amorphous silicon layer and the p + doped amorphous silicon layer can be realized by an LPCVD doping technology, wherein B doping is realized by a BCl3 gaseous doping source, and the n + doped amorphous silicon layer and the p + doped amorphous silicon layer are alternately realized by mask and laser grooving technologies respectively.
In the embodiment of the invention, the passivation layer on the back surface of the crystalline silicon substrate adopts one or two combinations of Si3N4 and SiON, and is different from the front surface, and an Al2O3 passivation film is not needed to be used, because the Al2O3 film carries negative charges to form an inversion on the back surface of the N-type cell, which is not beneficial to the transmission of carriers.
In the embodiment of the invention, the metal electrode is silver paste.
The HBC battery prepared by the invention keeps the characteristics of no shielding on the front surface and high short-circuit current of the interdigital back contact battery, and meanwhile, the passivation contact capability is realized on the back surface, and the open-circuit voltage of the battery is greatly improved. After the front surface adopts the RIE plasma etching method, the specific surface area of the surface of the battery can be further increased, the light absorption utilization is increased, and the current density of the battery is greatly improved. The electrical performance of the prepared HBC battery is tested by using a standard solar battery testing method, the efficiency of the mass-produced HBC battery reaches over 25.5 percent, the open-circuit voltage of the battery reaches over 710mV, and the current density reaches 42.5mA/cm2The above.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.

Claims (10)

1. A back contact heterojunction solar cell based on RIE (reactive ion etching) texturing is characterized by comprising a crystalline silicon substrate, wherein the front surface of the crystalline silicon substrate comprises at least one passivation layer, and the front surface forms an ultra-low reflectivity surface through an RIE (reactive ion etching) method; the back surface of the crystalline silicon substrate comprises a tunneling oxide layer, n + doped amorphous silicon layers/p + doped amorphous silicon layers which are arranged alternately, a laser grooving region, a passivation layer and a metal electrode from inside to outside.
2. The RIE (reactive ion etching) plasma etching texturing-based back contact heterojunction solar cell as claimed in claim 1, wherein the crystalline silicon substrate is any one of an N-type monocrystalline silicon substrate or a P-type monocrystalline silicon substrate.
3. The back contact heterojunction solar cell based on RIE (reactive ion etching) texturing according to claim 1, wherein the front surface of the crystalline silicon substrate is a texturing surface, and the texturing is performed by adopting an RIE plasma etching method;
the process of preparing the needed suede by adopting the RIE plasma etching method comprises the following steps:
1) placing a silicon wafer in a carrying carrier for plasma etching, and sending the silicon wafer into a cavity of plasma etching equipment;
2) vacuumizing the device, maintaining the vacuum degree of the device at 100-2And 100-2Carrying out plasma etching for 1-100 min;
3) after the etching is finished, the reaction gas is closed, the equipment is vacuumized to be below 100mtorr, the equipment is kept for 1-5min, and then 1-10SLM N is introduced2So that the equipment reaches the normal pressure state;
4) and finishing the etching process and taking out the silicon wafer.
4. The RIE plasma etching texturing-based back contact heterojunction solar cell of claim 1, wherein the back surface of the crystalline silicon substrate is any one of an acid polished surface or an alkali polished surface.
5. The RIE (reactive ion etching) plasma etching texturing-based back contact heterojunction solar cell as claimed in claim 1, wherein the passivation layer arranged on the front surface of the crystalline silicon substrate is SiO2、AlOx、SiNx、SiONxOne ofOne or a combination of several.
6. The RIE (reactive ion etching) plasma etching texturing-based back contact heterojunction solar cell as claimed in claim 1, wherein the tunneling oxide layer on the back surface of the crystalline silicon substrate is prepared by any one of atmospheric pressure thermal oxidation and LPCVD thermal oxidation.
7. The RIE (reactive ion etching) plasma etching texturing-based back contact heterojunction solar cell as claimed in claim 1, wherein the n + doped amorphous silicon layer/p + doped amorphous silicon layer arranged alternately is implemented by LPCVD (low pressure chemical vapor deposition) doping technology, wherein B doping is implemented by BCl (bulk carbon chemical vapor deposition)3A gaseous doping source.
8. The back contact heterojunction solar cell based on RIE plasma etching texturing as claimed in claim 1, wherein the n + doped amorphous silicon layer and the p + doped amorphous silicon layer are alternately implemented by using mask and laser grooving technologies, respectively.
9. The RIE (reactive ion etching) plasma etching texturing-based back contact heterojunction solar cell of claim 1, wherein the passivation layer on the back surface of the crystalline silicon substrate is one or a combination of SiNx and SiONx.
10. The RIE plasma etching texturing-based back contact heterojunction solar cell of claim 1, wherein the metal electrode is silver paste.
CN202111254382.7A 2021-10-27 2021-10-27 Back contact heterojunction solar cell based on RIE plasma etching texturing Withdrawn CN114038924A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114883443A (en) * 2022-03-28 2022-08-09 普乐新能源科技(徐州)有限公司 Poly-Si plating removal method and application in TopCon battery preparation

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114883443A (en) * 2022-03-28 2022-08-09 普乐新能源科技(徐州)有限公司 Poly-Si plating removal method and application in TopCon battery preparation

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Application publication date: 20220211