CN114038393B - Pixel circuit and display panel - Google Patents

Pixel circuit and display panel Download PDF

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Publication number
CN114038393B
CN114038393B CN202110808107.9A CN202110808107A CN114038393B CN 114038393 B CN114038393 B CN 114038393B CN 202110808107 A CN202110808107 A CN 202110808107A CN 114038393 B CN114038393 B CN 114038393B
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effect transistor
field effect
scanning
pixel circuit
signal
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CN114038393A (en
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孙佳
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Chongqing Kangjia Photoelectric Technology Research Institute Co Ltd
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Chongqing Kangjia Photoelectric Technology Research Institute Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

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  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

The invention relates to a pixel circuit and a display panel.A third field effect transistor and a corresponding second scanning line are additionally arranged at the cathode of an LED chip, and a first scanning signal of a first scanning line for controlling the LED chip is compensated by a second scanning signal corresponding to the second scanning line, so that the adjustment of the working voltage and the working current of the LED chip is realized, the problem of uneven display of the LED display panel can be solved, and the display effect is improved.

Description

Pixel circuit and display panel
Technical Field
The invention relates to the field of light emitting diode display, in particular to a pixel circuit and a display panel.
Background
In the scheme of Micro-LED (Micro-light-emitting diode) or Mini-LED (sub-millimeter light-emitting diode) direct display or application to a backlight module, a pixel circuit of the backlight module usually needs a Scan line and a Data line, the Scan line outputs signals through a side edge, the Data line outputs signals vertically, and the routing thickness of the Scan line and the Data signal on glass is in the micrometer level; in a conventional driving mode, a scan signal and a data signal are output through a driving IC (Integrated Circuit Chip), where the scan signal and the data signal are called as near ends close to the driving IC and far ends far away from the driving IC; although the wiring impedance is small, the impedance of the glass wiring gradually increases along the direction away from the driving IC, and when the scanning line reaches the far end, the waveform of the scanning signal is already deformed, so that the luminance of the panel is lower along with the distance from the driving IC, and the problem of uneven luminance is caused.
Therefore, it is an urgent need to solve the problem of improving the uneven brightness of the display panel in the prior art and improving the display effect of the display panel.
Disclosure of Invention
In view of the above-mentioned deficiencies of the related art, an object of the present invention is to provide a pixel circuit and a display panel, which are used to solve the problems of uneven brightness and poor display effect of the display panel in the prior art.
A pixel circuit, the pixel circuit comprising:
the field-effect transistor comprises a first field-effect transistor, a first control circuit and a second control circuit, wherein a grid electrode of the first field-effect transistor is used for being connected with a first scanning line, and a source electrode of the first field-effect transistor is used for being connected with a data line, wherein the first scanning line is used for inputting a first scanning signal to the grid electrode of the first field-effect transistor so as to control the conduction duration of the grid electrode of the first field-effect transistor, and the data line is used for inputting a data signal to the source electrode of the first field-effect transistor;
a grid electrode of the second field effect transistor is connected with a drain electrode of the first field effect transistor, and a source electrode of the second field effect transistor is connected with a first working voltage;
the drain electrode of the third field effect transistor is connected with a second working voltage, the grid electrode of the third field effect transistor is used for connecting a second scanning line, and the second scanning line is used for inputting a second scanning signal to the grid electrode of the third field effect transistor so as to control the conduction time of the grid electrode of the third field effect transistor;
one end of the capacitor is connected to the grid electrode of the second field effect transistor, and the other end of the capacitor is connected to the first working voltage;
the anode of the LED chip is connected with the drain electrode of the second field effect transistor, and the cathode of the LED chip is connected with the source electrode of the third field effect transistor;
wherein the off duration of the second scan line control is less than the on duration of the first scan line control.
According to the pixel circuit provided by the invention, the third field effect transistor and the corresponding second scanning line are additionally arranged at the cathode of the LED chip, and the first scanning signal for controlling the first scanning line of the LED chip is compensated by the second scanning signal corresponding to the second scanning line, so that the adjustment of the working voltage and the working current of the LED chip is realized, the problem of uneven display of the LED display panel can be solved, and the display effect is improved.
Optionally, the first field effect transistor and the second field effect transistor both include P-type field effect transistors, and the third field effect transistor includes N-type field effect transistors.
Optionally, the first field effect transistor, the second field effect transistor, and the third field effect transistor are all P-type TFTs.
Optionally, the first field effect transistor, the second field effect transistor, and the third field effect transistor are all N-type TFTs.
Optionally, the first field effect transistor, the second field effect transistor and the third field effect transistor are all low-temperature polysilicon thin film transistors, oxide semiconductor thin film transistors or amorphous silicon thin film transistors.
Based on the same inventive concept, the invention also provides a display panel, wherein the display panel comprises a first scanning unit, a second scanning unit, a data unit and a plurality of pixel circuits;
each pixel circuit array is arranged on the display panel;
the first scanning line of each pixel circuit receives the first scanning signal output by the first scanning unit;
the second scanning line of each pixel circuit receives the second scanning signal output by the second scanning unit;
the data line receives the data signal output by the data unit.
According to the display panel provided by the invention, the third field effect transistor and the corresponding second scanning line are additionally arranged at the cathode of the LED chip, and the first scanning signal of the first scanning line for controlling the LED chip is compensated by the second scanning signal corresponding to the second scanning line, so that the adjustment of the working voltage and the working current of the LED chip is realized, the problem of uneven display of the LED display panel can be solved, and the display effect is improved.
Optionally, in a plurality of pixel circuits located in the same row, the off duration controlled by the second scan signal of each pixel circuit gradually decreases along a direction away from the first scan unit.
Optionally, in a plurality of pixel circuits located in the same row, the off duration controlled by the second scan signal of each pixel circuit is equal to 1/N of the on duration controlled by the first scan signal, where the value of N gradually increases in a direction away from the first scan unit.
Optionally, in a plurality of pixel circuits located in the same column, the off duration controlled by the second scan signal of each pixel circuit gradually decreases along a direction away from the data unit.
Optionally, in a plurality of pixel circuits located in the same row, the off duration controlled by the second scan signal of each pixel circuit gradually decreases along a direction away from the first scan unit; and the number of the first and second groups,
in a plurality of pixel circuits located in the same column, the off-time controlled by the second scan signal of each pixel circuit gradually decreases along a direction away from the data unit.
Drawings
Fig. 1 is a schematic diagram of a pixel circuit structure according to an embodiment of the invention;
FIG. 2 is a timing diagram of signals provided by an embodiment of the present invention;
FIG. 3 is a schematic diagram of a display panel according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of signal timing and power supply provided by an embodiment of the present invention;
description of reference numerals:
1-a pixel circuit; 2-a first scanning unit; 3-a second scanning unit; 4-data unit; m1-a first field effect transistor; m2-a second field effect transistor; m3-a third field effect transistor; c-capacitance; LED-light emitting diodes; ELVDD — drive voltage; ELVSS-low level supply voltage.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
For micro LED or mini LED direct display, or for backlight module, its pixel circuit usually needs scanning line and data line, respectively receiving the scanning signal and data signal output by the driving IC to the pixel circuit corresponding to the LED chip, the scanning line outputting the scanning signal through the side, the data line outputting the data signal vertically, the scanning signal and data signal acting on the corresponding electrode of each field effect transistor in the pixel circuit; in a traditional driving mode, a scanning signal and a data signal are output through a driving IC, the scanning signal and the data signal are called near ends close to the driving IC, and far ends far away from the driving IC; although the impedance of the glass trace is small, the impedance of the glass trace gradually increases along the direction away from the driving IC, and when the scanning line reaches the far end, the waveform of the scanning signal is already deformed, so that the brightness of the panel is lower along with the distance away from the driving IC, and the problem of uneven brightness occurs. Based on this, the present application intends to provide a solution to the above technical problem, the details of which will be explained in the following embodiments.
The embodiment of the invention provides a pixel circuit, which is characterized in that a third field effect transistor and a corresponding second scanning line are additionally arranged at a cathode of an LED chip, and a first scanning signal of a first scanning line for controlling the LED chip is compensated by a second scanning signal corresponding to the second scanning line, so that the adjustment of working voltage and working current of the LED chip is realized, the problem of uneven display of an LED display panel can be solved, and the display effect is improved. Referring to fig. 1, a pixel circuit according to an embodiment of the invention includes:
the field-effect transistor comprises a first field-effect transistor M1, wherein a grid electrode of the first field-effect transistor M1 is used for being connected with a first scanning line, and a source electrode of the first field-effect transistor M1 is used for being connected with a data line, wherein the first scanning line is used for inputting a first scanning signal to the grid electrode of the first field-effect transistor M1 so as to control the conduction duration of the grid electrode of the first field-effect transistor M1, and the data line is used for inputting a data signal to the source electrode of the first field-effect transistor M1;
a grid electrode of the second field effect tube M2 is connected with a drain electrode of the first field effect tube M1, and a source electrode of the second field effect tube M2 is connected with a first working voltage;
a drain electrode of the third field effect transistor M3 is connected to a second working voltage, and a gate electrode of the third field effect transistor M3 is used for connecting a second scanning line, wherein the second scanning line is used for inputting a second scanning signal to the gate electrode of the third field effect transistor M3 so as to control the conduction duration of the gate electrode of the third field effect transistor M3;
one end of the capacitor C is connected to the grid electrode of the second field effect transistor M2, and the other end of the capacitor C is connected to the first working voltage;
the anode of the LED chip is connected with the drain electrode of the second field-effect tube M2, and the cathode of the LED chip is connected with the source electrode of the third field-effect tube M3;
the turn-off duration of the second scanning line control is less than the turn-on duration of the first scanning line control.
The pixel circuit in the embodiment of the invention comprises an LED chip circuit, a first scanning circuit, a second scanning circuit and a data circuit; wherein, each circuit is surrounded the LED chip circuit to constitute.
Specifically, the first scanning circuit and the data circuit are both arranged on the anode side of the LED chip circuit, and comprise two field effect transistors and a capacitor C; the two field effect transistors are respectively a first field effect transistor M1 and a second field effect transistor M2, the grid electrode of the first field effect transistor M1 is connected to the first scanning line, the source electrode of the first field effect transistor M1 is connected to the data line, and the drain electrode of the first field effect transistor M1 is connected to the grid electrode of the second field effect transistor M2; that is to say, the gate of the first field effect transistor M1 is used as an input terminal of the first scan signal, and the first scan signal can control the on-time of the gate of the first field effect transistor M1; the source of the first fet M1 serves as an input terminal for the data signal, and the drain of the first fet M1 serves as an input terminal for the gate of the second fet M2. The source electrode of the second field effect transistor M2 is connected to the first working voltage to receive power supply of the second working voltage, and the drain electrode of the second field effect transistor M2 is connected to the anode of the LED chip to supply power to the anode of the LED chip. The two poles of the capacitor C are respectively connected between the gate of the second field effect transistor M2 and the first operating voltage.
The second scanning circuit is arranged to realize power supply compensation and reduce the influence of uneven brightness of the display panel; the second scanning circuit comprises a field effect transistor, namely a third field effect transistor M3, and the source electrode of the third field effect transistor M3 is connected to the cathode of the LED chip to supply power to the cathode of the LED chip; the grid electrode of the third field effect transistor M3 is connected to the second scanning line, that is, the grid electrode of the third field effect transistor M3 is used as the input end of the second scanning signal; the drain electrode of the third field effect transistor M3 is connected with a second working voltage.
The second scanning circuit is arranged, which is equivalent to that one scanning line, namely the second scanning line, is added in the pixel circuit in the reverse direction, and the second scanning line can compensate the original scanning line, namely the first scanning line, from the reverse direction and compensate the first scanning signal accessed by the first scanning line, so that the display uniformity of the display panel is improved.
In some embodiments, the first operating voltage may include a driving voltage ELVDD, and the second operating voltage may include a low-level power supply voltage ELVSS. The first working voltage is connected to the source electrode of the second field effect transistor M2, and the second field effect transistor M2 is arranged on the anode side of the LED chip, because the electric potential on the anode side of the LED chip is higher than the electric potential on the cathode side of the LED chip, the first working voltage connected to the source electrode of the second field effect transistor M2 is the driving voltage ELVDD, and belongs to a high-level voltage source; the drain of the third field effect transistor M3 is connected to the second operating voltage, and the third field effect transistor M3 is disposed on the cathode side of the LED chip, and since the potential of the cathode side of the LED chip is lower than the potential of the anode side of the LED chip, the drain of the third field effect transistor M3 is connected to the low-level power supply voltage ELVSS, and belongs to the low-level voltage source.
In some embodiments, the first fet M1 and the second fet M2 each comprise a P-type fet and the third fet M3 comprises an N-type fet. The first field effect transistor M1 and the second field effect transistor M2 are both P-type field effect transistors, and the conduction characteristic of the P-type field effect transistor (PMOS transistor) is that the P-type field effect transistor is conducted when the grid is at a low level and is disconnected when the grid is at a high level; the third field effect transistor M3 is an N-type field effect transistor, and the on characteristic of the N-type field effect transistor (NMOS transistor) is on when the gate is at a high level and off when the gate is at a low level.
In some embodiments, the driving level of the first scan signal is opposite to the driving level of the second scan signal. Referring to fig. 2, fig. 2 shows a timing chart of driving levels of the first scan signal and the second scan signal, respectively.
In some embodiments, the off duration of the second scan line control is less than the on duration of the first scan line control; that is, the effective time period corresponding to the drive level of the second scan signal is shorter than the effective time period of the drive level of the first scan signal. Since the second scan signal is only used for compensation of the first scan signal, the effective duration of the driving level of the compensated first scan signal is not exceeded as the compensated second scan signal, please refer to fig. 2. Specifically, the maximum value of the effective duration of the driving level of the second scanning signal is smaller than that of the first scanning signal, and the minimum value is zero.
In some embodiments, the first field effect transistor M1, the second field effect transistor M2, and the third field effect transistor M3 may all be P-type TFTs. Among them, a TFT (Thin Film Transistor) represents a Thin Film field effect Transistor.
In some embodiments, the first field effect transistor M1, the second field effect transistor M2, and the third field effect transistor M3 may also be all N-type TFTs.
In some embodiments, the first field effect transistor M1, the second field effect transistor M2, and the third field effect transistor M3 may be all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
According to the pixel circuit provided by the embodiment of the invention, the third field effect transistor M3 and the corresponding second scanning line are additionally arranged at the cathode of the LED chip, and the first scanning signal for controlling the first scanning line of the LED chip is compensated by the second scanning signal corresponding to the second scanning line, so that the adjustment of the working voltage and the working current of the LED chip is realized, the problem of uneven display of the LED display panel can be solved, and the display effect is improved.
Another optional embodiment of the present invention provides a display panel, where a third field effect transistor M3 and a corresponding second scan line are additionally disposed at a cathode of an LED chip, and a first scan signal of a first scan line controlling the LED chip is compensated by a second scan signal corresponding to the second scan line, so as to adjust a working voltage and a working current of the LED chip, improve a display non-uniformity problem of the LED display panel, and improve a display effect. Referring to fig. 3, the display panel includes:
a first scanning unit 2, a second scanning unit 3, a data unit 4 and a plurality of pixel circuits 1 in the above embodiments;
wherein, each pixel circuit 1 is arranged on the display panel in an array;
the first scanning line of each pixel circuit 1 receives the first scanning signal output by the first scanning unit 2;
the second scanning line of each pixel circuit 1 receives the second scanning signal output by the second scanning unit 3;
the data line receives the data signal output by the data unit 4.
The pixel circuit 1 in the embodiment of the present invention includes four major parts, namely, an LED chip circuit, a first scanning circuit, a second scanning circuit, and a data circuit; wherein, each circuit is surrounded the LED chip circuit to constitute.
Specifically, the first scanning circuit and the data circuit are both arranged on the anode side of the LED chip circuit, and comprise two field effect transistors and a capacitor C; the two field effect transistors are respectively a first field effect transistor M1 and a second field effect transistor M2, the grid electrode of the first field effect transistor M1 is connected to the first scanning line, the source electrode of the first field effect transistor M1 is connected to the data line, and the drain electrode of the first field effect transistor M1 is connected to the grid electrode of the second field effect transistor M2; that is, the gate of the first fet M1 serves as an input terminal for the first scan signal, the source of the first fet M1 serves as an input terminal for the data signal, and the drain of the first fet M1 serves as an input terminal for the gate of the second fet M2. The source electrode of the second field effect transistor M2 is connected to the first working voltage to receive power supply of the second working voltage, and the drain electrode of the second field effect transistor M2 is connected to the anode of the LED chip to supply power to the anode of the LED chip. Two poles of the capacitor C are respectively connected between the gate of the second field effect transistor M2 and the first working voltage.
The second scanning circuit is arranged to realize power supply compensation and reduce the influence of uneven brightness of the display panel; the second scanning circuit comprises a field effect transistor, namely a third field effect transistor M3, and the source electrode of the third field effect transistor M3 is connected to the cathode of the LED chip to supply power to the cathode of the LED chip; the grid electrode of the third field effect transistor M3 is connected to the second scanning line, that is, the grid electrode of the third field effect transistor M3 is used as the input end of the second scanning signal; the drain electrode of the third field effect transistor M3 is connected with a second working voltage.
Due to the arrangement of the second scanning circuit, which is equivalent to that one scanning line, namely the second scanning line, is added in the pixel circuit 1 in the reverse direction, the second scanning line can compensate the original scanning line, namely the first scanning line, from the reverse direction, and compensate the first scanning signal accessed by the first scanning line, so that the display uniformity of the display panel is improved.
In the display panel, the first scanning unit 2 is used for outputting a first scanning signal, the second scanning unit 3 is used for outputting a second scanning signal, and the data unit 4 is used for outputting a data signal, wherein the first scanning unit 2 and the data unit 4 are generally integrated on the same driving IC, and the second scanning unit 3 is externally arranged on other driving ICs or can be integrated on the same driving IC.
The waveform delay of the first scanning signal output by the first scanning unit 2 is gradually increased along with the distance of the corresponding pixel circuit 1 from the first scanning unit 2; that is, the pixel circuit 1 close to the first scanning unit 2, which also receives the first scanning signal output by the first scanning unit 2, has a small or no time delay corresponding to the waveform of the first scanning signal; the waveform delay of the pixel circuit 1 far from the first scanning unit 2 corresponding to the first scanning signal is larger and larger. To improve this problem, the second scan cell 3 is provided to input the second scan signal from the reverse direction to compensate the time delay along the trace direction.
Specifically, in some embodiments, in order to implement the delay compensation, in a plurality of pixel circuits 1 located in the same row, the off duration controlled by the second scan signal of each pixel circuit 1 is gradually reduced in a direction away from the first scan unit 2. The first scanning unit 2 outputs the first scanning signals to the pixel circuits 1 on the same scanning line, the levels of the output time are consistent, and the driving level delay of the first scanning signals is gradually increased along with the distance from the first scanning unit 2; the driving level of the second scanning signal is reverse driving, namely the controlled turn-off of the second scanning signal is used as the driving level, and the turn-off duration of the second scanning signal is used as the effective duration of the driving level; the larger the off duration controlled by the second scanning signal is, the larger the influence on the driving level of the first scanning signal is; the driving level of the second scan signal is in an opposite direction compared to the driving level of the first scan signal, and thus the influence of the second scan signal on the first scan signal is to cancel the duration of the driving level of the first scan signal. The turn-off duration controlled by the second scanning signal is set to be gradually reduced along the direction far away from the first scanning unit 2, so that the compensation value received by the pixel circuit 1 close to the first scanning unit 2 is large, and the compensation value received by the pixel circuit 1 far away from the first scanning unit 2 is small, and further, the brightness of the LED chips in the pixel circuits 1 at the near end and the far end are consistent, and the display uniformity of the display panel is improved in the extending direction of the scanning lines.
In some embodiments, the off-duration controlled by the second scan signal, the magnitude of which gradually decreases in a direction away from the first scan unit 2, matches the display resolution of the display panel. Specifically, the larger the resolution of the display panel is, the smaller the difference between the pixels is, that is, the smaller the difference between the adjacent LED chips is, the smaller the off duration controlled by the second scan signal is, and the reduction amplitude decreases with the increase of the resolution.
In some embodiments, in the plurality of pixel circuits 1 in the same row, the off duration controlled by the second scan signal of each pixel circuit 1 is equal to 1/N of the on duration controlled by the first scan signal, wherein the value of N gradually increases in a direction away from the first scan unit 2. The specific value of N may be 2, 4, 8, 12, 16, and so on, that is, the off duration controlled by the second scan signal may be an on duration controlled by the first scan signal of 1/2, 1/4, 1/8, 1/12, 1/16, and so on, which is not limited in the embodiment of the present invention.
In addition, in some embodiments, in order to implement the delay compensation, in each pixel circuit 1 located in the same column, the off-time period controlled by the second scan signal of each pixel circuit 1 is gradually reduced in a direction away from the data unit 4. Similar to the first scanning signal output by the first scanning unit 2, the data signals output by the data unit 4 to the pixel circuits 1 on the same data line have the same level at the output time, and the time delay of the driving level of the data signal gradually increases as the data unit 4 is far away; the larger the turn-off duration controlled by the second scanning signal is, the larger the influence on the driving level of the data signal is; the driving level of the second scan signal is opposite to the driving level of the data signal, so the influence of the second scan signal on the data signal is to cancel the on-time controlled by the data signal. The turn-off duration controlled by the second scanning signal is set to be gradually reduced along the direction far away from the data unit 4, so that the compensation value received by the pixel circuit 1 close to the data unit 4 is small, and the compensation value received by the pixel circuit 1 far away from the data unit 4 is large, and further the brightness of the LED chips in the pixel circuits 1 at the near end and the far end is converged, and the display uniformity of the display panel is improved in the extending direction of the data line.
In some embodiments, in the plurality of pixel circuits 1 located in the same row and the plurality of pixel circuits 1 located in the same column, each pixel circuit 1 may determine the turn-off duration controlled by the corresponding second scan signal according to the distribution position; specifically, in a plurality of pixel circuits located on the same row, the off-duration controlled by the second scanning signal of each pixel circuit is gradually reduced in a direction away from the first scanning unit 2; and the number of the first and second groups,
in the plurality of pixel circuits in the same column, the off-time period controlled by the second scan signal of each pixel circuit is gradually reduced in a direction away from the data unit 4. In other words, in the whole display panel, the turn-off duration controlled by the corresponding second scan signal is longer for the pixel circuits close to the first scan unit 2 and the data unit 4 at the same time; while the turn-off duration controlled by the corresponding second scan signal is smaller for the pixel circuits far away from the first scan unit 2 and the data unit 4.
Referring to fig. 4, fig. 4 is a graph showing the timing effect of the first scan signal, the second scan signal, and the data signal on the operating voltage and the operating current of the LED chip, wherein:
v in the figure Scan(n) Represents the timing sequence corresponding to the first scanning signal, and wherein the solid line represents the actual timing sequence of the pixel circuit 1 far from the first scanning unit 2, and the dotted line represents the actual timing sequence of the pixel circuit 1 near the first scanning unit 2;
v in the figure Scan(m) Representing the corresponding time sequence of the second scanning signal;
v in the figure D Represents the corresponding timing of the data signal, and wherein the solid line represents the actual timing of the pixel circuit 1 far away from the data unit 4, and the dashed line portion represents the actual timing of the pixel circuit 1 near the data unit 4;
v in the figure LED Representing the operating voltage of the LED chip; and wherein the solid line represents the operating voltage of the LED chip in the pixel circuit 1 far from the first scanning unit 2/data unit 4, and the dotted line represents the operating voltage of the LED chip in the pixel circuit 1 near the first scanning unit 2/data unit 4;
i in the figure LED Representing the operating current of the LED chip; and wherein the solid line represents the operating current of the LED chip in the pixel circuit 1 far from the first scanning unit 2/data unit 4, and the dotted line represents the operating current of the LED chip in the pixel circuit 1 near the first scanning unit 2/data unit 4;
since the waveform delay of the first scan signal close to the first scan cell 2 and the data signal close to the data cell 4 is small, and the waveform delay of the first scan signal far from the first scan cell 2 and the waveform delay of the data signal far from the data cell 4 is large, the accumulated luminance of the LED chips in the pixel circuit 1 close to the first scan cell 2 and the data cell 4 and the accumulated luminance of the LED chips in the pixel circuit 1 far from the first scan cell 2 and the data cell 4 have a large difference, and finally appear as luminance unevenness at the near and far ends of the display panel group. After the compensation of the second scanning signal, the display brightness unevenness is effectively improved.
It will be understood that the invention is not limited to the examples described above, but that modifications and variations will occur to those skilled in the art in light of the above teachings, and that all such modifications and variations are considered to be within the scope of the invention as defined by the appended claims.

Claims (10)

1. A pixel circuit, wherein the pixel circuit comprises:
the field-effect transistor comprises a first field-effect transistor, a first control circuit and a second control circuit, wherein a grid electrode of the first field-effect transistor is used for being connected with a first scanning line, and a source electrode of the first field-effect transistor is used for being connected with a data line, wherein the first scanning line is used for inputting a first scanning signal to the grid electrode of the first field-effect transistor so as to control the conduction duration of the grid electrode of the first field-effect transistor, and the data line is used for inputting a data signal to the source electrode of the first field-effect transistor;
a grid electrode of the second field effect transistor is connected with a drain electrode of the first field effect transistor, and a source electrode of the second field effect transistor is connected with a first working voltage;
a drain electrode of the third field effect transistor is connected with a second working voltage, a grid electrode of the third field effect transistor is used for being connected with a second scanning line, and the second scanning line is used for inputting a second scanning signal to the grid electrode of the third field effect transistor so as to control the conduction duration of the grid electrode of the third field effect transistor;
one end of the capacitor is connected to the grid electrode of the second field effect transistor, and the other end of the capacitor is connected to the first working voltage;
the anode of the LED chip is connected with the drain electrode of the second field effect transistor, and the cathode of the LED chip is connected with the source electrode of the third field effect transistor;
the turn-off duration of the second scanning line control is less than the turn-on duration of the first scanning line control, the second scanning line control is positioned in the pixel circuits in the same row, and the turn-off duration of the second scanning signal control is gradually reduced along the direction far away from the first scanning unit.
2. The pixel circuit according to claim 1, wherein the first and second fets each comprise a P-fet and the third fet comprises an N-fet.
3. The pixel circuit according to claim 1, wherein the first field effect transistor, the second field effect transistor, and the third field effect transistor are all P-type TFTs.
4. The pixel circuit according to claim 1, wherein the first field effect transistor, the second field effect transistor, and the third field effect transistor are N-type TFTs.
5. The pixel circuit according to claim 1, wherein the first field effect transistor, the second field effect transistor, and the third field effect transistor are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
6. A display panel comprising a first scanning unit, a second scanning unit, a data unit, and a plurality of pixel circuits according to any one of claims 1 to 5;
each pixel circuit array is arranged on the display panel;
the first scanning line of each pixel circuit receives the first scanning signal output by the first scanning unit;
the second scanning line of each pixel circuit receives the second scanning signal output by the second scanning unit;
the data line receives the data signal output by the data unit.
7. The display panel according to claim 6, wherein in the plurality of pixel circuits in the same row, the off period controlled by the second scan signal of each of the pixel circuits is gradually decreased in a direction away from the first scan unit.
8. The display panel according to claim 7, wherein in the plurality of pixel circuits located in the same row, the off-duration of the second scan signal control of each of the pixel circuits is equal to 1/N of the on-duration of the first scan signal control, wherein the value of N gradually increases in a direction away from the first scan cell.
9. The display panel according to claim 6, wherein in the plurality of pixel circuits in the same column, the off-period controlled by the second scan signal of each of the pixel circuits is gradually decreased in a direction away from the data unit.
10. The display panel according to claim 6, wherein in a plurality of pixel circuits located in the same row, the off period controlled by the second scan signal of each of the pixel circuits is gradually decreased in a direction away from the first scan unit; and the number of the first and second groups,
in a plurality of pixel circuits located in the same column, the off-duration controlled by the second scan signal of each pixel circuit gradually decreases along a direction away from the data unit.
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