CN111968584A - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN111968584A CN111968584A CN202010782029.5A CN202010782029A CN111968584A CN 111968584 A CN111968584 A CN 111968584A CN 202010782029 A CN202010782029 A CN 202010782029A CN 111968584 A CN111968584 A CN 111968584A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
The application discloses a display panel and a display device, which comprise a pixel circuit, a scanning line, a grid driver, a data line and a data driver; at least two rows of adjacent pixel circuits are synchronously driven by the same scanning line, and longer data writing time can be realized under the condition of equal resolution and gray scale number; similarly, higher resolution and gray scale number can be achieved with the same data writing time.
Description
Technical Field
The application relates to the technical field of display, in particular to the technical field of display driving, and particularly relates to a display panel and a display device.
Background
Currently, the development of the Display industry is changing day by day, the Display application has been integrated into the aspects of people's life, novel Display modes are continuously appearing, the traditional LCD (Liquid Crystal Display) industry is becoming saturated day by day, and the development speed is gradually slowed down. Meanwhile, a new display mode represented by an OLED (organic light-Emitting Diode), a Micro-LED, and a Mini-LED is pursued by the industry and is rapidly developed.
The LED display mode is different from the traditional LCD display mode and is a current drive type device, namely, the light emitting brightness of the LED display mode is controlled by current; the LCD is a voltage-controlled display, and the display is realized by controlling the rotation of liquid crystal molecules by voltage. Unlike voltage driving, current-driven devices become more difficult to control with respect to accuracy and uniformity of current at the time of low current driving; meanwhile, current driving is more difficult than voltage driving due to the uniformity and stability of TFT (Thin Film Transistor) device characteristics.
In order to improve the uniformity of current driving, many researches, such as compensation circuits, are performed by workers in the industry. Among them, the digital driving is also a driving method capable of effectively improving uniformity, which controls the brightness of light by controlling the length of light emitting time, and the TFT and the Light Emitting Device (LED) have only two states, on and off, so that the display uniformity is not reduced due to the difference of the operating states of the devices.
However, the data driving method using the time ratio has an inherent disadvantage in that the higher the resolution of the driving panel, the higher the number of color bits, and the shorter the line scanning time by the light emitting method using the per-subframe control. Currently, the drive capability of LTPS (Low Temperature Poly-Silicon, which is a generic name of Low Temperature Poly-Silicon) TFTs is limited, and the time ratio digital drive method has Low drivable resolution and bit number, which is not favorable for fine display.
Disclosure of Invention
The application provides a display panel, which solves the problems of lower resolution and bit number of a digital driving mode drivable by a time ratio.
In a first aspect, the present application provides a display panel, which includes pixel circuits, scan lines, a gate driver, data lines, and a data driver; the pixel circuits are distributed on the display panel in an array mode and used for providing display signals; the scanning line is connected with the at least two rows of adjacent pixel circuits and used for transmitting scanning signals so as to synchronously drive the at least two rows of adjacent pixel circuits; the grid driver is connected with the scanning lines and used for outputting corresponding scanning signals; the data lines are connected with the pixel circuits in the same column and used for transmitting corresponding data signals so as to write the data signals into the corresponding pixel circuits; and a data driver connected to the data lines for outputting corresponding data signals.
In a first implementation manner of the first aspect, two data lines are correspondingly disposed between the pixel circuits in two adjacent columns.
In a second implementation form of the first aspect as such according to the first aspect, the gate driver is operated in a digital time-ratio driving mode.
In a third implementation form of the first aspect, based on the second implementation form of the first aspect, in a one-frame display period, the pixel circuit is divided into N sub-frame display periods; the ratio of the display periods of two adjacent subframes is 2 or 1/2; wherein N is an integer not less than 1.
In a fourth implementation manner of the first aspect, when N is equal to 8, the time ratio of the N subframe display periods is 1: 2: 4: 8: 16: 32: 64: 128.
in a fifth implementation form of the first aspect, the pixel circuit comprises: the switch unit is connected with the scanning line and the data line and used for writing a data signal according to the scanning signal; the driving unit is connected with the output end of the switch unit and the first power supply signal and is used for generating a driving channel of corresponding current according to the data signal; and the light-emitting unit is connected with the driving unit and the second power supply signal and is used for displaying corresponding gray scales according to the current.
In a sixth implementation form of the first aspect, based on the fifth implementation form of the first aspect, the switching unit comprises a first thin film transistor; the grid electrode of the first thin film transistor is connected with a scanning signal; the input end of the first thin film transistor is connected with a data signal; the output end of the first thin film transistor is connected with the driving unit.
In a seventh implementation form of the first aspect, based on the sixth implementation form of the first aspect, the driving unit comprises a second thin film transistor; the output end of the first thin film transistor is connected with the grid electrode of the second thin film transistor; the first power supply signal is connected with the input end of the second thin film transistor; the output end of the second thin film transistor is connected with the input end of the light-emitting unit.
In an eighth implementation form of the first aspect, based on the seventh implementation form of the first aspect, the light emitting unit comprises an OLED device; the output end of the second thin film transistor is connected with the input end of the OLED device; the output end of the OLED device is connected with a second power supply signal; wherein the potential of the first power supply signal is higher than the potential of the second power supply signal.
In a second aspect, the present application provides a display device including the display panel in any one of the above embodiments.
According to the display panel and the display device, at least two rows of adjacent pixel circuits are synchronously driven through the same scanning line, and longer data writing time can be realized under the condition of equal resolution and gray scale number; similarly, higher resolution and gray scale number can be achieved with the same data writing time.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present application.
Fig. 2 is a circuit schematic diagram of the pixel circuit of fig. 1.
Fig. 3 is a schematic diagram of digital driving of a display panel according to an embodiment of the present disclosure when the display panel operates at a time ratio.
Fig. 4 is a schematic diagram illustrating a comparison of operation timings of the display panel according to the embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
As shown in fig. 1, the present embodiment provides a display panel, which includes a pixel circuit 300, a scan line SL, a gate driver 100, a data line DL, and a data driver 200; pixel circuits 300 arranged in an array on the display panel for displaying; a scan line SL connected to the at least two rows of adjacent pixel circuits 300, for transmitting a scan signal to synchronously drive the at least two rows of adjacent pixel circuits 300; a gate driver 100 connected to the scan lines SL for outputting corresponding scan signals; a data line DL connected to the pixel circuits 300 in the same column for transmitting a corresponding data signal to write the data signal into the corresponding pixel circuit 300; and a data driver 200 connected to the data lines DL for outputting corresponding data signals.
It should be explained that the same scan line SL may also be connected to three, four, five or six adjacent pixel circuits 300, which may further enhance the inventive effect of the present application.
It can be understood that, in the display panel provided by the present application, at least two rows of adjacent pixel circuits 300 are synchronously driven by the same scan line SL, and under the condition of the same resolution and gray scale number, a longer data writing time can be realized; similarly, higher resolution and gray scale number can be achieved with the same data writing time.
As shown in fig. 1, in one embodiment, two data lines DL may be disposed between the pixel circuits 300 of two adjacent columns. It is understood that the pixel circuit 300 at the edge of the display panel only needs to be configured with one data line DL.
In one embodiment, the gate driver 100 may be, but is not limited to, operating in a digital time ratio driving mode.
As shown in fig. 3, in one embodiment, in one frame display period T, the pixel circuit 300 is divided into N sub-frame display periods; the ratio of the display periods of two adjacent subframes is 2 or 1/2; wherein N is an integer not less than 1.
As shown in FIG. 3, in one embodiment, when N is equal to 8, the time ratio of the N sub-frame display periods is 1: 2: 4: 8: 16: 32: 64: 128.
as shown in fig. 2, in one embodiment, the pixel circuit 300 includes: a switching unit 310 connected to the scan line SL and the data line DL, for writing a data signal according to a scan signal; a driving unit 320 connected to the output terminal of the switching unit 310 and the first power signal VDD, and configured to generate a driving channel corresponding to a current according to the data signal; and a light emitting unit 330 connected to the driving unit 320 and the second power signal VSS, for performing display of a corresponding gray scale according to the current.
As shown in fig. 2, in one embodiment, the switching unit 310 includes a first thin film transistor T1; the gate of the first thin film transistor T1 is connected to a scan signal; an input terminal of the first thin film transistor T1 is connected to a data signal; the output terminal of the first thin film transistor T1 is connected to the driving unit 320.
As shown in fig. 2, in one embodiment, the driving unit 320 includes a second thin film transistor T2; the output terminal of the first thin film transistor T1 is connected to the gate electrode of the second thin film transistor T2; the first power signal VDD is connected to the input terminal of the second thin film transistor T2; an output terminal of the second thin film transistor T2 is connected to an input terminal of the light emitting unit 330.
As shown in fig. 3, in one embodiment, the light emitting unit 330 includes an OLED device D1; the output end of the second thin film transistor T2 is connected with the input end of the OLED device D1; the output end of the OLED device D1 is connected with a second power supply signal VSS; wherein, the potential of the first power signal VDD is higher than the potential of the second power signal VSS.
As shown in fig. 4, in the conventional technical solution BE1, in one on period/high potential period of the first Gate signal Gate1, the corresponding pixel circuit 300 can receive only the first period Data signal Data 1; in one on period/high potential period of the second Gate signal Gate2, the corresponding pixel circuit 300 may receive only the second period Data signal Data 2; by analogy, in the next on period/high potential period of the two gate signals, the corresponding pixel circuit 300 can receive only the third period Data signal Data3 and the fourth period Data signal Data4 in a time-sharing manner. In the technical solution BE2 disclosed in the present application, in one on period/high potential period, at least two adjacent rows of pixel circuits 300 can BE simultaneously turned on by one gate signal G1 transmitted from one scan line SL, and the first period Data signal Data1 and the second period Data signal Data2 sequentially transmitted from the corresponding Data line DLDL1 and Data line DLDL2 can BE simultaneously written into the corresponding pixel circuits 300, so that the writing time of the Data signals of the pixel circuits 300 is reduced; by analogy, in one on period/high potential period, the other gate signal G2 transmitted in the other scan line SL can simultaneously write the third period Data signal Data3 and the fourth period Data signal Data4 into the corresponding pixel circuit 300.
In one embodiment, the present application provides a display device including the display panel in any one of the above embodiments.
It can be understood that, in the display device provided by the present application, at least two rows of adjacent pixel circuits 300 are synchronously driven by the same scan line SL, and under the condition of the same resolution and gray scale number, a longer data writing time can be realized; similarly, higher resolution and gray scale number can be achieved with the same data writing time.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The display panel provided by the embodiment of the present application is described in detail above, and a specific example is applied to illustrate the principle and the implementation manner of the present application, and the description of the embodiment is only used to help understanding the technical solution and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A display panel, comprising:
the pixel circuits are distributed on the display panel in an array mode and used for providing display signals;
the scanning line is connected with the pixel circuits adjacent to the at least two rows and is used for transmitting scanning signals so as to synchronously drive the pixel circuits adjacent to the at least two rows;
a gate driver connected to the scan lines for outputting the corresponding scan signals;
the data line is connected with the pixel circuits in the same column and used for transmitting corresponding data signals so as to write the data signals into the corresponding pixel circuits; and
and the data driver is connected with the data lines and used for outputting the corresponding data signals.
2. The display panel according to claim 1, wherein two data lines are disposed between the pixel circuits in two adjacent columns.
3. The display panel of claim 1, wherein the gate driver operates in a digital time ratio driving mode.
4. The display panel according to claim 3, wherein the pixel circuit is divided into N sub-frame display periods in one frame display period; the ratio of the display periods of two adjacent subframes is 2 or 1/2; wherein N is an integer not less than 1.
5. The display panel according to claim 4, wherein when N is equal to 8, the time ratio of the N sub-frame display periods is 1: 2: 4: 8: 16: 32: 64: 128.
6. the display panel according to claim 1, wherein the pixel circuit comprises:
the switch unit is connected with the scanning line and the data line and used for writing the data signal according to a scanning signal;
the driving unit is connected with the output end of the switch unit and the first power supply signal and used for generating a driving channel of corresponding current according to the data signal; and
and the light-emitting unit is connected with the driving unit and the second power supply signal and is used for displaying corresponding gray scales according to the current.
7. The display panel according to claim 6, wherein the switching unit comprises a first thin film transistor;
the grid electrode of the first thin film transistor is connected with the scanning signal; the input end of the first thin film transistor is connected with the data signal; and the output end of the first thin film transistor is connected with the driving unit.
8. The display panel according to claim 7, wherein the driving unit comprises a second thin film transistor;
the output end of the first thin film transistor is connected with the grid electrode of the second thin film transistor; the first power supply signal is connected with the input end of the second thin film transistor; and the output end of the second thin film transistor is connected with the input end of the light-emitting unit.
9. The display panel according to claim 8, wherein the light emitting unit comprises an OLED device;
the output end of the second thin film transistor is connected with the input end of the OLED device; the output end of the OLED device is connected with the second power supply signal; wherein a potential of the first power supply signal is higher than a potential of the second power supply signal.
10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202010782029.5A CN111968584A (en) | 2020-08-06 | 2020-08-06 | Display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010782029.5A CN111968584A (en) | 2020-08-06 | 2020-08-06 | Display panel and display device |
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| CN111968584A true CN111968584A (en) | 2020-11-20 |
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| CN202010782029.5A Pending CN111968584A (en) | 2020-08-06 | 2020-08-06 | Display panel and display device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114038393A (en) * | 2021-07-16 | 2022-02-11 | 重庆康佳光电技术研究院有限公司 | Pixel circuit and display panel |
| CN114141195A (en) * | 2021-12-10 | 2022-03-04 | Tcl华星光电技术有限公司 | Light emitting device driving circuit, display panel and driving method thereof |
Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1622166A (en) * | 2003-11-25 | 2005-06-01 | Lg.菲利浦Lcd株式会社 | Electro-luminescence display device and driving method thereof |
| CN1877406A (en) * | 2006-07-04 | 2006-12-13 | 友达光电股份有限公司 | Field-sequential liquid crystal display and drive method therefor |
| US20070103631A1 (en) * | 2005-11-09 | 2007-05-10 | Moon Hong M | Thin film transistor panel for liquid crystal display and liquid crystal display comprising the same |
| CN101465095A (en) * | 2007-12-21 | 2009-06-24 | 索尼株式会社 | Display device, method for driving same, and electronic apparatus |
| CN101930077A (en) * | 2009-06-26 | 2010-12-29 | 上海天马微电子有限公司 | X-ray sensor and fabrication method thereof |
| TW201220287A (en) * | 2010-11-15 | 2012-05-16 | Au Optronics Corp | LCD panel |
| CN103065556A (en) * | 2012-10-22 | 2013-04-24 | 友达光电股份有限公司 | Electroluminescent display panel and driving method thereof |
| CN103091920A (en) * | 2013-01-25 | 2013-05-08 | 北京京东方光电科技有限公司 | Array substrate, drive method of array substrate and display device of array substrate |
| CN103268753A (en) * | 2013-05-28 | 2013-08-28 | 上海中科高等研究院 | AMOLED drive circuit sharing scanning lines and driving method thereof |
| CN106019747A (en) * | 2016-07-26 | 2016-10-12 | 京东方科技集团股份有限公司 | Array substrate and driving method thereof and display panel |
| CN206020891U (en) * | 2016-08-31 | 2017-03-15 | 京东方科技集团股份有限公司 | A kind of array base palte and display floater, display device |
| CN108254986A (en) * | 2017-12-29 | 2018-07-06 | 友达光电股份有限公司 | Display device |
-
2020
- 2020-08-06 CN CN202010782029.5A patent/CN111968584A/en active Pending
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1622166A (en) * | 2003-11-25 | 2005-06-01 | Lg.菲利浦Lcd株式会社 | Electro-luminescence display device and driving method thereof |
| US20070103631A1 (en) * | 2005-11-09 | 2007-05-10 | Moon Hong M | Thin film transistor panel for liquid crystal display and liquid crystal display comprising the same |
| CN1877406A (en) * | 2006-07-04 | 2006-12-13 | 友达光电股份有限公司 | Field-sequential liquid crystal display and drive method therefor |
| CN101465095A (en) * | 2007-12-21 | 2009-06-24 | 索尼株式会社 | Display device, method for driving same, and electronic apparatus |
| CN101930077A (en) * | 2009-06-26 | 2010-12-29 | 上海天马微电子有限公司 | X-ray sensor and fabrication method thereof |
| TW201220287A (en) * | 2010-11-15 | 2012-05-16 | Au Optronics Corp | LCD panel |
| CN103065556A (en) * | 2012-10-22 | 2013-04-24 | 友达光电股份有限公司 | Electroluminescent display panel and driving method thereof |
| CN103091920A (en) * | 2013-01-25 | 2013-05-08 | 北京京东方光电科技有限公司 | Array substrate, drive method of array substrate and display device of array substrate |
| CN103268753A (en) * | 2013-05-28 | 2013-08-28 | 上海中科高等研究院 | AMOLED drive circuit sharing scanning lines and driving method thereof |
| CN106019747A (en) * | 2016-07-26 | 2016-10-12 | 京东方科技集团股份有限公司 | Array substrate and driving method thereof and display panel |
| CN206020891U (en) * | 2016-08-31 | 2017-03-15 | 京东方科技集团股份有限公司 | A kind of array base palte and display floater, display device |
| CN108254986A (en) * | 2017-12-29 | 2018-07-06 | 友达光电股份有限公司 | Display device |
Non-Patent Citations (1)
| Title |
|---|
| 朱晖: "基于2T0C像素电路的AMOLED数字驱动技术研究", 《电子世界》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114038393A (en) * | 2021-07-16 | 2022-02-11 | 重庆康佳光电技术研究院有限公司 | Pixel circuit and display panel |
| CN114141195A (en) * | 2021-12-10 | 2022-03-04 | Tcl华星光电技术有限公司 | Light emitting device driving circuit, display panel and driving method thereof |
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Application publication date: 20201120 |