CN113992167A - Low-noise amplifier applied to acceleration sensor - Google Patents

Low-noise amplifier applied to acceleration sensor Download PDF

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Publication number
CN113992167A
CN113992167A CN202111260154.0A CN202111260154A CN113992167A CN 113992167 A CN113992167 A CN 113992167A CN 202111260154 A CN202111260154 A CN 202111260154A CN 113992167 A CN113992167 A CN 113992167A
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transistor
source
drain
gate
bias
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唐鹤
李兆江
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University of Electronic Science and Technology of China
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University of Electronic Science and Technology of China
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Priority to CN202111260154.0A priority Critical patent/CN113992167A/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45197—Pl types
    • H03F3/45206—Folded cascode stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
    • H03F1/14—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of neutralising means
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/372—Noise reduction and elimination in amplifier

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

The invention belongs to the technical field of low-noise amplifiers, and particularly relates to a low-noise amplifier applied to an acceleration sensor. The invention comprises a two-stage amplifier, a modulator and a demodulator, wherein the first stage adopts a folding cascode structure to improve input impedance, and simultaneously, the modulator is added at an input port to modulate signals to high frequency, so that the interference of low-frequency flicker noise and DC offset voltage is avoided, and simultaneously, the demodulator is used for recovering signals at the output of the first stage, and simultaneously, the low-frequency flicker noise and the DC offset voltage are modulated to high frequency and finally filtered by an external filter circuit. The second stage adopts a circuit structure of a Class-AB power amplifier, so that the output capability is improved, the floating gate current source controls the static working point of the whole circuit, and the static power consumption of the whole circuit is reduced.

Description

Low-noise amplifier applied to acceleration sensor
Technical Field
The invention belongs to the technical field of low-noise amplifiers, and particularly relates to a low-noise amplifier applied to an acceleration sensor.
Background
The output voltage signal of the acceleration sensor is very weak, and because a transistor (MOSFET) brings flicker noise and thermal noise to a circuit, the input signal is submerged in noise and cannot be collected and processed by adopting a traditional CMOS amplifier design method, as shown in FIG. 1, and meanwhile, the amplifier generates offset voltage due to random mismatch of MOSFET parameters caused by process errors, so that the microcontroller makes an erroneous judgment on the output information of the sensor. In order for the signal conditioning circuit of the subsequent stage to correctly process the output signal of the sensor, some circuit techniques are required to reduce the offset voltage and noise of the amplifier circuit.
Disclosure of Invention
The present invention is directed to solve the above problems, and an object of the present invention is to provide an embedded Chopper (Chopper) modulation technique to reduce the input noise and offset voltage of an amplifier, improve the input signal-to-noise ratio (SNR), and expand the detectable dynamic range of a system. Through the circuit structure, the amplifier can be applied to sensors for weak signal acquisition and implantable medical equipment to provide signals with low noise and high resolution.
The technical scheme of the invention is as follows:
a low noise amplifier for use in an acceleration sensor, comprising:
a first-stage modulator CHOP1, a second-stage modulator CHOP2, a third-stage modulator CHOP3, a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, a twelfth transistor M12, a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, a sixteenth transistor M16, a first capacitor Cc1, a second capacitor Cc2, a first current source I1;
two input ends of the first-stage modulator CHOP1 are respectively connected with external two-port signals VIP and VIN, one output end of the first-stage modulator CHOP1 is connected with the gate of the first transistor M1, and the other output end is connected with the gate of the second transistor M2;
one input end of the second-stage modulator CHOP2 is connected with the drain of the first transistor M1 and the drain of the fourth transistor M4, the other input end of the second-stage modulator CHOP2 is connected with the drain of the second transistor M2 and the drain of the third transistor M3, one output end of the second-stage modulator CHOP2 is connected with the source of the fifth transistor M5, and the other output end of the second-stage modulator CHOP2 is connected with the source of the sixth transistor M6;
one input terminal of the third-stage modulator CHOP3 is connected to the drain of the thirteenth transistor M13, the other input terminal of the third-stage modulator CHOP3 is connected to the drain of the fourteenth transistor M14, one output terminal of the third-stage modulator CHOP3 is connected to the source of the eleventh transistor M11, and the other output terminal of the third-stage modulator CHOP3 is connected to the source of the twelfth transistor M12;
the source of the first transistor M1 is connected to the source of the second transistor M2 and the output terminal of the first current source I1, and the input terminal of the first current source I1 is connected to the source of the thirteenth transistor M13, the source of the fourteenth transistor M14 and the source of the sixteenth transistor M16;
the gate of the third transistor M3 and a bias voltage source VN，BIASThe source electrode is connected with the power ground; the gate of the fourth transistor M4 and a bias voltage source VN，BIASThe source electrode is connected with the power ground;
the gate of the fifth transistor M5 and a bias voltage source VCN，BIASThe drain of the seventh transistor M7 is connected with the source of the ninth transistor M9;
the gate of the sixth transistor M6 and the bias voltage source VCN，BIASThe drain of the transistor is connected to the source of the eighth transistor M8, the drain of the tenth transistor M10, the negative port of the second capacitor Cc2, and the gate of the fifteenth transistor M15;
the gate of the seventh transistor M7 and the bias voltage source VNF，BIASThe drain of the transistor is connected with the source of the ninth transistor M9, the drain of the eleventh transistor M11 and the gate of the thirteenth transistor M13;
the gate of the eighth transistor M8 and a bias voltage source VNF，BIASThe drain of the first capacitor Cc1 is connected with the source of the tenth transistor M10, the drain of the twelfth transistor M12, the gate of the sixteenth transistor M16 and the negative port of the first capacitor Cc 1;
the gate of the ninth transistor M9 and a bias voltage source VPF，BIASConnected to the gate of the tenth transistor M10PF，BIASConnected to the gate of the eleventh transistor M11CP，BIASThe gate of the twelfth transistor M12 is connected to the bias voltage source VCP，BIASConnecting;
the gate of the thirteenth transistor M13 is connected to the gate of the fourteenth transistor M14;
the source of the fifteenth transistor M15 is connected with the power supply, the drain is connected with the positive port of the second capacitor Cc2 and the output end Vout；
The source of the sixteenth transistor M16 is connected with the power supply, the drain is connected with the positive port of the first capacitor Cc1 and the output end Vout。
In the above scheme, the input modulator CHOP1 is used to shift the input signal frequency to a high frequency; the M1-M14 form a folding cascode amplifier for amplifying an input signal; output modulators CHOP2, CHOP3 for demodulating the amplified signals, wherein the high frequency amplified input signals are restored, and the low frequency noise and offset voltage are shifted to high frequency, and finally filtered by an off-chip low pass filter; and the second stage Class-AB amplifier is used for amplifying the first stage output signal.
The second stage Class-AB amplifier comprises: a floating gate current source and an amplifier. The seventh transistor M7, the eighth transistor M8, the ninth transistor M9, and the tenth transistor M10 form a floating gate current source, which mainly provides a proper static operating point for the amplifier, thereby reducing static power consumption and improving driving capability. The sixteenth transistor M16 and the fifteenth transistor M15 form an amplifier, which increases the gain and enlarges the swing range of the output signal.
The invention has the beneficial effects that: 1) by adopting the chopping modulation technology, the noise of the amplifier is very small, the low-frequency gain of the amplifier is not influenced, and an additional compensation circuit is not needed to compensate the low-frequency gain; 2) the folded cascode circuit is adopted, the circuit gain is increased, the amplification precision of the circuit is improved, and the amplifier is stabilized by using the Miller compensation technology, so that the circuit has strong robustness.
Drawings
FIG. 1 is a circuit diagram of a conventional amplifier;
FIG. 2 is a circuit structure of a low noise amplifier applied to an acceleration sensor according to the present invention;
Detailed Description
The technical scheme of the invention is described in detail in the following with reference to the attached drawings:
as shown in fig. 2, the present invention mainly includes a first-stage modulator CHOP1, a second-stage modulator CHOP2, a third-stage modulator CHOP3, a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, a twelfth transistor M12, a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, a sixteenth transistor M16, a first capacitor Cc1, a second capacitor Cc2, and a first current source I1.
The gate of the first transistor M1 is connected to an output port of the first stage modulator CHOP1, the source is connected to the source of the second transistor M2 and the first current source I1, and the drain is connected to an input port of the second modulator CHOP2 and the drain of the fourth transistor M4. The gate of the third transistor M3 and a bias voltage source VN，BIASConnected, source to ground, drain to the input port of the second modulator CHOP2 and drain of the second transistor M2. The gate of the fourth transistor M4 and a bias voltage source VN，BIASConnected, source to ground, drain to the input port of the second modulator CHOP2 and the drain of the first transistor M1. The gate of the fifth transistor M5 and a bias voltage source VCN，BIASAnd a source connected to the output port of the second modulator CHOP2 and a drain connected to the source of the seventh transistor M7 and the drain of the tenth transistor M10. The gate of the sixth transistor M6 and the bias voltage source VCN，BIASThe source of the second modulator CHOP2 is connected to the output port, and the drain is connected to the source of the eighth transistor M8, the drain of the ninth transistor M9, the negative port of the second capacitor Cc2, and the gate of the fifteenth transistor M15. The gate of the seventh transistor M7 and the bias voltage source VNF，BIASAnd the source is connected with the drain of the fifth transistor M5, and the drain is connected with the source of the ninth transistor M9 and the drain of the eleventh transistor M11. The gate of the eighth transistor M8 and a bias voltage source VNF，BIASA source connected to the drain of the sixth transistor M6, the negative port of the second capacitor Cc2 and the gate of the fifteenth transistor M15, a drain connected to the source of the tenth transistor M10, the drain of the twelfth transistor M12 and the gate of the fifteenth transistor M15The gate of the sixteen transistor M16 and the negative port of the first capacitor Cc 1. The gate of the ninth transistor M9 and a bias voltage source VPF，BIASAnd the source is connected with the drain of the eleventh transistor M11, the drain of the seventh transistor M7 and the gate of the thirteenth transistor M13, and the drain is connected with the source of the seventh transistor M7 and the drain of the fifth transistor M5. The gate of the tenth transistor M10 and a bias voltage source VPF，BIASAnd the source of the third transistor is connected with the drain of the twelfth transistor M12, the drain of the eighth transistor M8, the gate of the sixteenth transistor M16 and the negative port of the first capacitor Cc1, and the drain of the third transistor M7 is connected with the drain of the fifth transistor M5. The gate of the eleventh transistor M11 and a bias voltage source VCP，BIASAnd has a source connected to the input port of the third modulator CHOP3, a drain connected to the gate of the thirteenth transistor M13, the source of the ninth transistor M9, and the drain of the seventh transistor M7. The gate of the twelfth transistor M12 and the bias voltage source VCP，BIASConnected to the input port of the third modulator CHOP3 at its source, and connected to the source of the tenth transistor M10 and the drain of the eighth transistor M8 at its drain. The gate of the thirteenth transistor M13 is connected to the gate of the fourteenth transistor M14, the drain of the eleventh transistor M11, the source of the ninth transistor M9, and the drain of the seventh transistor M7, and the drain is connected to the input port of the third modulator CHOP 3. The gate of the fourteenth transistor M14 is connected to the gate of the thirteenth transistor M13, the drain of the eleventh transistor M11, the source of the ninth transistor M9 and the drain of the seventh transistor M7, the source is connected to the power supply, and the drain is connected to the input port of the third modulator CHOP 3. The gate of the fifteenth transistor M15 is connected to the drain of the sixth transistor M6, the source of the eighth transistor M8, the drain of the tenth transistor M10 and the negative port of the second capacitor Cc2, the source is connected to the power supply, the drain is connected to the positive port of the second capacitor Cc2 and the output point Vout. The gate of the sixteenth transistor M16 is connected to the drain of the eighth transistor M8, the source of the tenth transistor M10, the drain of the twelfth transistor M12 and the negative port of the first capacitor Cc1, the source is connected to the power supply, the drain is connected to the positive port of the first capacitor Cc1 and the output point Vout。
The first-stage modulator CHOP1 is arranged between the input port and the first transistor M1 and the second transistor M6 and is used for modulating the input signal to the chopping frequency fchopNearby, after the current signal is converted into a current signal through a first-stage transconductance converter (composed of a first transistor M1 and a second transistor M2), the low-frequency noise and the offset voltage of the amplifier are located in a low frequency band on a frequency spectrum, and the input signal is located in a high frequency band on the frequency spectrum, so that mutual influence is avoided. The second modulator CHOP2 and the third modulator CHOP3 are located between cascode amplifiers, and mainly demodulate the current signal output by the first stage, according to this method, the input signal can be recovered, and the low frequency noise and offset voltage of the amplifier are modulated to high frequency, and finally the low frequency noise and offset voltage can be filtered by a low pass filter.
In order to compensate the loss of gain caused by the chopping technology, careful consideration needs to be given to the selection of the chopping frequency, firstly, the chopping frequency cannot be too high, due to the limited bandwidth of the amplifier, the chopping frequency is too high, so that the equivalent gain of the amplifier is reduced, and the output signal-to-noise ratio is reduced, and the chopping efficiency is reduced, the low-frequency noise is increased, and the output signal-to-noise ratio is influenced. Therefore, to meet this requirement, it is generally necessary to ensure the following formula:
fin<<fchop<<fA
wherein f isinFor the frequency of the input signal, fchopTo chopping frequency, fAThe closed loop bandwidth of the amplifier.
The second-stage Class-AB amplifier composed of the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, the tenth transistor M10, the sixteenth transistor M16 and the fifteenth transistor M15 has the effects that a floating gate current source is used for selecting a proper static working point of a circuit, so that the static current consumption of the circuit under a static condition is reduced, and the static power consumption of the whole structure is reduced. The first capacitor C1 and the second capacitor C2 are used as Miller capacitors, so that the main pole of the amplifier is reduced, the amplifier meets the amplification requirements of various application scenes, and the amplifier is stabilized.
Compared with the prior art, the invention designs an amplifier with high input impedance, low noise and low power consumption mainly by utilizing the chopping modulation technology, and the amplifier can be applied to preprocessing circuits of various sensors.

Claims (1)

1. A low noise amplifier for use in an acceleration sensor, comprising:
a first-stage modulator (CHOP1), a second-stage modulator (CHOP2), a third-stage modulator (CHOP3), a first transistor (M1), a second transistor (M2), a third transistor (M3), a fourth transistor (M4), a fifth transistor (M5), a sixth transistor (M6), a seventh transistor (M7), an eighth transistor (M8), a ninth transistor (M9), a tenth transistor (M10), an eleventh transistor (M11), a twelfth transistor (M12), a thirteenth transistor (M13), a fourteenth transistor (M14), a fifteenth transistor (M15), a sixteenth transistor (M16), a first capacitor (Cc1), a second capacitor (Cc2), and a first current source (I1);
two input ends of the first-stage modulator (CHOP1) are respectively connected with external two-port signals VIP and VIN, one output end of the first-stage modulator (CHOP1) is connected with the grid of the first transistor (M1), and the other output end of the first-stage modulator is connected with the grid of the second transistor (M2);
one input end of the second-stage modulator (CHOP2) is connected with the drain of the first transistor (M1) and the drain of the fourth transistor (M4), the other input end of the second-stage modulator (CHOP2) is connected with the drain of the second transistor (M2) and the drain of the third transistor (M3), one output end of the second-stage modulator (CHOP2) is connected with the source of the fifth transistor (M5), and the other output end of the second-stage modulator (CHOP2) is connected with the source of the sixth transistor (M6);
one input terminal of the third-stage modulator (CHOP3) is connected to the drain of the thirteenth transistor (M13), the other input terminal of the third-stage modulator (CHOP3) is connected to the drain of the fourteenth transistor (M14), one output terminal of the third-stage modulator (CHOP3) is connected to the source of the eleventh transistor (M11), and the other output terminal of the third-stage modulator (CHOP3) is connected to the source of the twelfth transistor (M12);
the source of the first transistor (M1) is connected with the source of the second transistor (M2) and the output end of the first current source (I1), the input end of the first current source (I1) is connected with the source of the thirteenth transistor (M13), the source of the fourteenth transistor (M14) and the source of the sixteenth transistor (M16);
the gate of the third transistor (M3) is connected to a bias voltage source VN，BIASThe source electrode is connected with the power ground; the gate of the fourth transistor (M4) and a bias voltage source VN，BIASThe source electrode is connected with the power ground;
the gate of the fifth transistor (M5) and a bias voltage source VCN，BIASThe drain of the seventh transistor (M7) is connected with the source of the ninth transistor (M9);
the gate of the sixth transistor (M6) and a bias voltage source VCN，BIASA drain connected to the source of the eighth transistor (M8), the drain of the tenth transistor (M10), and the second capacitor (C)c2) And a gate of a fifteenth transistor (M15);
the gate of the seventh transistor (M7) and a bias voltage source VNF，BIASA drain connected to the source of the ninth transistor (M9), the drain of the eleventh transistor (M11), and the gate of the thirteenth transistor (M13);
the gate of the eighth transistor (M8) and a bias voltage source VNF，BIASA drain connected to the source of the tenth transistor (M10), the drain of the twelfth transistor (M12), the gate of the sixteenth transistor (M16), and the first capacitor (C)c1) A negative port;
the gate of the ninth transistor (M9) and a bias voltage source VPF，BIASConnected, the gate of the tenth transistor (M10) to a bias voltage source VPF，BIASConnected to the gate of the eleventh transistor (M11) with a bias voltage source VCP，BIASConnected to the gate of the twelfth transistor (M12) to a bias voltage source VCP，BIASConnecting;
the gate of the thirteenth transistor (M13) is connected with the gate of the fourteenth transistor (M14);
the source of the fifteenth transistor (M15) is connected with the power supply, and the drain is connected with the second capacitor (C)c2) Positive port and output terminal Vout；
The source of the sixteenth transistor (M16) is connected with the power supply, and the drain is connected with the first capacitor (C)c1) Positive port and output terminal Vout。
CN202111260154.0A 2021-10-28 2021-10-28 Low-noise amplifier applied to acceleration sensor Pending CN113992167A (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102347738A (en) * 2010-08-04 2012-02-08 中国科学院微电子研究所 Two-stage fully-differential low-noise low-offset chopping operational amplifier
CN104320096A (en) * 2014-10-04 2015-01-28 复旦大学 Microcurrent and current feedback chopper modulation instrument amplifier

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102347738A (en) * 2010-08-04 2012-02-08 中国科学院微电子研究所 Two-stage fully-differential low-noise low-offset chopping operational amplifier
CN104320096A (en) * 2014-10-04 2015-01-28 复旦大学 Microcurrent and current feedback chopper modulation instrument amplifier

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