CN113922777A - Power control circuit based on class E power amplifier - Google Patents
Power control circuit based on class E power amplifier Download PDFInfo
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- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
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- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/3036—Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers
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Abstract
The invention discloses a power control circuit based on an E-type power amplifier, which belongs to the field of radio frequency integrated circuits and comprises the following components: the digital control module generates and outputs a digital control bit corresponding to the target power value; the digital-to-analog conversion module is connected with the output of the digital control module in input, converts the digital control bit into corresponding direct current bias voltage and outputs the direct current bias voltage through a first output port; the input side of the power amplification module is provided with a bias circuit, a bias node of the bias circuit is connected with the first output port, an external square wave signal is input into the power amplification module under the action of the bias circuit, the square wave signal is a non-ideal square wave signal, and the direct current bias voltage changes the direct current bias of the square wave signal so as to adjust the duty ratio of the signal actually input into the power amplification module, thereby adjusting the output power of the power amplification module. The non-ideal characteristic of a square wave signal transmitted in an actual circuit is utilized, the duty ratio is adjusted by controlling the direct current bias of an input signal, and the design complexity of the circuit is simplified.
Description
Technical Field
The invention belongs to the field of radio frequency integrated circuits, and particularly relates to a power control circuit based on an E-type power amplifier.
Background
In a conventional A, B, C-class Power Amplifier (PA), a transistor is used as a controlled current source, operates in a saturation region, linearly amplifies an input signal, and is applicable to all modulation modes. However, the inherent dc bias current of the transistor causes a large energy loss, and thus, the efficiency of the conventional linear amplifier is low. An input switching tube in the nonlinear class-E power amplifier works in a cut-off region and a linear region, a digital frequency modulation signal controls the input MOS tube to be periodically switched on and off, an amplified voltage and current signal is output, and a sine wave signal with the same frequency as the input signal is obtained through a frequency selection network, so that the input frequency modulation signal is amplified.
The class-E power amplifier is mainly used in the fields of low communication rate and low power consumption, and the adjustable range of the output power of the class-E power amplifier is very important. The lower minimum output power can reduce the power consumption in the short-distance communication, and the larger maximum output power ensures the maximum communication distance. The traditional measure for increasing the output power regulation range of the class-E power amplifier greatly increases the complexity of the circuit design, which is contrary to the original purpose of the low-cost application scenario. Therefore, how to achieve the maximum output power regulation range with a simple circuit is an important direction.
Disclosure of Invention
Aiming at the defects and improvement requirements of the prior art, the invention provides a power control circuit based on an E-type power amplifier, aiming at realizing duty ratio regulation by controlling input signal direct current bias by utilizing the non-ideal characteristic of a square wave signal and simplifying the design complexity of the circuit.
In order to achieve the above object, the present invention provides a power control circuit based on class E power amplifier, comprising: the digital control module is used for generating and outputting digital control bits corresponding to the target power value; the input end of the digital-to-analog conversion module is connected to the output end of the digital control module and used for converting the digital control bit into corresponding direct current bias voltage and outputting the direct current bias voltage through a first output port; the input side of the power amplification module is provided with a bias circuit, a bias node of the bias circuit is connected to the first output port, an external square wave signal is input to the power amplification module through the bias circuit, the square wave signal is a non-ideal square wave signal, and the direct current bias voltage is used for changing the direct current bias of the square wave signal so as to adjust the duty ratio of the signal input to the power amplification module, so that the output power of the power amplification module is adjusted.
Furthermore, the digital-to-analog conversion module is further configured to convert the digital control bits into corresponding reference voltages and output the reference voltages through a second output port, and the power control circuit further includes: and the input of the low-dropout linear regulator is connected with the second output port, the output of the low-dropout linear regulator is connected with a drain voltage input port of a power amplifier in the power amplification module, and the low-dropout linear regulator is used for regulating the drain voltage output to the drain of the power amplifier according to the reference voltage so as to regulate the output power of the power amplification module.
Furthermore, the low dropout linear regulator comprises an error amplifier and an adjusting tube; the inverting input end of the error amplifier is connected with the second output port, the non-inverting input end of the error amplifier is directly connected to the output end of the adjusting tube, and the output end of the error amplifier is connected to the input end of the adjusting tube; the error amplifier is used for comparing the output voltage of the adjusting tube with the reference voltage and outputting a control signal to control the grid voltage of the adjusting tube according to the comparison result until the output voltage of the adjusting tube is equal to the reference voltage.
Furthermore, the low dropout regulator comprises a differential input stage, a buffer stage and a power stage which are connected in sequence, wherein the differential input stage and the buffer stage are of a fully differential structure.
Furthermore, the power amplification module comprises a switch tube M3, a switch tube M4 and a CMOS transmission gate; one end of the CMOS transmission gate is used as a voltage input port of a drain end of a power amplifier in the power amplification module, and the other end of the CMOS transmission gate is connected with a drain electrode of the switch tube M3; the switching tube M3 and the switching tube M4 form a cascode structure; the switch tube M3 is a conduction tube and is used for conducting and dividing voltage; the switching tube M4 is a power amplifier tube, and is configured to perform power amplification on a signal input to the power amplification module.
Further, the power amplification module further comprises a capacitor C1, a capacitor C2, an inductor L1 and an inductor L2; the inductor L1 is connected between the CMOS transmission gate and the switch tube M3; one end of the capacitor C1 is connected with the drain electrode of the switch tube M3, and the other end is grounded; the drain of the switching tube M3 is connected to the inductor L2 and the capacitor C2 in sequence to form the output end of the power amplification module, or the drain of the switching tube M3 is connected to the capacitor C2 and the inductor L2 in sequence to form the output end of the power amplification module; the capacitor C1, the capacitor C2, the inductor L1 and the inductor L2 are used for adjusting the voltage waveform and the current waveform after power amplification, so that the voltage waveform and the current waveform are not overlapped to reduce useless power consumption.
Furthermore, the power amplifier further comprises an inverter connected between the input end of the power control circuit and the input node of the bias circuit, and external square wave signals are input to the power amplification module after sequentially passing through the inverter and the bias circuit.
Furthermore, the bias circuit comprises a resistor R1 and a capacitor C3, one end of the resistor R1 is connected to the first output port as the bias node, the other end of the resistor R1 is connected to one end of the capacitor C3, the other end of the capacitor C3 is connected to an input node of the bias circuit for receiving an external square wave signal, and an input of the power amplification module is connected to a connection point of the resistor R1 and the capacitor C3.
Still further, the digital-to-analog conversion module comprises: one end of the series resistance voltage division circuit is grounded, and the other end of the series resistance voltage division circuit inputs a preset voltage; and the multi-channel numerical control MOS switch is used for receiving the digital control bit and gating a corresponding branch in the series resistance voltage division circuit to obtain and output the direct current bias voltage.
Furthermore, the number of the series resistors in the series resistor voltage division circuit is determined by the power regulation step of the power control circuit, and the resistance value of the series resistor voltage division circuit is determined by the system static power consumption constraint, the node parasitic capacitance of the next stage circuit driven by the power control circuit and the required switching rate.
Generally, by the above technical solution conceived by the present invention, the following beneficial effects can be obtained:
(1) by utilizing the non-ideal characteristics of square wave signals in an actual application scene, namely the square wave signals have certain rise time and fall time, the conduction time of a power amplifier switch tube is controlled by controlling the direct-current bias voltage of the square wave signals, so that the control is equivalent to the control of the duty ratio of an input signal, and the control of output power is further realized, the circuit design is greatly simplified by the duty ratio control mode, the duty ratio is flexibly adjustable within the range of 0-100%, and the adjustment range and the adjustment flexibility of the output power are improved;
(2) on the basis of a fine power regulation mode of regulating the duty ratio of an input signal, a coarse power regulation mode of regulating the voltage of a drain terminal of a power amplifier tube is added, fine regulation and coarse regulation are combined, and the regulation precision and the regulation range are ensured;
(3) the output voltage of the adjusting tube is directly connected to the non-inverting input end of the error amplifier, so that a feedback resistor is avoided, and the output voltage of the adjusting tube can be adjusted directly by inputting a reference voltage, thereby simplifying the circuit design and greatly enhancing the flexibility of adjusting the output voltage;
(4) the resistor R1 and the capacitor C3 are added into the bias circuit, so that the non-ideal characteristic of the square wave signal can be enhanced, the rising time and the falling time of the square wave signal can be prolonged, and the effect of output power regulation and control can be enhanced.
Drawings
Fig. 1 is a block diagram of a power control circuit based on a class E power amplifier according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of a power amplification module of the block diagram of FIG. 1;
FIG. 3 is a circuit diagram of a digital-to-analog conversion module of the block diagram of FIG. 1;
FIG. 4 is a schematic diagram of the low dropout regulator shown in the block diagram of FIG. 1;
FIG. 5 is a circuit diagram of the low dropout linear regulator shown in the block diagram of FIG. 1;
fig. 6 is a schematic diagram of adjusting the duty cycle of an input signal according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
In the present application, the terms "first," "second," and the like (if any) in the description and the drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
Fig. 1 is a block diagram of a power control circuit based on a class E power amplifier according to an embodiment of the present invention. Referring to fig. 1, a power control circuit based on a class E power amplifier according to the present embodiment is described in detail with reference to fig. 2 to 6.
Referring to fig. 1, the power control circuit based on the class E power amplifier includes a digital control module, a digital-to-analog conversion module, and a power amplification module. And the digital control module is used for generating and outputting digital control bits corresponding to the target power value. The input of the digital-to-analog conversion module is connected with the output of the digital control module and is used for receiving the digital control bit output by the digital control module, converting the received digital control bit into corresponding direct current bias voltage, and then outputting the direct current bias voltage through a first output port of the digital-to-analog conversion module. And a bias circuit is arranged on the input side of the power amplification module, and a bias node of the bias circuit is connected with a first output port of the digital-to-analog conversion module. An external square wave signal is input into the power amplification module through an input node of the bias circuit, the square wave signal is a non-ideal square wave signal, and in the process that the external square wave signal is input into the power amplification module, the direct current bias voltage changes the direct current bias of the square wave signal so as to adjust the duty ratio of a signal finally input into the power amplification module, and therefore the output power of the power amplification module is adjusted.
Referring to fig. 6, a solid line and a dotted line respectively represent square wave signals with different dc offsets, where the left side is an ideal square wave signal, the right side is an actual input signal with a certain rise time and fall time in an actual application scene, and the actual input signal is a non-ideal square wave signal with non-ideal characteristics. Vm is a conduction threshold of a power amplification tube in the power amplification module, Vref is zero voltage of reference, and VDD is power supply voltage.
For the ideal square wave signal on the left side in fig. 6, when the dc bias voltage of the input signal is reduced and the maximum level of the reduced signal is greater than Vm, the high level signal of the first half period of the input signal is greater than the turn-on threshold, and at this time, the power amplifier tube is in the turn-on state; the low level signal of the latter half period of the input signal is lower than the conduction threshold, at this moment, the power amplifier tube is in the off state, and the duty ratio of the input signal is always 0.5 at this moment. When the direct current bias voltage of the input signal is reduced and the maximum level of the reduced signal is less than Vm, the power amplifier tube is always in an off state, and the duty ratio of the input signal is 0. Therefore, if the input signal is an ideal square wave signal, changing the dc bias voltage can only make the equivalent input duty ratio of the input signal be 0.5 or 0, and the output power cannot be changed by changing the dc bias voltage.
For the non-ideal square wave signal on the right side in fig. 6, since the clock signal itself has a certain rise time and fall time, the load of the input signal has a corresponding parasitic resistance and capacitance, resulting in a certain rise time and fall time of the actual input signal. When the signal direct-current bias voltage is reduced, the time of the signal larger than Vm is smaller than a half period, and the time smaller than Vm is larger than the half period, namely the conduction time of the input power amplification tube is smaller than the half period, which is equivalent to that the duty ratio of the input signal is reduced, thereby realizing the control of the output power of the input power amplification tube. In the embodiment, the duty ratio of the input signal is adjusted by using the non-ideal characteristic of the square wave signal in the actual application scene, so that the design complexity of the input signal duty ratio adjusting circuit is greatly simplified.
Referring to fig. 2, the bias circuit includes a resistor R1 and a capacitor C3, one end of the resistor R1 is connected to the first output port of the digital-to-analog conversion module as a bias node, the other end of the resistor R1 is connected to one end of the capacitor C3, the other end of the capacitor C3 is used as an input node of the bias circuit for receiving an external square wave signal, and an input of the power amplification module is connected to a connection point of the resistor R1 and the capacitor C3. In this embodiment, the resistor R1 and the capacitor C3 are added to the bias circuit, so that the non-ideal characteristics of the square wave signal can be enhanced, the rise time and the fall time of the square wave signal can be prolonged, and the effect of output power regulation and control can be enhanced.
Referring to fig. 2, the power control circuit further includes an inverter connected between the input terminal of the power control circuit and the input node of the bias circuit, and an external square wave signal is input to the power amplification module after passing through the inverter and the bias circuit in sequence. Because the driving capability of the external square wave signal is limited, the driving capability can be improved by using an inverter as a buffer stage, and the resistor R1, the capacitor C3 and the DC bias voltage VbiasThe duty ratio of the signal input to the power amplification module can be regulated, and the output power of the power amplification module can be further regulated.
The power amplifying module comprises a switch tube M3, a switch tube M4 and a CMOS transmission gate, as shown in FIG. 2. One end of the CMOS transmission gate is used as a voltage input port of a drain terminal of a power amplifier in the power amplification module, and the other end of the CMOS transmission gate is connected with a drain electrode of the switching tube M3, so that whether the whole power amplification circuit works or not can be controlled. The switching tube M3 and the switching tube M4 form a cascode structure, so that the breakdown risk of the input tube can be effectively reduced; the switch tube M3 is a conducting tube for conducting the voltage division; the switching tube M4 is a power amplifier tube, and is used for performing power amplification on the signal input to the power amplification module.
The power amplification module further includes a capacitor C1, a capacitor C2, an inductor L1, and an inductor L2, as shown in fig. 2. The inductor L1 is connected between the CMOS transmission gate and the switch tube M3; one end of the capacitor C1 is connected to the drain of the switch tube M3, and the other end is grounded. One end of the capacitor C2 is connected with the drain of the switch tube M3, the other end is connected with one end of the inductor L2, and the other end of the inductor L2 is the output end of the power amplification module; alternatively, one end of the inductor L2 is connected to the drain of the switching tube M3, the other end is connected to one end of the capacitor C2, and the other end of the capacitor C2 is the output end of the power amplification module. The capacitor C1, the capacitor C2, the inductor L1 and the inductor L2 are passive devices and are used for adjusting voltage waveforms and current waveforms after power amplification, so that the voltage waveforms and the current waveforms are not overlapped, useless power consumption is reduced, and efficiency is improved. The inductor L2 and the capacitor C2 also function as a frequency selector, and the Q value thereof directly affects the stray suppression of the output signal. It should be noted that, in some cases, the capacitor C1 may be eliminated, and the effect may be achieved only by the parasitic capacitance to ground of the drain node of the switch tube M3.
The digital-to-analog conversion module comprises a series resistance voltage division circuit and a multi-path numerical control MOS switch, as shown in FIG. 3. One end of the series resistance voltage division circuit is grounded, and the other end of the series resistance voltage division circuit inputs preset voltage. The multi-channel numerical control MOS switch is used for receiving the digital control bit output by the digital control module and gating a corresponding branch in the series resistance voltage division circuit to obtain and output a corresponding direct current bias voltage so as to complete the digital-to-analog conversion function. The number of the series resistors in the series resistor voltage division circuit is determined by the power regulation step of the power control circuit, and the resistance value of the series resistor voltage division circuit is determined by the system static power consumption constraint, the node parasitic capacitance of the next stage circuit driven by the power control circuit and the required switching rate. Further, parameters of the MOS switch in the multi-channel numerical control MOS switch are determined according to factors such as output voltage precision and the like.
The digital-to-analog conversion module is also used for converting the digital control bit into a corresponding reference voltage and outputting the reference voltage through a second output port. The power control circuit further comprises a low dropout linear regulator, wherein the input of the low dropout linear regulator is connected with the second output port, and the output of the low dropout linear regulator is connected with a drain voltage input port of a power amplifier in the power amplification module and used for adjusting the drain voltage output to the drain of the power amplifier according to the reference voltage so as to adjust the output power of the power amplification module.
In this embodiment, the power of the power amplification module is adjusted by adjusting the duty ratio of the input signal and adjusting the drain voltage of the power amplifier tube. The adjustment mode of adjusting the duty ratio of the input signal is a fine adjustment mode and is used for ensuring the adjustment precision; the adjusting mode of adjusting the voltage of the drain end of the power amplifier tube is a coarse adjusting mode and is used for ensuring the adjusting range.
The low dropout regulator includes an error amplifier and a regulating tube, as shown in fig. 4. The inverting input end of the error amplifier is connected with the second output port of the digital-analog control module, the non-inverting input end of the error amplifier is directly connected with the output end of the adjusting tube, and the output end of the error amplifier is connected with the input end of the adjusting tube. The error amplifier is used for comparing the output voltage of the adjusting tube with the reference voltage output by the second output port of the digital-analog control module, and outputting a control signal to control the grid voltage of the adjusting tube according to the comparison result until the output voltage of the adjusting tube is equal to the reference voltage. The adjusting tube receives a control signal of the error amplifier to drive the load. The output voltage of the adjusting tube is directly connected to the non-inverting input end of the error amplifier, so that the use of a feedback resistor is avoided, and the output voltage of the adjusting tube can be adjusted directly by inputting a reference voltage, thereby simplifying the circuit design and greatly enhancing the flexibility of adjusting the output voltage.
The low dropout linear regulator comprises a differential input stage, a buffer stage and a power stage which are connected in sequence, as shown in fig. 5. The differential input stage and the buffer stage are of a fully differential structure, and the charging and discharging current to the grid of the power tube is greatly increased under the same static power consumption, so that the transient response characteristic of the low-dropout linear voltage regulator is improved. In the circuit shown in fig. 5, the differential input stage and the buffer stage correspond to the error amplifier in fig. 4, and the switching tube M14 corresponds to the regulating tube in fig. 4.
When the power control circuit is provided with the low dropout regulator, the digital-to-analog conversion module should include two basic circuits as shown in fig. 3, and two output voltages of the two basic circuits respectively control the gate bias voltage of the power amplification module and the input reference voltage of the low dropout regulator. One output port of the digital-to-analog conversion module is connected to a signal input port of the power amplification module, for example, the non-ideal characteristic of an input digital signal is changed, the duty ratio of the input signal is controlled by changing the direct current bias of the input signal, and the output power of the power amplification module is further controlled. The other output port of the digital-to-analog conversion module is connected to the input reference voltage port of the low dropout linear regulator to control the output voltage of the low dropout linear regulator, namely to control the drain voltage of the power amplification module, thereby controlling the output power of the power amplification module. The input port of the digital-to-analog conversion module is connected with the output of the digital control module, and outputs corresponding digital control bits according to the actually required target power value, the digital control bits are converted into two corresponding control voltages through the digital-to-analog conversion module, and the duty ratio of an input signal and the voltage of a drain terminal of the power amplification module are respectively controlled, so that the output power is controlled.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (10)
1. A class E power amplifier based power control circuit, comprising:
the digital control module is used for generating and outputting digital control bits corresponding to the target power value;
the input end of the digital-to-analog conversion module is connected to the output end of the digital control module and used for converting the digital control bit into corresponding direct current bias voltage and outputting the direct current bias voltage through a first output port;
the input side of the power amplification module is provided with a bias circuit, a bias node of the bias circuit is connected to the first output port, an external square wave signal is input to the power amplification module through the bias circuit, the square wave signal is a non-ideal square wave signal, and the direct current bias voltage is used for changing the direct current bias of the square wave signal so as to adjust the duty ratio of the signal input to the power amplification module, so that the output power of the power amplification module is adjusted.
2. The class-E power amplifier based power control circuit of claim 1, wherein the digital-to-analog conversion module is further configured to convert the digital control bits into corresponding reference voltages and output the reference voltages through a second output port, the power control circuit further comprising:
and the input of the low-dropout linear regulator is connected with the second output port, the output of the low-dropout linear regulator is connected with a drain voltage input port of a power amplifier in the power amplification module, and the low-dropout linear regulator is used for regulating the drain voltage output to the drain of the power amplifier according to the reference voltage so as to regulate the output power of the power amplification module.
3. The class-E power amplifier based power control circuit of claim 2, wherein the low dropout linear regulator comprises an error amplifier and a regulating tube; the inverting input end of the error amplifier is connected with the second output port, the non-inverting input end of the error amplifier is directly connected to the output end of the adjusting tube, and the output end of the error amplifier is connected to the input end of the adjusting tube;
the error amplifier is used for comparing the output voltage of the adjusting tube with the reference voltage and outputting a control signal to control the grid voltage of the adjusting tube according to the comparison result until the output voltage of the adjusting tube is equal to the reference voltage.
4. A class-E power amplifier based power control circuit according to claim 2 or 3, wherein the low dropout linear regulator comprises a differential input stage, a buffer stage and a power stage connected in sequence, and the differential input stage and the buffer stage are in a fully differential structure.
5. The class-E power amplifier based power control circuit according to any of claims 1-3, wherein the power amplification module comprises a switch M3, a switch M4, and a CMOS transmission gate;
one end of the CMOS transmission gate is used as a voltage input port of a drain end of a power amplifier in the power amplification module, and the other end of the CMOS transmission gate is connected with a drain electrode of the switch tube M3;
the switching tube M3 and the switching tube M4 form a cascode structure; the switch tube M3 is a conduction tube and is used for conducting and dividing voltage; the switching tube M4 is a power amplifier tube, and is configured to perform power amplification on a signal input to the power amplification module.
6. The class-E power amplifier based power control circuit of claim 5, wherein the power amplification module further comprises a capacitor C1, a capacitor C2, an inductor L1, and an inductor L2;
the inductor L1 is connected between the CMOS transmission gate and the switch tube M3; one end of the capacitor C1 is connected with the drain electrode of the switch tube M3, and the other end is grounded; the drain of the switching tube M3 is connected to the inductor L2 and the capacitor C2 in sequence to form the output end of the power amplification module, or the drain of the switching tube M3 is connected to the capacitor C2 and the inductor L2 in sequence to form the output end of the power amplification module;
the capacitor C1, the capacitor C2, the inductor L1 and the inductor L2 are used for adjusting the voltage waveform and the current waveform after power amplification, so that the voltage waveform and the current waveform are not overlapped to reduce useless power consumption.
7. The class-E power amplifier-based power control circuit of claim 1, further comprising an inverter connected between an input terminal of the power control circuit and an input node of the bias circuit, wherein an external square wave signal is sequentially inputted to the power amplification module after passing through the inverter and the bias circuit.
8. The class-E power amplifier based power control circuit as claimed in claim 1 or 7, wherein the bias circuit comprises a resistor R1 and a capacitor C3, one end of the resistor R1 is connected to the first output port as the bias node, the other end of the resistor R1 is connected to one end of the capacitor C3, the other end of the capacitor C3 is used as an input node of the bias circuit for receiving an external square wave signal, and an input of the power amplification module is connected to a connection point of the resistor R1 and the capacitor C3.
9. The class-E power amplifier based power control circuit of claim 1, wherein the digital-to-analog conversion module comprises:
one end of the series resistance voltage division circuit is grounded, and the other end of the series resistance voltage division circuit inputs a preset voltage;
and the multi-channel numerical control MOS switch is used for receiving the digital control bit and gating a corresponding branch in the series resistance voltage division circuit to obtain and output the direct current bias voltage.
10. The class E power amplifier based power control circuit as claimed in claim 9, wherein the number of series resistors in the series resistor divider circuit is determined by the power regulation step of the power control circuit, and the resistance of the series resistor divider circuit is determined by the system static power consumption constraint, the node parasitic capacitance of the next stage circuit driven by the power control circuit, and the required switching rate.
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| CN202111025129.4A CN113922777A (en) | 2021-09-02 | 2021-09-02 | Power control circuit based on class E power amplifier |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117176096A (en) * | 2023-09-22 | 2023-12-05 | 深圳市恒运昌真空技术有限公司 | Signal amplifying circuit, device and control method based on hybrid power amplifier |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117176096A (en) * | 2023-09-22 | 2023-12-05 | 深圳市恒运昌真空技术有限公司 | Signal amplifying circuit, device and control method based on hybrid power amplifier |
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