CN108566165B - Control circuit, power amplification circuit and control method - Google Patents
Control circuit, power amplification circuit and control method Download PDFInfo
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- CN108566165B CN108566165B CN201810260419.9A CN201810260419A CN108566165B CN 108566165 B CN108566165 B CN 108566165B CN 201810260419 A CN201810260419 A CN 201810260419A CN 108566165 B CN108566165 B CN 108566165B
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- 239000000126 substance Substances 0.000 claims description 3
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- 239000013643 reference control Substances 0.000 description 15
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/213—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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Abstract
The invention discloses a control circuit, which is applied to a power amplification circuit, wherein the power amplification circuit comprises a first transistor, a second transistor and a third transistor; the third transistor is directly connected with a power supply through an inductor; the control circuit includes: the waveform shaping circuit is used for generating a first current by using a reference voltage control signal of the power amplifying circuit, and comparing the first current with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; the first grid voltage is used for controlling the first transistor to amplify an input signal by the second transistor to obtain an output signal; and a voltage generation circuit for generating a second gate voltage using the first gate voltage and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage. The invention also discloses a power amplifying circuit and a control method.
Description
Technical Field
The present invention relates to power amplifier circuits, and particularly to a control circuit, a power amplifier circuit and a control method.
Background
At present, as a Silicon On Insulator (SOI) process On an insulating substrate becomes more mature, a Power Amplifier (PA) implemented by using the SOI process has a cost advantage. In a conventional power control circuit of a GSM radio frequency power amplifier, a reference control voltage VRAMP controls a collector voltage of the GSM radio frequency power amplifier through a Low DropOut regulator (LDO) to control output power of the GSM radio frequency power amplifier, and the LDO includes an error amplifier and a power transistor.
However, at present, the output power of the GSM radio frequency power amplifier is controlled by the LDO, and the collector voltage Vout of the GSM radio frequency power amplifier is always smaller than the power supply voltage VBAT due to the voltage drop generated by the power transistor of the LDO, so that the maximum output power of the GSM radio frequency power amplifier is reduced, and the efficiency of the GSM radio frequency power amplifier is reduced.
At present, a technical solution for improving the maximum output power and efficiency of the rf power amplifier needs to be found.
Disclosure of Invention
In order to solve the existing technical problems, embodiments of the present invention provide a control circuit, a power amplification circuit and a control method.
The technical scheme of the embodiment of the invention is realized as follows:
the embodiment of the invention provides a control circuit, which is applied to a power amplification circuit, wherein the power amplification circuit comprises a first transistor, a second transistor and a third transistor; the third transistor is directly connected with a power supply through an inductor; the control circuit includes:
the waveform shaping circuit is used for generating a first current by using a reference voltage control signal of the power amplifying circuit, and comparing the first current with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; the first grid voltage is used for controlling the first transistor to amplify an input signal by the second transistor to obtain an output signal;
and a voltage generation circuit for generating a second gate voltage using the first gate voltage and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage.
In the foregoing solution, the voltage generating circuit is specifically configured to generate at least one second gate voltage by using the first gate voltage, at least one resistor, and a current source; each second gate voltage controls one third transistor and outputs the output signal satisfying a stable output characteristic.
In the above scheme, the current source is a constant current source or a voltage-controlled current source that is negatively correlated with a power supply.
An embodiment of the present invention provides a power amplification circuit, including: the transistor comprises a first transistor, a second transistor, a third transistor and a control circuit; wherein the content of the first and second substances,
the drain electrode of the first transistor is connected with the source electrode of the second transistor; the drain electrode of the third transistor is directly connected with a power supply through an inductor;
the second transistor is used for controlling the first transistor to amplify an input signal of the power amplification circuit to obtain an output signal and outputting the output signal to the third transistor;
the control circuit includes: the waveform shaping circuit is used for generating a first current by using a reference voltage control signal of the power amplifying circuit, and comparing the first current with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; and a voltage generation circuit for generating a second gate voltage using the first gate voltage and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage.
In the foregoing solution, the voltage generating circuit is specifically configured to generate at least one second gate voltage by using the first gate voltage, at least one resistor, and a current source; each second gate voltage controls one third transistor and outputs the output signal satisfying a stable output characteristic.
In the above scheme, the current source is a constant current source or a voltage-controlled current source that is negatively related to a power supply.
The embodiment of the invention provides a control method, which comprises the following steps:
generating a first current by using a reference voltage control signal of the power amplification circuit, and comparing the first current with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; the first grid voltage is used for controlling the first transistor to amplify an input signal by the second transistor to obtain an output signal;
and generating a second gate voltage using the first gate voltage, and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage.
In the foregoing solution, the generating a second gate voltage using the first gate voltage and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage includes:
generating at least one second gate voltage using the first gate voltage and at least one resistor and a current source; each second gate voltage controls one third transistor and outputs the output signal satisfying a stable output characteristic.
In the above scheme, the current source is a constant current source or a voltage-controlled current source that is negatively correlated with a power supply.
The control circuit, the power amplification circuit and the control method provided by the embodiment of the invention can be applied to the power amplification circuit comprising the first transistor, the second transistor and the third transistor, wherein the third transistor is directly connected with a power supply through an inductor; in practical application, a reference voltage control signal of the power amplification circuit can be used for generating a first current, and the first current is compared with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; the first grid voltage is used for controlling the first transistor to amplify an input signal by the second transistor to obtain an output signal; and generating a second gate voltage using the first gate voltage, and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage. In the embodiment of the invention, the control circuit processes the input signal, and the voltage of the reference voltage control signal is adopted to control the power output of the power amplifier, so that the third transistor in the power amplifier circuit can output an output signal meeting the stable output characteristic, and thus, the phenomenon that the maximum output power of the power amplifier circuit is reduced because a power supply is connected with a collector of the power amplifier through the power transistor to generate extra voltage drop in the prior art can be avoided; that is to say, the embodiment of the invention can improve the maximum output power of the power amplifying circuit, thereby improving the working efficiency of the power amplifying circuit.
In addition, in the embodiment of the invention, the control circuit is used for replacing the LDO circuit in the prior art, so that the occupied area of a chip can be reduced, and the cost can be further reduced.
Drawings
FIG. 1 is a schematic diagram of a power control circuit of a GSM RF power amplifier in the related art;
FIG. 2 is a schematic diagram of a control circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a power amplifier circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of an internal configuration of a waveform shaping circuit according to an embodiment of the present invention;
FIG. 5 is a diagram illustrating the relationship between the gate control voltage Vg2 and the reference control voltage VRAMP according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of an internal structure of a voltage generating circuit according to an embodiment of the present invention;
FIG. 7 is a diagram illustrating a relationship between a power voltage VBAT and a current source Ib according to an embodiment of the present invention;
FIG. 8 is a first schematic diagram illustrating an internal structure of a power amplifier circuit according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of a second exemplary internal component structure of a power amplifier circuit according to the present invention;
fig. 10 is a flow chart of the control method according to the embodiment of the present invention.
Detailed Description
Generally, a power amplifier includes a GSM radio frequency power amplifier, etc., fig. 1 is a schematic diagram of a power control circuit of the GSM radio frequency power amplifier, and a power control process of the power control circuit shown in fig. 1 specifically includes: when the reference control voltage VRAMP is increased, the source end voltage Vout of the power transistor is increased, and further the collector voltage of the GSM radio frequency power amplifier is increased, so that the output power of the GSM radio frequency power amplifier is increased according to the square relation with the drain end voltage Vout; when the reference control voltage VRAMP is decreased, the source terminal voltage Vout of the power transistor is caused to decrease, which in turn causes the collector voltage of the GSM rf power amplifier to decrease, causing the GSM rf power amplifier output power to decrease in a squared relationship with the drain terminal voltage Vout. The power transistor belongs to an LDO circuit.
However, currently, the control of the output power of the GSM rf power amplifier is realized through the LDO, which has the following disadvantages: firstly, because the power transistor of the LDO generates a voltage drop, the collector voltage Vout of the GSM rf power amplifier is always smaller than the power supply voltage VBAT, thereby reducing the maximum output power of the GSM rf power amplifier and reducing the efficiency of the GSM rf power amplifier. And secondly, the LDO has large size, so that the occupied area of a chip is large, and the design cost is increased.
Based on this, in various embodiments of the invention: when the reference voltage control circuit is actually applied to a power amplification circuit, a first current is generated by using a reference voltage control signal of the power amplification circuit, and the first current is compared with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; the first grid voltage is used for controlling the first transistor to amplify an input signal by the second transistor to obtain an output signal; and generating a second gate voltage using the first gate voltage, and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage. The power amplification circuit comprises a first transistor, a second transistor and a third transistor; the third transistor is directly connected to a power supply via an inductor.
Fig. 2 is a schematic diagram of a composition structure of an embodiment of a control circuit according to the present invention, and as shown in fig. 2, the control circuit provided in this embodiment includes:
the waveform shaping circuit 21 is configured to generate a first current by using a reference voltage control signal of the power amplification circuit, and compare the first current with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; the first grid voltage is used for controlling the first transistor to amplify an input signal by the second transistor to obtain an output signal;
and a voltage generating circuit 22 for generating a second gate voltage using the first gate voltage and controlling the third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage.
Here, the control circuit may be applied to a GSM radio frequency power amplification circuit; the GSM radio frequency power amplifying circuit can comprise a first transistor, a second transistor and a third transistor; the third transistor is directly connected to a power supply via an inductor.
When the waveform shaping circuit is actually applied to a GSM radio frequency power amplifying circuit, the waveform shaping circuit 21 generates a first gate voltage and acts on the second transistor, and controls the drain voltage of the first transistor through the second transistor, so that the first transistor enters a saturation region from a linear region, and a radio frequency input signal is amplified to obtain a radio frequency output signal. The relation between the first grid voltage and the voltage of the reference voltage control signal, namely the reference control voltage, is a direct proportion relation, and the initial point of the reference control voltage can be shifted, so that the GSM radio frequency power amplifier formed by the second transistor controlled by the first grid voltage meets the index requirements of GSM forward isolation and the like.
In an embodiment, the voltage generating circuit 22 is specifically configured to generate at least one second gate voltage by using the first gate voltage and at least one resistor and one current source; each second gate voltage controls one third transistor and outputs the output signal satisfying a stable output characteristic. Wherein the current source is a constant current source or a voltage-controlled current source which is negatively related to a power supply.
When the voltage generating circuit 22 is actually applied to a GSM radio frequency power amplifying circuit, the voltage generating circuit generates a second gate voltage by using the first gate voltage and a voltage drop generated by a current source on a resistor. When the power supply does not change, the current source is a constant current source, and the voltage difference between the second grid voltage and the first grid voltage is a fixed value; when the power supply changes, the current source is a voltage-controlled current source which is in negative correlation with the power supply, the voltage difference between the second grid voltage and the first grid voltage can be adjusted through the voltage-controlled current source which is in negative correlation with the power supply, so that the change of the output power of the power amplifier caused by the change of the power supply can be counteracted, the voltage compensation is carried out on the voltage of the power supply, and the third transistor is controlled by the adjusted second grid voltage to output the output signal meeting the stable output characteristic. The stable output characteristic may be that the Power of the output signal changes with Time and satisfies a specific relationship curve, and the specific relationship curve may be a Power Time template (PVT, Power Vs Time) curve.
The third transistor is directly connected with the power supply through the inductor, so that the phenomenon that the maximum output power of the power amplification circuit is reduced due to extra voltage drop generated by connecting the power supply voltage with the collector of the power amplifier through the power transistor in the prior art can be avoided.
In the embodiment of the present invention, the waveform shaping circuit 21 generates a first current by using a reference voltage control signal of the power amplifying circuit, and compares the first current with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; the voltage generation circuit 22 generates a second gate voltage using the first gate voltage, and controls the third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage. The third transistor is directly connected with the power supply through the inductor, and the output signal meeting the stable output characteristic is output through the third transistor, so that the phenomenon that the maximum output power of the power amplification circuit is reduced due to the fact that the power supply is connected with the collector of the power amplifier through the power transistor to generate extra voltage drop in the prior art is avoided.
In addition, in the embodiment of the invention, the control circuit is used for replacing the LDO circuit in the prior art, so that the occupied area of a chip can be reduced, and the cost can be further reduced.
As shown in fig. 3, the power amplifying circuit provided in the embodiment of the present invention includes: a first transistor 31, a second transistor 32, a third transistor 33, and a control circuit 34; wherein the content of the first and second substances,
the drain electrode of the first transistor 31 is connected with the source electrode of the second transistor 32; the drain of the third transistor 33 is directly connected to a power supply via an inductor;
the second transistor 32 is configured to control the first transistor 31 to amplify an input signal of the power amplification circuit to obtain an output signal, and output the output signal to the third transistor 33;
the control circuit 34 includes: the waveform shaping circuit 21 is configured to generate a first current by using a reference voltage control signal of the power amplification circuit, and compare the first current with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; and a voltage generating circuit 22 for generating a second gate voltage using the first gate voltage and controlling the third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage.
Here, the power amplifying circuit may be a GSM radio frequency power amplifying circuit. The GSM radio frequency power amplifying circuit may include a first transistor 31, a second transistor 32, and a third transistor 33; the third transistor 33 is directly connected to the power supply via an inductor.
In practical application, the waveform shaping circuit 21 generates a first gate voltage and acts on the second transistor 32, and controls the drain voltage of the first transistor 31 through the second transistor 32, so that the first transistor 31 enters a saturation region from a linear region, thereby amplifying a radio frequency input signal to obtain a radio frequency output signal. The relation between the first grid voltage and the voltage of the reference voltage control signal, namely the reference control voltage, is a direct proportion relation, and the initial point of the reference control voltage can be shifted, so that the GSM radio frequency power amplifier formed by the second transistor controlled by the first grid voltage meets the index requirements of GSM forward isolation and the like.
In an embodiment, the voltage generating circuit 22 is specifically configured to generate at least one second gate voltage by using the first gate voltage and at least one resistor and one current source; each second gate voltage controls one third transistor 33 and outputs the output signal satisfying stable output characteristics. The current source is a constant current source or a voltage-controlled current source which is in negative correlation with a power supply.
In practical applications, the voltage generating circuit 22 generates the second gate voltage by using the first gate voltage and a voltage drop generated by the current source across the resistor. When the power supply does not change, the current source is a constant current source, and the voltage difference between the second grid voltage and the first grid voltage is a fixed value; when the power supply changes, the current source is a voltage-controlled current source which is in negative correlation with the power supply, the voltage difference between the second gate voltage and the first gate voltage can be adjusted by the voltage-controlled current source which is in negative correlation with the power supply, so that the change of the output power of the power amplifier caused by the change of the power supply can be counteracted, the voltage compensation is carried out on the voltage of the power supply, and the third transistor 33 is controlled by the adjusted second gate voltage to output the output signal which meets the stable output characteristic.
Here, the third transistor 33 is directly connected to the power supply via an inductor, which can avoid the phenomenon that the maximum output power of the power amplifier circuit is reduced due to an extra voltage drop generated by connecting the power supply voltage to the collector of the power amplifier via the power transistor in the prior art, that is, the third transistor 33 is directly connected to the power supply via the inductor, which is equivalent to that the collector voltage of the power amplifier can be equal to the power supply voltage, and since the collector voltage of the power amplifier is increased, the maximum output power and efficiency of the power amplifier circuit can be increased.
The embodiment shown in fig. 4 is a specific application example of the waveform shaping circuit shown in fig. 2.
In the present embodiment, as shown in fig. 4, the waveform shaping circuit 21 includes: the error amplifier, a PMOS tube M1, a PMOS tube M2, a current source Io, a resistor R1 and a resistor R2; the operating principle of the waveform shaping circuit 21 shown in fig. 4 is: the Gate control voltage Vg2 that controls the second transistor is obtained using the reference control voltage VRAMP.
The specific operation process of the waveform shaping circuit shown in fig. 4 includes: at node a, when the positive phase voltage of the error amplifier is equal to the negative phase voltage, i.e., VRAMP, a first current I is generated across resistor R1; using the node current principle, the current I1 is equal to the first current I minus the current source Io; the PMOS tube M1 and the PMOS tube M2 form a current mirror, namely the current I2 is equal to M times of the current I1; the gate control voltage Vg2 is equal to the voltage drop that the current I2 produces across the resistor R2. Fig. 5 shows a relationship between the gate control voltage Vg2 and the reference control voltage VRAMP.
The gate control voltage Vg2 is expressed by the following formula:
Vg2＝(VRAMP/R1-Io)×M×R2 (1)
in the formula (1), R1 and R2 represent the resistances of the resistors R1 and R2, respectively, and Io represents the current value of the current source Io, and it can be seen from the formula (1) that the gate control voltage Vg2 increases with the increase of the reference control voltage VRAMP, and the offset voltage VosX becomes Io × R1.
In practical application, the offset VosX is carried out on the starting point of the reference control voltage VRAMP, so that the GSM radio frequency power amplifier formed by the second transistor controlled by the first gate voltage Vg2 can meet the index requirements of GSM forward isolation and the like; where the offset value VosX for VRAMP may be greater than 0 and the offset value for Vg2 may be equal to 0.
The embodiment shown in fig. 6 is another specific application example of the voltage generation circuit shown in fig. 2.
In the present embodiment, as shown in fig. 6, the voltage generation circuit 22 includes: PMOS transistor M3, resistance R3, resistance R4, current source Ib. The current source Ib may be a constant current source, or may be a voltage-controlled current source negatively related to the power supply voltage VBAT.
The operating principle of the voltage generation circuit 22 shown in fig. 6 is: generating gate control voltages Vg3, Vg4 using the gate control voltage Vg2 generated in fig. 4; when Vg2 changes with VRAMP and the power supply voltage VBAT does not change, the voltage difference between Vg3 and Vg2 is always unchanged, and the voltage difference between Vg4 and Vg3 is always unchanged.
The specific operation of the voltage generation circuit 22 shown in fig. 6 includes: when Vg2 controls the conduction of PMOS transistor M3, the turn-on voltage of PMOS transistor M3 is Vth; the gate control voltage Vg3 is equal to the sum of the voltage drop of the current source Ib across the resistor R3 and the turn-on voltage Vth of the PMOS transistor M3. The gate control voltage Vg3 can be expressed by the following formula:
Vg3＝Vg2+Vth+Ib×R3 (2)
in the formula (2), Ib represents the current value of the current source Ib, R3 represents the resistance value of the resistor R3, and it can be seen from the formula (2) that when the current source Ib is a constant current source, the voltage difference between Vg3 and Vg2 is a fixed value, and the fixed value is equal to Vth + Ib × R3.
When Vg2 controls the conduction of PMOS transistor M3, the turn-on voltage of PMOS transistor M3 is Vth; the gate control voltage Vg4 is equal to the sum of the voltage drop of the current source Ib across the resistor R4 and the gate control voltage Vg 3. The gate control voltage Vg4 can be expressed by the following formula:
Vg4＝Vg3+Ib×R4 (3)
in the formula (3), Ib represents the current value of the current source Ib, R3 and R4 represent the resistance values of the resistors R3 and R4, respectively, and it can be seen from the formula (3) that when the current source Ib is a constant current source, the voltage difference between Vg4 and Vg3 is a fixed value, and the fixed value is Ib × R4.
In practical application, when the power supply voltage VBAT changes, the current source Ib may be a voltage-controlled current source that is negatively related to the power supply voltage VBAT, and thus, when the power supply voltage VBAT gradually increases, the voltage difference between the gate control voltage Vg3 and Vg2 is reduced by the current source Ib that is negatively related to the power supply voltage, and the voltage difference between the gate control voltage Vg4 and Vg3 is reduced at the same time, so as to offset the increase in output power of the power amplifier caused by the increase in the power supply voltage VBAT, and output of an output signal that meets stable output characteristics is achieved. Fig. 7 shows a relationship between the power supply voltage VBAT and the current source Ib.
The embodiment shown in fig. 8 is a specific application example of the power amplifying circuit shown in fig. 3.
In the present embodiment, as shown in fig. 8, the power amplification circuit 41 includes: an NMOS tube M4, an NMOS tube M5, an NMOS tube M6, an inductor RF clock, a bias filter circuit, a bias circuit, a waveform shaping circuit 21, a voltage generating circuit 22 and a voltage compensating circuit; wherein, the first transistor 31 is an NMOS transistor M4; the second transistor 32 is an NMOS transistor M5; the third transistor 33 is an NMOS transistor M6.
With reference to the schematic circuit structures shown in fig. 4 and 6, the operating principle of the power amplifier circuit 41 shown in fig. 8 is as follows: the Gate voltage Vg2 of an NMOS tube M5 in a cascode (cascode) power amplifier is directly controlled by a reference control voltage VRAMP through a waveform shaping circuit 21, and the Vg2 determines the drain voltage Vx of the NMOS tube M4. As Vx gradually increases, NMOS transistor M4 gradually goes from the linear region to the saturation region, thereby amplifying the rf input signal to obtain the rf output signal, resulting in a gradual increase of Id, and thus the output power of the power amplifier gradually increases. Wherein, when VRAMP increases, Vg2 increases; when VRAMP decreases, Vg2 decreases.
In practical application, the PMOS transistor M6 may be directly connected to the power supply voltage VBAT via the inductor RF Chock, so as to avoid the occurrence of the phenomenon of the maximum output power reduction of the power amplifier circuit caused by an extra voltage drop generated by the connection of the power supply voltage to the collector of the power amplifier via the power transistor in the prior art, that is, the NMOS transistor M6 is directly connected to the power supply voltage VBAT via the inductor RF Chock, which is equivalent to that the collector voltage of the power amplifier may be equal to the power supply voltage VBAT, thereby improving the maximum output power of the power amplifier circuit and improving the working efficiency of the power amplifier circuit.
Fig. 9 is an extension of the voltage generation circuit in fig. 8 for generating the second gate voltage, and the difference between fig. 9 and fig. 8 is that an NMOS transistor M7 is added, so that the voltage withstanding capability of the power amplifier can be increased. The operation principle of the circuit shown in fig. 9 is substantially similar to that of fig. 8, and will not be described again.
Based on the above embodiment circuit, an embodiment of the present invention provides a control method, as shown in fig. 10, the method includes the following steps:
step 1001: generating a first current by using a reference voltage control signal of the power amplification circuit, and comparing the first current with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current;
step 1002: and generating a second gate voltage using the first gate voltage, and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage.
Here, the first gate voltage is used for the second transistor to control the first transistor to amplify the input signal to obtain the output signal.
Here, the control method may be used to perform power control on the GSM radio frequency power amplification circuit; the GSM radio frequency power amplifying circuit can comprise a first transistor, a second transistor and a third transistor; the third transistor is directly connected to a power supply via an inductor.
In practical application, a reference voltage control signal of the power amplification circuit is utilized to generate a first current, and the first current is compared with a reference current value to obtain a second current; and generating a mirror current by using the second current, generating a first grid voltage by using the mirror current, wherein the first grid voltage acts on the second transistor, and controlling the drain voltage of the first transistor through the second transistor, so that the first transistor enters a saturation region from a linear region, and the radio frequency input signal is amplified to obtain a radio frequency output signal. The relation between the first grid voltage and the voltage of the reference voltage control signal, namely the reference control voltage, is a direct proportion relation, and the initial point of the reference control voltage can be shifted, so that the GSM radio frequency power amplifier formed by the second transistor controlled by the first grid voltage meets the index requirements of GSM forward isolation and the like.
In one embodiment, the generating a second gate voltage using the first gate voltage and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage includes: generating at least one second gate voltage using the first gate voltage and at least one resistor and a current source; each second gate voltage controls one third transistor and outputs the output signal satisfying a stable output characteristic. Wherein the current source is a constant current source or a voltage-controlled current source which is negatively related to a power supply.
In practical application, the first grid voltage and the voltage drop generated by the current source on the resistor are utilized to generate a second grid voltage. When the power supply does not change, the current source is a constant current source, and the voltage difference between the second grid voltage and the first grid voltage is a fixed value; when the power supply changes, the current source is a voltage-controlled current source which is in negative correlation with the power supply, the voltage difference between the second grid voltage and the first grid voltage can be adjusted through the voltage-controlled current source which is in negative correlation with the power supply, so that the change of the output power of the power amplifier caused by the change of the power supply can be counteracted, the voltage compensation is carried out on the voltage of the power supply, and the third transistor is controlled by the adjusted second grid voltage to output the output signal meeting the stable output characteristic. Wherein the stable output characteristic may be that the power of the output signal changes with time to satisfy a specific relation curve.
The third transistor is directly connected with the power supply through the inductor, so that the phenomenon that the maximum output power of the power amplification circuit is reduced due to extra voltage drop generated by connecting the power supply voltage with the collector of the power amplifier through the power transistor in the prior art can be avoided.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.
Claims (9)
1. The control circuit is applied to a power amplification circuit, and the power amplification circuit comprises a first transistor, a second transistor and a third transistor; the third transistor is directly connected with a power supply through an inductor; the control circuit includes:
the waveform shaping circuit is used for generating a first current by using a reference voltage control signal of the power amplifying circuit, and comparing the first current with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; the first grid voltage is used for controlling the first transistor to amplify an input signal by the second transistor to obtain an output signal;
and a voltage generation circuit for generating a second gate voltage using the first gate voltage and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage.
2. The control circuit of claim 1,
the voltage generation circuit is specifically configured to generate at least one second gate voltage by using the first gate voltage, at least one resistor, and a current source; each second gate voltage controls one third transistor and outputs the output signal satisfying a stable output characteristic.
3. The control circuit of claim 2, wherein the current source is a constant current source or a voltage controlled current source that is negatively related to a power supply.
4. A power amplification circuit, comprising: the transistor comprises a first transistor, a second transistor, a third transistor and a control circuit; wherein the content of the first and second substances,
the drain electrode of the first transistor is connected with the source electrode of the second transistor; the drain electrode of the third transistor is directly connected with a power supply through an inductor;
the second transistor is used for controlling the first transistor to amplify an input signal of the power amplification circuit to obtain an output signal and outputting the output signal to the third transistor;
the control circuit includes: the waveform shaping circuit is used for generating a first current by using a reference voltage control signal of the power amplifying circuit, and comparing the first current with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; and a voltage generation circuit for generating a second gate voltage using the first gate voltage and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage.
5. The power amplification circuit of claim 4,
the voltage generation circuit is specifically configured to generate at least one second gate voltage by using the first gate voltage, at least one resistor, and a current source; each second gate voltage controls one third transistor and outputs the output signal satisfying a stable output characteristic.
6. The power amplifier circuit according to claim 5, wherein the current source is a constant current source or a voltage-controlled current source that is negatively-dependent on a power supply.
7. A control method, characterized in that the method comprises:
generating a first current by using a reference voltage control signal of the power amplification circuit, and comparing the first current with a reference current value to obtain a second current; generating a mirror current by using the second current, and obtaining a first grid voltage by using the mirror current; the first grid voltage is used for controlling the first transistor to amplify an input signal by the second transistor to obtain an output signal;
and generating a second gate voltage using the first gate voltage, and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage.
8. The method of claim 7, wherein the generating a second gate voltage using the first gate voltage and controlling a third transistor to output the output signal satisfying a stable output characteristic using the second gate voltage comprises:
generating at least one second gate voltage using the first gate voltage and at least one resistor and a current source; each second gate voltage controls one third transistor and outputs the output signal satisfying a stable output characteristic.
9. The method of claim 8, wherein the current source is a constant current source or a voltage controlled current source that is negatively related to a power supply.
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| CN108462476B (en) * | 2018-02-08 | 2022-04-12 | 芯原微电子(上海)股份有限公司 | Power amplifier and power control method thereof |
| CN113315089B (en) * | 2021-05-27 | 2023-06-23 | 晶艺半导体有限公司 | High-power supply rejection ratio load switching circuit and control method thereof |
| CN113437944B (en) * | 2021-08-26 | 2021-11-26 | 广州慧智微电子有限公司 | Power amplifier and control method |
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| JP2017072911A (en) * | 2015-10-05 | 2017-04-13 | 株式会社村田製作所 | Current output circuit |
| CN105830342B (en) * | 2016-02-29 | 2018-10-16 | 香港应用科技研究院有限公司 | The harmonic suppression circuit of switch-mode power amplifier |
| CN105897201B (en) * | 2016-03-31 | 2019-01-25 | 宜确半导体（苏州）有限公司 | A kind of GSM radio-frequency power amplifier |
| CN107154785B (en) * | 2017-06-29 | 2023-12-01 | 广州慧智微电子股份有限公司 | Control circuit, power amplification circuit and method |
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