CN113868070B - SD card controller debugging method, system, storage medium and device - Google Patents
SD card controller debugging method, system, storage medium and device Download PDFInfo
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- CN113868070B CN113868070B CN202111115814.6A CN202111115814A CN113868070B CN 113868070 B CN113868070 B CN 113868070B CN 202111115814 A CN202111115814 A CN 202111115814A CN 113868070 B CN113868070 B CN 113868070B
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
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Abstract
The application provides a method, a system, a storage medium and equipment for debugging an SD card controller, wherein the method comprises the following steps: detecting whether the SD card is in place or not through a debugging state control module; if the SD card is in place, the upper computer sends the debugging data to the serial port receiving and transmitting control module and analyzes the debugging data to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents; the serial port receiving and dispatching control module respectively sends a plurality of pieces of frame data to the register module so as to respectively store the frame data into the register list according to the offset address; the debug state control module reads frame data in the register list, acquires an address of a target register in the SD card controller connected with the SD card based on the register content, initiates data reading or data writing operation to the target register, and performs data reading or data writing on the target register of the SD card controller through the APB interface so as to perform corresponding debugging. The application improves the debugging efficiency of the SD card controller.
Description
Technical Field
The present application relates to the field of information technologies, and in particular, to a method, a system, a storage medium, and an apparatus for debugging an SD card controller.
Background
The design and fabrication of ASIC (Application Specific Integrated Circuit ) is a very complex process, and in recent years, the chinese semiconductor industry has been developing into the fast traffic lane under the dual stimulus of policy and funds. ARM (Advanced RISC Machine) architecture has the characteristics of low cost, low power consumption, small volume and the like, so ARM-based architecture is widely adopted in ASIC design.
SD cards (Secure Digital Memory Card, secure digital memory cards, a common data storage device) are widely used as a storage device with the advantages of high security, high performance, small size, portability, hot plug capability, and the like. The SD card controller is a bridge for high-speed communication between the SD card and a high-performance system bus, and realizes the data reading and writing function of the ARM on the SD card.
In the prior art, the debugging of the functional module of the SD card controller inside the ASIC generally comprises the following ways: the special DFT circuit or simulator is used for debugging, wherein DFT is an integrated circuit design technology, and special structures are implanted into the circuit in the design stage so as to test after the design is finished. In the design process, the testability problem of the chip is solved by adding additional DFT circuits, adding logic, replacing elements, adding pins and the like. In addition, the ARM architecture-based chip can be connected with an emulator of an ARM company through JTAG (an international standard test protocol) for debugging, and after chip streaming is completed, the emulator is inconvenient to use in the initial stage of debugging of a plurality of functional modules, so that the debugging efficiency is greatly reduced. In addition, the debugging of the SD card controller can be performed only by debugging the ARM core, so that the debugging period is long, and the marketing period of the chip is prolonged.
Disclosure of Invention
Therefore, the present application is directed to a method, a system, a storage medium and a device for debugging an SD card controller, which are used for solving the problem of low debugging efficiency of the SD card controller in the prior art.
Based on the above purpose, the application provides a debugging method of an SD card controller, comprising the following steps:
detecting whether the SD card is in place or not through a debugging state control module;
responding to the bit of the SD card, transmitting debugging data to a serial port receiving and transmitting control module by an upper computer, and analyzing the debugging data by the serial port receiving and transmitting control module to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents;
the serial port receiving and dispatching control module sends a plurality of pieces of frame data to the register module respectively, so that the register module stores the plurality of pieces of frame data into the register list according to offset addresses respectively;
the debug state control module reads a plurality of pieces of frame data in the register list, acquires an address of a target register in the SD card controller connected with the SD card based on the register content in the register list, initiates data reading or data writing operation to the target register, and reads or writes data to the target register of the SD card controller based on the data reading or data writing operation through the APB interface so as to debug correspondingly.
In some embodiments, initiating a data reading or writing operation to a target register, and performing data reading or writing on the target register of the SD card controller based on the data reading or writing operation through the APB interface to perform debugging accordingly includes:
initiating data reading operation to a target register by a debugging state control module based on the register content of a plurality of pieces of frame data, and reading corresponding data from the target register through an APB interface based on the data reading operation;
and responding to the SD card controller, returning corresponding data to the debugging state control module through the APB interface, temporarily storing the corresponding data in a designated register of the register module by the debugging state control module, informing the serial port receiving and transmitting control module, and acquiring the corresponding data from the designated register by the serial port receiving and transmitting control module and transmitting the corresponding data to the upper computer.
In some embodiments, the method further comprises:
and responding to the corresponding data received by the upper computer, and acquiring the supported capability of the SD card controller from the corresponding data so as to determine the debugging content based on the supported capability.
In some embodiments, initiating a data reading or writing operation to a target register, and performing data reading or writing on the target register of the SD card controller based on the data reading or writing operation through the APB interface to perform debugging accordingly includes:
initiating data writing operation to a target register by the debug state control module based on the register content of the plurality of pieces of frame data, and writing the content in the appointed frame data in the plurality of pieces of frame data into the target register through the APB interface based on the data writing operation.
In some embodiments, detecting, by the debug status control module, whether the SD card is in place includes:
and the debugging state control module queries a register related to the SD card in-place information in the SD card controller at fixed time intervals so as to detect whether the SD card is in place or not.
In some embodiments, parsing the debug data by the serial port transceiver control module includes:
responding to the serial port receiving and transmitting control module to receive debugging data with a fixed frame format, and judging whether the frame head and the frame tail of the debugging data are correct;
and responding to the correctness of the frame head and the frame tail of the debug data, and analyzing the debug data by the serial port transceiving control module.
In some embodiments, performing data reading or data writing on a target register of the SD card controller based on the operation of reading or writing data through the APB interface to perform debugging accordingly includes:
and performing data reading or data writing on a target register of the SD card controller through a system bus based on data reading or data writing operation through the APB interface so as to perform corresponding debugging.
In another aspect of the present application, there is also provided an SD card controller debugging system, including:
the detection module is configured to detect whether the SD card is in place or not through the debugging state control module;
the analysis module is configured to respond to the positioning of the SD card, send the debug data to the serial port receiving and transmitting control module by the upper computer, and analyze the debug data by the serial port receiving and transmitting control module so as to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents;
the frame data storage module is configured to send a plurality of pieces of frame data to the register module respectively by the serial port receiving and transmitting control module so that the register module stores the plurality of pieces of frame data into the register list respectively according to the offset address; and
the SD card controller debugging module is configured to read a plurality of pieces of frame data in the register list by the debugging state control module, acquire an address of a target register in the SD card controller connected with the SD card based on the content of the register, initiate data reading or data writing operation to the target register, and perform data reading or data writing on the target register of the SD card controller based on the data reading or data writing operation through the APB interface so as to perform corresponding debugging.
In yet another aspect of the present application, there is also provided a computer readable storage medium storing computer program instructions which, when executed by a processor, implement the above-described method.
In yet another aspect of the present application, there is also provided a computer device comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, performs the above method.
The application has at least the following beneficial technical effects:
according to the debugging method of the chip SD card controller based on the ARM architecture, the debugging data sent by the upper computer is analyzed through the serial port receiving and transmitting control module to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents, the frame data are stored in the register list according to the offset addresses, the frame data in the register list are read by the debugging state control module, and the APB interface is controlled to read or write data to the SD card controller, so that corresponding debugging is carried out.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings that are necessary for the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the application and that other embodiments may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an SD card controller debugging method according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a debug architecture of an SD card controller according to an embodiment of the present application;
FIG. 3 is a schematic diagram of an SD card controller debugging system according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a computer readable storage medium implementing a method for debugging an SD card controller according to an embodiment of the present application;
fig. 5 is a schematic hardware structure diagram of a computer device for executing the method for debugging the SD card controller according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the following embodiments of the present application will be described in further detail with reference to the accompanying drawings.
It should be noted that, in the embodiments of the present application, all the expressions "first" and "second" are used to distinguish two non-identical entities with the same name or non-identical parameters, and it is noted that the "first" and "second" are only used for convenience of expression, and should not be construed as limiting the embodiments of the present application. Furthermore, the terms "comprise" and "have," and any variations thereof, are intended to cover a non-exclusive inclusion, such as a process, method, system, article, or other step or unit that comprises a list of steps or units.
Based on the above object, in a first aspect of the embodiments of the present application, an embodiment of a method for debugging an SD card controller is provided. Fig. 1 is a schematic diagram of an embodiment of an SD card controller debugging method provided by the present application. As shown in fig. 1, the embodiment of the present application includes the following steps:
step S10, detecting whether the SD card is in place or not through a debugging state control module;
step S20, responding to the SD card in place, transmitting debugging data to a serial port receiving and transmitting control module by an upper computer, and analyzing the debugging data by the serial port receiving and transmitting control module to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents;
step S30, a serial port receiving and dispatching control module respectively sends a plurality of pieces of frame data to a register module, so that the register module respectively stores the plurality of pieces of frame data into a register list according to offset addresses;
step S40, a debugging state control module reads a plurality of pieces of frame data in a register list, obtains an address of a target register in an SD card controller connected with the SD card based on the content of the register, initiates data reading or data writing operation to the target register, and performs data reading or data writing on the target register of the SD card controller based on the data reading or data writing operation through an APB interface so as to carry out corresponding debugging.
According to the debugging method of the chip SD card controller based on the ARM architecture, the debugging data sent by the upper computer is analyzed through the serial port transceiving control module to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents, the frame data are stored in the register list according to the offset addresses, the frame data in the register list are read by the debugging state control module, and the APB interface is controlled to read or write data for the SD card controller, so that corresponding debugging is carried out.
In some embodiments, parsing the debug data by the serial port transceiver control module includes: responding to the serial port receiving and transmitting control module to receive debugging data with a fixed frame format, and judging whether the frame head and the frame tail of the debugging data are correct; and responding to the correctness of the frame head and the frame tail of the debug data, and analyzing the debug data by the serial port transceiving control module.
In some embodiments, initiating a data reading or writing operation to a target register, and performing data reading or writing on the target register of the SD card controller based on the data reading or writing operation through the APB interface to perform debugging accordingly includes: initiating data reading operation to a target register by a debugging state control module based on the register content of a plurality of pieces of frame data, and reading corresponding data from the target register through an APB interface based on the data reading operation; and responding to the SD card controller, returning corresponding data to the debugging state control module through the APB interface, temporarily storing the corresponding data in a designated register of the register module by the debugging state control module, informing the serial port receiving and transmitting control module, and acquiring the corresponding data from the designated register by the serial port receiving and transmitting control module and transmitting the corresponding data to the upper computer.
In some embodiments, initiating a data reading or writing operation to a target register, and performing data reading or writing on the target register of the SD card controller based on the data reading or writing operation through the APB interface to perform debugging accordingly includes: initiating data writing operation to a target register by the debug state control module based on the register content of the plurality of pieces of frame data, and writing the content in the appointed frame data in the plurality of pieces of frame data into the target register through the APB interface based on the data writing operation.
Fig. 2 is a schematic diagram of an SD card controller debugging structure according to an embodiment of the present application. As shown in fig. 2, the SD card controller debugging structure includes a serial port transceiver control module, a register module, an APB interface module, a debug status control module, and an upper computer automatic test flow. The serial port transceiving control module completes serial port protocol analysis based on UART (universal asynchronous receiver Transmitter) serial port protocol, and connects TX, RX, GND chip pins with an upper computer serial port to complete the transceiving work of debugging data of the upper computer. The register module is composed of a plurality of registers, is mainly used for analyzing serial data and controlling an APB (Advanced Peripheral Bus, peripheral bus) interface to be communicated with the SD card controller, and mainly comprises starting debugging control, read-write direction control, destination register address of the SD card controller, destination register read data of the SD card controller, destination register write data of the SD card controller and the like. The APB interface is connected with the APB interface of the system bus, and based on the APB bus protocol, registers in the SD card controller are accessed through the system bus to fulfill the aim of debugging the SD card controller. The debugging state control module is a core module, when receiving data sent by the upper computer through the serial port, the debugging state control module stores the data received by the serial port receiving and transmitting control module into the register module, and then controls the APB interface to access a target register of the SD card controller according to the content of the register module.
The serial port receiving and transmitting control module is based on a UART serial port protocol, wherein the baud rate is 115200,1 bits of initial bits, 8 bits of data bits, 1 bit of stop bits and 1 bit of check bits. The frame format is shown in table 1 below:
TABLE 1 frame data format
| 0x55 | 0xAA | Offset of | Register content (32 bits) | 0xBB | 0xCC |
The register list definition of the register module is shown in table 2 below:
table 2 register list definition
When the target register of the SD card controller needs to be read in debugging, the flow is as follows: the upper computer sends debugging data through the serial port, the serial port receiving and transmitting control module receives the debugging data, and after verifying that the head and the tail of the frame are valid, the received debugging data are respectively stored in a register list of the register module according to the offset address. After capturing that the ctrl_reg bit31 bit with the offset address of 0x0 changes from 0 to 1, the debug state control module initiates the operation of reading and writing the SD card control register, and the reading or writing is determined by the ctrl_reg bit 0. If the read operation is performed, the debug state control module reads the register of the SD card controller through the APB interface and informs the SD card controller of addr_reg with the offset address of 0x 4. After the SD card controller returns the data of the corresponding address, the debugging state control module temporarily stores the data into the rddata_reg with the offset address of 0xA, and informs the serial port receiving and transmitting control module, and the serial port receiving and transmitting control module transmits the read data to the upper computer through the serial port.
As shown in the frame format of the read data in table 3 below, when a certain register of the SD card controller is to be read, first, the first frame data with offset address of 0x4 and register content of target register address is sent, so as to inform the current operation of the target register address of the debug system; the second frame data is offset address 0x0, the register content is 0x80000001, bit31 is changed from 0 to 1, the debugging state control module starts the process of executing the read-write register, and bit0 is 1, and the process is represented as the register reading process; the third frame of data is offset address 0x0, the register content is 0x0, the purpose is to clear the register content of offset address 0x0, and prepare for the next upper computer to initiate the register reading and writing process.
Table 3 frame format of read data
| 0x55 | 0xAA | 0x4 | Target register address | 0xBB | 0xCC |
| 0x55 | 0xAA | 0x0 | 0x80000001 | 0xBB | 0xCC |
| 0x55 | 0xAA | 0x0 | 0x00000000 | 0xBB | 0xCC |
When the target register of the SD card controller is required to be written in debugging, the flow is as follows: the upper computer sends debugging data through the serial port, the serial port receiving and transmitting control module receives the debugging data, and after verifying that the head and the tail of the frame are valid, the received debugging data are stored in a register list of the register module according to the offset address. After capturing that the ctrl_reg bit31 bit with the offset address of 0x0 changes from 0 to 1, the debug state control module initiates the operation of reading and writing the SD card control register, and the reading or writing is determined by the ctrl_reg bit 0. If the debug state control module is in the write operation, the debug state control module writes the address of addr_reg with the offset address of 0x4 into a register of the SD card controller through the APB interface, informs the SD card controller, and writes the content of wrdata_reg with the offset address of 0x8 into the corresponding register of the SD card controller.
When writing into a certain register of the SD card controller, as shown in the frame format of the write data in table 4 below, first, the first frame data with offset address 0x4 and register content as target register address is sent to inform the present debug system of the target register address of the present operation; the second frame of data is offset address 0x8, the register content is the data to be written in, in order to inform the debug system of the specific content written in by the present write operation; the third frame data is offset address 0x0, the register content is 0x80000000, bit31 is changed from 0 to 1, the debugging state control module starts the process of executing the read-write register, and bit0 is 0, the process is represented as the register writing process; the fourth frame data is offset address 0x0, the register content is 0x0, the purpose is to clear the register content of offset address 0x0, and prepare for the next upper computer to initiate the register reading and writing process.
Table 4 frame format of write data
| 0x55 | 0xAA | 0x4 | Target register address | 0xBB | 0xCC |
| 0x55 | 0xAA | 0x8 | Written data | 0xBB | 0xCC |
| 0x55 | 0xAA | 0x0 | 0x80000000 | 0xBB | 0xCC |
| 0x55 | 0xAA | 0x0 | 0x00000000 | 0xBB | 0xCC |
In some embodiments, the method further comprises: and responding to the corresponding data received by the upper computer, and acquiring the supported capability of the SD card controller from the corresponding data so as to determine the debugging content based on the supported capability.
In this embodiment, the upper computer reads the register content with the target address of 0x40 of the SD card controller, and obtains the supporting capability of the SD card controller to determine the debug content of the SD card controller, such as High Speed Support (high-speed supporting mode), max Block Length (maximum Block Length), SDMA supporting capability (SDMA supporting capability), and the like. After the register content with the target address of 0x40 of the SD card controller is read, the debug state control module controls the read data to be sent to the upper computer through the serial port, and a debugger can acquire the supporting capacity condition of the SD card controller from the upper computer.
In some embodiments, detecting, by the debug status control module, whether the SD card is in place includes: and the debugging state control module queries a register related to the SD card in-place information in the SD card controller at fixed time intervals so as to detect whether the SD card is in place or not.
In this embodiment, when the debug status control module enters the card_detect state, the upper computer is not required to send a debug instruction, and the debug status control module controls to poll the SD card controller Present State Register once every 100ms, and inquires the card inserted register bit, if it is 1, starts serial port reception, and the upper computer can send debug data to start the SD card controller debug.
In some embodiments, performing data reading or data writing on a target register of the SD card controller based on the operation of reading or writing data through the APB interface to perform debugging accordingly includes: and performing data reading or data writing on a target register of the SD card controller through a system bus based on data reading or data writing operation through the APB interface so as to perform corresponding debugging.
In other embodiments, the host computer completes the test of reading the internal registers of the SD card according to the configuration registers required for reading the internal registers of the SD card. In addition, the upper computer can sequentially configure the required registers according to the initialization flow of the SD card to finish the initialization of the SD card, so that the SD card enters a data transmission state. In addition, the PIO mode can be completed through the register port to carry out the data read-write debugging of the SD card. The upper computer writes the test program and the data to be tested, and the upper computer executes the register writing instruction in sequence.
In a second aspect of the embodiment of the application, a debug system of an SD card controller is also provided. Fig. 3 is a schematic diagram of an embodiment of an SD card controller debugging system provided by the present application. As shown in fig. 3, an SD card controller debugging system includes: a detection module 10 configured to detect whether the SD card is in place through the debug status control module; the parsing module 20 is configured to respond to the SD card in place, send debug data to the serial port transceiving control module by the host computer, and parse the debug data by the serial port transceiving control module to obtain a plurality of pieces of frame data respectively including offset addresses and corresponding register contents; the frame data storage module 30 is configured to send a plurality of pieces of frame data to the register module by the serial port transceiving control module respectively, so that the register module stores the plurality of pieces of frame data into the register list according to offset addresses respectively; and the SD card controller debug module 40 is configured to read a plurality of pieces of frame data in the register list by the debug status control module, obtain an address of a target register in the SD card controller connected with the SD card based on the register content therein, initiate an operation of reading or writing data to the target register, and perform data reading or writing to the target register of the SD card controller based on the operation of reading or writing data through the APB interface to perform corresponding debugging.
In a third aspect of the embodiment of the present application, a computer readable storage medium is provided, and fig. 4 is a schematic diagram of a computer readable storage medium for implementing the method for debugging an SD card controller according to an embodiment of the present application. As shown in fig. 4, the computer-readable storage medium 3 stores computer program instructions 31. The computer program instructions 31 when executed by a processor implement the method of any of the embodiments described above.
It should be understood that all of the embodiments, features and advantages set forth above for the SD card controller debugging method according to the present application equally apply to the SD card controller debugging system and storage medium according to the present application, without conflicting with each other.
In a fourth aspect of the embodiment of the present application, there is also provided a computer device, including a memory 402 and a processor 401 as shown in fig. 5, where the memory 402 stores a computer program, and the computer program is executed by the processor 401 to implement the method of any one of the embodiments above.
As shown in fig. 5, a hardware structure diagram of an embodiment of a computer device for executing the method for debugging an SD card controller according to the present application is shown. Taking the example of a computer device as shown in fig. 5, a processor 401 and a memory 402 are included in the computer device, and may further include: an input device 403 and an output device 404. The processor 401, memory 402, input device 403, and output device 404 may be connected by a bus or otherwise, for example in fig. 5. The input device 403 may receive input numeric or character information and generate key signal inputs related to user settings and function control of the SD card controller debugging system. The output 404 may include a display device such as a display screen.
The memory 402 is used as a non-volatile computer readable storage medium for storing non-volatile software programs, non-volatile computer executable programs and modules, such as program instructions/modules corresponding to the SD card controller debugging method in the embodiment of the present application. Memory 402 may include a storage program area that may store an operating system, at least one application program required for functionality, and a storage data area; the storage data area may store data created by use of the SD card controller debugging method, and the like. In addition, memory 402 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 402 may optionally include memory located remotely from processor 401, which may be connected to the local module via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The processor 401 executes various functional applications of the server and data processing, that is, implements the SD card controller debugging method of the above-described method embodiment, by running nonvolatile software programs, instructions, and modules stored in the memory 402.
Finally, it should be noted that the computer-readable storage media (e.g., memory) herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of example, and not limitation, nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which acts as external cache memory. By way of example, and not limitation, RAM may be available in a variety of forms such as synchronous RAM (DRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to comprise, without being limited to, these and other suitable types of memory.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that as used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items. The foregoing embodiment of the present application has been disclosed with reference to the number of embodiments for the purpose of description only, and does not represent the advantages or disadvantages of the embodiments.
Those of ordinary skill in the art will appreciate that: the above discussion of any embodiment is merely exemplary and is not intended to imply that the scope of the disclosure of embodiments of the application, including the claims, is limited to such examples; combinations of features of the above embodiments or in different embodiments are also possible within the idea of an embodiment of the application, and many other variations of the different aspects of the embodiments of the application as described above exist, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. of the embodiments should be included in the protection scope of the embodiments of the present application.
Claims (10)
1. The debugging method of the SD card controller is characterized by comprising the following steps of:
detecting whether the SD card is in place or not through a debugging state control module;
in response to the SD card being in place, transmitting debugging data to a serial port receiving and transmitting control module by an upper computer, and analyzing the debugging data by the serial port receiving and transmitting control module to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents;
the serial port receiving and dispatching control module respectively sends the plurality of pieces of frame data to the register module so that the register module respectively stores the plurality of pieces of frame data into a register list according to offset addresses;
the debug state control module reads the plurality of pieces of frame data in the register list, acquires an address of a target register in an SD card controller connected with the SD card based on the register content, initiates data reading or data writing operation to the target register, and performs data reading or data writing on the target register of the SD card controller based on the data reading or data writing operation through an APB interface so as to perform corresponding debugging.
2. The method of claim 1, wherein initiating a read or write operation to the target register and performing a data read or write to the target register of the SD card controller based on the read or write operation via an APB interface for a corresponding debug comprises:
initiating, by the debug status control module, a data reading operation to the target register based on the register contents of the plurality of pieces of frame data, and reading corresponding data from the target register through an APB interface based on the data reading operation;
and responding to the SD card controller to return the corresponding data to the debugging state control module through the APB interface, temporarily storing the corresponding data into a designated register of the register module by the debugging state control module, informing the serial port receiving and transmitting control module, and acquiring the corresponding data from the designated register by the serial port receiving and transmitting control module and sending the corresponding data to the upper computer.
3. The method as recited in claim 2, further comprising:
and responding to the upper computer to receive the corresponding data, and acquiring the supported capability of the SD card controller from the corresponding data so as to determine debugging content based on the supported capability.
4. The method of claim 1, wherein initiating a read or write operation to the target register and performing a data read or write to the target register of the SD card controller based on the read or write operation via an APB interface for a corresponding debug comprises:
initiating, by the debug status control module, a data writing operation to the target register based on register contents of the plurality of pieces of frame data, and writing contents in specified frame data in the plurality of pieces of frame data to the target register through an APB interface based on the data writing operation.
5. The method of claim 1, wherein detecting, by the debug status control module, whether the SD card is in place comprises:
and inquiring a register related to the SD card in-place information in the SD card controller by a debugging state control module at fixed time intervals so as to detect whether the SD card is in place.
6. The method of claim 1, wherein parsing the debug data by the serial port transceiver control module comprises:
responding to the serial port receiving and transmitting control module to receive the debug data with a fixed frame format, and judging whether the frame head and the frame tail of the debug data are correct;
and responding to the correctness of the frame head and the frame tail of the debug data, and analyzing the debug data by the serial port transceiving control module.
7. The method of claim 1, wherein performing data reading or data writing to the target register of the SD card controller based on the operations of reading or writing data through an APB interface to perform debugging accordingly comprises:
and performing data reading or data writing on the target register of the SD card controller through a system bus based on the data reading or data writing operation through an APB interface so as to perform corresponding debugging.
8. An SD card controller debugging system, comprising:
the detection module is configured to detect whether the SD card is in place or not through the debugging state control module;
the analysis module is configured to respond to the SD card in place, send debugging data to the serial port receiving and transmitting control module by the upper computer, and analyze the debugging data by the serial port receiving and transmitting control module so as to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents;
the frame data storage module is configured to send the plurality of pieces of frame data to the register module respectively by the serial port receiving and transmitting control module so that the register module stores the plurality of pieces of frame data into a register list according to offset addresses respectively; and
the SD card controller debugging module is configured to read the plurality of pieces of frame data in the register list by the debugging state control module, acquire an address of a target register in the SD card controller connected with the SD card based on the register content in the frame data, initiate data reading or data writing operation to the target register, and perform data reading or data writing on the target register of the SD card controller based on the data reading or data writing operation through an APB interface so as to carry out corresponding debugging.
9. A computer readable storage medium, characterized in that computer program instructions are stored, which, when executed by a processor, implement the method of any one of claims 1-7.
10. A computer device comprising a memory and a processor, wherein the memory has stored therein a computer program which, when executed by the processor, performs the method of any of claims 1-7.
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