CN113868070A - Debugging method, system, storage medium and equipment for SD card controller - Google Patents
Debugging method, system, storage medium and equipment for SD card controller Download PDFInfo
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- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
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Abstract
The invention provides a debugging method, a debugging system, a storage medium and a device of an SD card controller, wherein the method comprises the following steps: detecting whether the SD card is in place or not through a debugging state control module; if the SD card is in place, the upper computer sends debugging data to the serial port transceiving control module and analyzes the debugging data to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents; the serial port transceiving control module respectively sends the plurality of pieces of frame data to the register module so as to respectively store the frame data into the register list according to the offset addresses; and reading frame data in the register list by the debugging state control module, acquiring an address of a target register in the SD card controller connected with the SD card based on the register content in the frame data, initiating data reading or data writing operation to the target register, and performing data reading or data writing on the target register of the SD card controller through the APB interface so as to debug correspondingly. The invention improves the debugging efficiency of the SD card controller.
Description
Technical Field
The invention relates to the technical field of information, in particular to a debugging method, a debugging system, a storage medium and a device for an SD card controller.
Background
The design and manufacture of ASIC (Application Specific Integrated Circuit) is a very complicated process, and in recent years, the semiconductor industry in china has been driven into the express way under the dual stimulation of policy and capital. The ARM (advanced RISC machine) architecture has the characteristics of low cost, low power consumption, small volume and the like, so that the ARM-based architecture is widely adopted in ASIC design.
An SD Card (Secure Digital Memory Card, a common data storage device) is widely used as a storage device having the advantages of high security, high performance, small size, portability, hot-pluggable capability, and the like. The SD card controller is a bridge for high-speed communication between the SD card and a high-performance system bus, and the data read-write function of the SD card by the ARM is realized.
In the prior art, the debugging of the functional module of the SD card controller inside the ASIC generally has the following ways: debugging is performed by a special DFT circuit or a simulator, wherein DFT is an integrated circuit design technology, and special structures are implanted into a circuit in a design stage so as to perform testing after the design is completed. In the design process, by adding an extra DFT circuit, the testability problem of the chip is solved by adding logic, replacing elements, adding pins and the like. In addition, the chip based on the ARM architecture can be connected with an emulator of ARM company for debugging through JTAG (an international standard test protocol), and after chip flow is completed, the emulator is very inconvenient to use at the initial stage of debugging a plurality of functional modules, so that the debugging efficiency is greatly reduced. In addition, the debugging of the SD card controller can be performed only by performing the debugging of the ARM core first, which results in a long debugging period and a prolonged period of time for the chip to appear on the market.
Disclosure of Invention
In view of the above, an objective of the present invention is to provide a method, a system, a storage medium, and a device for debugging an SD card controller, so as to solve the problem of low debugging efficiency of the SD card controller in the prior art.
Based on the above purpose, the invention provides a debugging method of an SD card controller, which comprises the following steps:
detecting whether the SD card is in place or not through a debugging state control module;
responding to the SD card in place, sending the debugging data to the serial port transceiving control module by the upper computer, and analyzing the debugging data by the serial port transceiving control module to obtain a plurality of pieces of frame data respectively comprising the offset address and the corresponding register content;
the serial port transceiving control module respectively sends the plurality of pieces of frame data to the register module so that the register module respectively stores the plurality of pieces of frame data into the register list according to the offset addresses;
the debugging state control module reads a plurality of pieces of frame data in the register list, acquires the address of a target register in the SD card controller connected with the SD card based on the register content in the frame data, initiates the operation of reading or writing data to the target register, and reads or writes the data to the target register of the SD card controller through the APB interface based on the operation of reading or writing the data so as to debug correspondingly.
In some embodiments, initiating a read or write data operation to a target register, and performing a data read or write to the target register of the SD card controller through the APB interface based on the read or write data operation to debug accordingly comprises:
initiating a data reading operation to a target register by a debugging state control module based on the register content of a plurality of pieces of frame data, and reading corresponding data from the target register through an APB interface based on the data reading operation;
and responding to the SD card controller to return corresponding data to the debugging state control module through the APB interface, temporarily storing the corresponding data into a specified register of the register module by the debugging state control module, informing the serial port transceiving control module, acquiring the corresponding data from the specified register by the serial port transceiving control module, and sending the corresponding data to the upper computer.
In some embodiments, the method further comprises:
and in response to the upper computer receiving the corresponding data, acquiring the capabilities supported by the SD card controller from the corresponding data to determine debugging contents based on the supported capabilities.
In some embodiments, initiating a read or write data operation to a target register, and performing a data read or write to the target register of the SD card controller through the APB interface based on the read or write data operation to debug accordingly comprises:
and initiating a data writing operation to a target register by the debugging state control module based on the register content of the plurality of pieces of frame data, and writing the content of the appointed frame data in the plurality of pieces of frame data into the target register through an APB interface based on the data writing operation.
In some embodiments, detecting whether the SD card is in place by the debug status control module comprises:
and the debugging state control module inquires a register related to the SD card bit information in the SD card controller at regular intervals so as to detect whether the SD card is in place.
In some embodiments, the parsing the debugging data by the serial port transceiving control module includes:
responding to the serial port transceiving control module to receive debugging data with a fixed frame format, and judging whether a frame head and a frame tail of the debugging data are correct or not;
and analyzing the debugging data by the serial port transceiving control module in response to the correctness of the frame head and the frame tail of the debugging data.
In some embodiments, reading or writing data to a target register of the SD card controller through the APB interface based on an operation of reading or writing data to debug accordingly comprises:
and performing data reading or data writing on a target register of the SD card controller through the system bus based on the operation of reading or writing data through the APB interface so as to perform corresponding debugging.
In another aspect of the present invention, a debugging system for an SD card controller is further provided, which includes:
the detection module is configured for detecting whether the SD card is in place or not through the debugging state control module;
the analysis module is configured for responding to the SD card in place, sending the debugging data to the serial port transceiving control module by the upper computer, and analyzing the debugging data by the serial port transceiving control module to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents;
the frame data storage module is configured to be used for respectively sending the plurality of pieces of frame data to the register module by the serial port transceiving control module so as to enable the register module to respectively store the plurality of pieces of frame data into the register list according to the offset addresses; and
the debugging module of the SD card controller is configured to read a plurality of pieces of frame data in the register list by the debugging state control module, acquire an address of a target register in the SD card controller connected with the SD card based on the register content in the debugging module, initiate data reading or data writing operation to the target register, and perform data reading or data writing on the target register of the SD card controller through the APB interface based on the data reading or data writing operation so as to perform corresponding debugging.
In yet another aspect of the present invention, a computer-readable storage medium is also provided, storing computer program instructions, which when executed by a processor, implement the above-described method.
In yet another aspect of the present invention, a computer device is further provided, which includes a memory and a processor, the memory storing a computer program, which when executed by the processor performs the above method.
The invention has at least the following beneficial technical effects:
the debugging method of the chip SD card controller based on the ARM framework of the invention analyzes debugging data sent by an upper computer through a serial port transceiving control module to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents, stores the frame data into a register list according to the offset addresses, reads the frame data in the register list by a debugging state control module and controls an APB interface to read data or write data for the SD card controller, thereby carrying out corresponding debugging, the method is simple and effective, utilizes an APB bus interface for debugging which the ARM framework chip is provided by itself, completes the conversion from an APB bus to a serial port bus and the control of data and flow by integrating a general SD card controller debugging module in the chip, thereby realizing the direct parallel debugging with other functions at the initial debugging stage finished by a flow, the simulator is not needed to be relied on, and the debugging of other functional modules is not needed to be finished, so that the convenience and the debugging efficiency are greatly improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
Fig. 1 is a schematic diagram illustrating a debugging method of an SD card controller according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating a debugging structure of an SD card controller according to an embodiment of the present invention;
FIG. 3 is a diagram illustrating a debugging system of an SD card controller according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a computer-readable storage medium for implementing a debugging method of an SD card controller according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a hardware structure of a computer device for executing the SD card controller debugging method according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two non-identical entities with the same name or different parameters, and it is understood that "first" and "second" are only used for convenience of expression and should not be construed as limiting the embodiments of the present invention. Furthermore, the terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements does not include all of the other steps or elements inherent in the list.
In view of the above objects, a first aspect of the embodiments of the present invention provides an embodiment of a debugging method for an SD card controller. Fig. 1 is a schematic diagram illustrating an embodiment of a debugging method for an SD card controller according to the present invention. As shown in fig. 1, the embodiment of the present invention includes the following steps:
step S10, detecting whether the SD card is in place through the debugging state control module;
step S20, responding to the SD card being in place, the upper computer sends the debugging data to the serial port transceiving control module, and the serial port transceiving control module analyzes the debugging data to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents;
step S30, the serial port transceiving control module sends the plurality of pieces of frame data to the register module respectively, so that the register module stores the plurality of pieces of frame data in the register list according to the offset addresses respectively;
step S40, the debug status control module reads a plurality of pieces of frame data in the register list, and obtains the address of the target register in the SD card controller connected to the SD card based on the register content therein, and initiates the operation of reading or writing data to the target register, and performs data reading or data writing to the target register of the SD card controller through the APB interface based on the operation of reading or writing data to perform corresponding debugging.
The debugging method of the chip SD card controller based on the ARM architecture comprises the steps of analyzing debugging data sent by an upper computer through a serial port transceiving control module to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents, storing the frame data into a register list according to the offset addresses, reading the frame data in the register list by a debugging state control module and controlling an APB interface to read data or write data to the SD card controller, so that corresponding debugging is carried out, the method is simple and effective, the conversion from an APB bus to a serial port bus and the control of data and flow are completed by integrating a general SD card controller debugging module in a chip by utilizing the APB bus interface for debugging in the ARM architecture chip, and therefore, the debugging can be directly carried out with other functions in parallel at the initial debugging stage completed by a flow, the simulator is not needed to be relied on, and the debugging of other functional modules is not needed to be finished, so that the convenience and the debugging efficiency are greatly improved.
In some embodiments, the parsing the debugging data by the serial port transceiving control module includes: responding to the serial port transceiving control module to receive debugging data with a fixed frame format, and judging whether a frame head and a frame tail of the debugging data are correct or not; and analyzing the debugging data by the serial port transceiving control module in response to the correctness of the frame head and the frame tail of the debugging data.
In some embodiments, initiating a read or write data operation to a target register, and performing a data read or write to the target register of the SD card controller through the APB interface based on the read or write data operation to debug accordingly comprises: initiating a data reading operation to a target register by a debugging state control module based on the register content of a plurality of pieces of frame data, and reading corresponding data from the target register through an APB interface based on the data reading operation; and responding to the SD card controller to return corresponding data to the debugging state control module through the APB interface, temporarily storing the corresponding data into a specified register of the register module by the debugging state control module, informing the serial port transceiving control module, acquiring the corresponding data from the specified register by the serial port transceiving control module, and sending the corresponding data to the upper computer.
In some embodiments, initiating a read or write data operation to a target register, and performing a data read or write to the target register of the SD card controller through the APB interface based on the read or write data operation to debug accordingly comprises: and initiating a data writing operation to a target register by the debugging state control module based on the register content of the plurality of pieces of frame data, and writing the content of the appointed frame data in the plurality of pieces of frame data into the target register through an APB interface based on the data writing operation.
Fig. 2 is a schematic diagram of a debugging structure of an SD card controller according to an embodiment of the present invention. As shown in fig. 2, the debugging structure of the SD card controller includes a serial port transceiving control module, a register module, an APB interface module, a debugging state control module, and an upper computer automatic test flow. The serial port transceiving control module completes serial port protocol analysis based on a Universal Asynchronous Receiver/Transmitter (UART) serial port protocol, and connects pins of a TX (transmit/receive) chip, an RX (receive/transmit) chip and a Ground (GND) chip with a serial port of an upper computer to complete transceiving work of debugging data of the upper computer. The register module is composed of a plurality of registers and is mainly used for analyzing serial port data and controlling an APB (Advanced Peripheral Bus) interface to complete communication with the SD card controller, and the register module mainly comprises starting debugging control, reading and writing direction control, an SD card controller destination register address, SD card controller destination register read data, SD card controller destination register write data and the like. The APB interface is connected with the APB interface of the system bus, and accesses the register in the SD card controller through the system bus based on an APB bus protocol to finish the purpose of debugging the SD card controller. The debugging state control module is a core module, and when receiving data sent by the upper computer through the serial port, the debugging state control module stores the data received by the serial port transceiving control module into the register module and then controls the APB interface to access a target register of the SD card controller according to the content of the data.
The serial port transceiving control module is based on a UART serial port protocol, and has a baud rate of 115200, a 1-bit start bit, an 8-bit data bit, a 1-bit stop bit and a 1-bit check bit. The frame format is shown in table 1 below:
TABLE 1 frame data Format
| 0x55 | 0xAA | Offset of | Register content (32bits) | 0xBB | 0xCC |
The register list definition of the register module is shown in table 2 below:
TABLE 2 register List Definitions
When debugging needs to read the target register of the SD card controller, the process is as follows: the upper computer sends debugging data through the serial port, the serial port transceiving control module receives the debugging data, and after the frame header and the frame tail are verified to be effective, the received debugging data are respectively stored into a register list of the register module according to the offset address. After capturing that the ctrl _ reg bit31 bit with offset address 0x0 changes from 0 to 1, the debug state control module initiates the operation of reading and writing the SD card control register, and the reading or writing is determined by ctrl _ reg bit 0. If the operation is a read operation, the debugging state control module reads the register of the SD card controller through the APB interface and informs the SD card controller of addr _ reg with the offset address of 0x 4. After the SD card controller returns the data of the corresponding address, the debugging state control module temporarily stores the data into rddata _ reg with the offset address of 0xA and informs the serial port transceiving control module, and the serial port transceiving control module sends the read data to the upper computer through the serial port.
As shown in the frame format of read data in table 3 below, when a certain register of the SD card controller is to be read, first frame data with an offset address of 0x4 and a target register address as the register content is sent, so as to inform the debug system of the target register address of the current operation; the second frame data is offset address 0x0, the register content is 0x80000001, bit31 changes from 0 to 1, the debugging state control module starts the flow of executing reading and writing the register, and bit0 is 1, which represents that the flow is the register reading flow; the third frame data is offset address 0x0, the register content is 0x0, the purpose is to clear the register content of offset address 0x0, and prepare for the next time the upper computer initiates the process of reading and writing the register.
TABLE 3 frame format for read data
| 0x55 | 0xAA | 0x4 | Target register address | 0xBB | 0xCC |
| 0x55 | 0xAA | 0x0 | 0x80000001 | 0xBB | 0xCC |
| 0x55 | 0xAA | 0x0 | 0x00000000 | 0xBB | 0xCC |
When debugging needs to be written into a destination register of the SD card controller, the flow is as follows: the upper computer sends debugging data through the serial port, the serial port transceiving control module receives the debugging data, and after the frame header and the frame tail are verified to be effective, the received debugging data is stored into a register list of the register module according to the offset address. After capturing that the ctrl _ reg bit31 bit with offset address 0x0 changes from 0 to 1, the debug state control module initiates the operation of reading and writing the SD card control register, and the reading or writing is determined by ctrl _ reg bit 0. If the operation is a write operation, the debugging state control module writes the registers into the SD card controller through the APB interface, informs the SD card controller of addr _ reg with the offset address of 0x4, and writes the wrdata _ reg content with the offset address of 0x8 into the corresponding registers of the SD card controller.
As shown in the frame format of the write data in table 4 below, when a certain register of the SD card controller is to be written, first frame data with an offset address of 0x4 and a target register address as the register content is sent, so as to inform the debug system of the target register address of the current operation; the second frame data is offset address 0x8, and the register content is the data to be written, so as to inform the debugging system of the specific content written by the current write operation; the third frame data is an offset address 0x0, the content of the register is 0x80000000, bit31 changes from 0 to 1, the debugging state control module starts the flow of executing reading and writing the register, and bit0 is 0, which represents that the flow is a register writing flow; the fourth frame data is an offset address 0x0, the register content is 0x0, the purpose is to clear the register content of the offset address 0x0, and preparation is made for the next time the upper computer initiates the process of reading and writing the register.
Table 4 frame format for writing data
| 0x55 | 0xAA | 0x4 | Target register address | 0xBB | 0xCC |
| 0x55 | 0xAA | 0x8 | Written data | 0xBB | 0xCC |
| 0x55 | 0xAA | 0x0 | 0x80000000 | 0xBB | 0xCC |
| 0x55 | 0xAA | 0x0 | 0x00000000 | 0xBB | 0xCC |
In some embodiments, the method further comprises: and in response to the upper computer receiving the corresponding data, acquiring the capabilities supported by the SD card controller from the corresponding data to determine debugging contents based on the supported capabilities.
In this embodiment, the upper computer reads the register content with the SD card controller target address of 0x40, and obtains the SD card controller Support capability to determine the SD card controller debug content, such as High Speed Support (High Speed Support mode), Max Block Length (maximum Block Length), SDMA Support capability (SDMA Support capability), and the like. After the register content with the target address of 0x40 of the SD card controller is read, the debugging state control module controls the read data to be sent to the upper computer through the serial port, and a debugging person can obtain the supporting capacity condition of the SD card controller from the upper computer.
In some embodiments, detecting whether the SD card is in place by the debug status control module comprises: and the debugging state control module inquires a register related to the SD card bit information in the SD card controller at regular intervals so as to detect whether the SD card is in place.
In this embodiment, the debug State control module enters the card _ detect State, without the need of the upper computer to send a debug instruction, the debug State control module controls to poll the Present State Register of the SD card controller every 100ms, and queries the card inserted Register bit, if the status is 1, the serial port is started to receive, and the upper computer can send debug data to start debugging the SD card controller.
In some embodiments, reading or writing data to a target register of the SD card controller through the APB interface based on an operation of reading or writing data to debug accordingly comprises: and performing data reading or data writing on a target register of the SD card controller through the system bus based on the operation of reading or writing data through the APB interface so as to perform corresponding debugging.
In other embodiments, the upper computer completes the test purpose of reading the internal register of the SD card according to the configuration register required for reading the internal register of the SD card. In addition, the upper computer can sequentially configure required registers according to the SD card initialization process to complete the SD card initialization and enable the SD card to enter a data transmission state. In addition, the data read-write debugging of the SD card can be completed in a PIO mode through the register port. The upper computer writes a test program and data to be tested, and the upper computer executes the instructions written into the register in sequence.
In a second aspect of the embodiments of the present invention, a debugging system for an SD card controller is further provided. Fig. 3 is a schematic diagram illustrating an embodiment of a debugging system of an SD card controller provided in the present invention. As shown in fig. 3, an SD card controller debugging system includes: the detection module 10 is configured to detect whether the SD card is in place through the debug state control module; the analysis module 20 is configured to respond to the SD card being in place, send the debugging data to the serial port transceiving control module by the upper computer, and analyze the debugging data by the serial port transceiving control module to obtain a plurality of pieces of frame data respectively including the offset address and the corresponding register content; the frame data storage module 30 is configured to send the plurality of frame data to the register module by the serial port transceiving control module, so that the register module stores the plurality of frame data in the register list according to the offset addresses; and the SD card controller debugging module 40 is configured to read a plurality of pieces of frame data in the register list by the debugging state control module, acquire an address of a target register in the SD card controller connected with the SD card based on the register content in the frame data, initiate data reading or data writing operation to the target register, and perform data reading or data writing on the target register of the SD card controller through the APB interface based on the data reading or data writing operation so as to perform corresponding debugging.
In a third aspect of the embodiment of the present invention, a computer-readable storage medium is further provided, and fig. 4 is a schematic diagram illustrating a computer-readable storage medium for implementing a debugging method of an SD card controller according to an embodiment of the present invention. As shown in fig. 4, the computer-readable storage medium 3 stores computer program instructions 31. The computer program instructions 31, when executed by a processor, implement the method of any of the embodiments described above.
It should be understood that all the embodiments, features and advantages set forth above with respect to the SD card controller debugging method according to the present invention are equally applicable to the SD card controller debugging system and the storage medium according to the present invention without conflicting therewith.
In a fourth aspect of the embodiments of the present invention, there is further provided a computer device, including a memory 402 and a processor 401 as shown in fig. 5, where the memory 402 stores therein a computer program, and the computer program implements the method of any one of the above embodiments when executed by the processor 401.
Fig. 5 is a schematic diagram of a hardware structure of an embodiment of a computer device for executing the SD card controller debugging method according to the present invention. Taking the computer device shown in fig. 5 as an example, the computer device includes a processor 401 and a memory 402, and may further include: an input device 403 and an output device 404. The processor 401, the memory 402, the input device 403 and the output device 404 may be connected by a bus or other means, and fig. 5 illustrates an example of a connection by a bus. The input device 403 may receive input numeric or character information and generate key signal inputs related to user settings and function control of the SD card controller debugging system. The output device 404 may include a display device such as a display screen.
The memory 402, which is a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as program instructions/modules corresponding to the debugging method of the SD card controller in the embodiment of the present application. The memory 402 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created by use of the SD card controller debugging method, and the like. Further, the memory 402 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, memory 402 may optionally include memory located remotely from processor 401, which may be connected to local modules via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The processor 401 executes various functional applications and data processing of the server by running the nonvolatile software program, instructions and modules stored in the memory 402, that is, the SD card controller debugging method of the above-described method embodiment is implemented.
Finally, it should be noted that the computer-readable storage medium (e.g., memory) herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of example, and not limitation, nonvolatile memory can include Read Only Memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which can act as external cache memory. By way of example and not limitation, RAM is available in a variety of forms such as synchronous RAM (DRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to comprise, without being limited to, these and other suitable types of memory.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items. The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. A debugging method of an SD card controller is characterized by comprising the following steps:
detecting whether the SD card is in place or not through a debugging state control module;
responding to the SD card in place, sending debugging data to a serial port transceiving control module by an upper computer, and analyzing the debugging data by the serial port transceiving control module to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents;
the serial port transceiving control module respectively sends the plurality of pieces of frame data to a register module so that the register module respectively stores the plurality of pieces of frame data into a register list according to offset addresses;
reading the plurality of pieces of frame data in the register list by the debugging state control module, acquiring an address of a target register in an SD card controller connected with the SD card based on the register content in the frame data, initiating data reading or data writing operation to the target register, and performing data reading or data writing on the target register of the SD card controller through an APB (advanced peripheral bus) interface based on the data reading or data writing operation so as to debug correspondingly.
2. The method of claim 1, wherein initiating a read or write data operation to the target register and performing a data read or write data operation to the target register of the SD card controller through an APB interface based on the read or write data operation to debug accordingly comprises:
initiating a data reading operation to the target register by the debugging state control module based on the register content of the plurality of pieces of frame data, and reading corresponding data from the target register through an APB interface based on the data reading operation;
responding to the SD card controller to return the corresponding data to the debugging state control module through the APB interface, temporarily storing the corresponding data into a specified register of the register module by the debugging state control module, informing the serial port transceiving control module, acquiring the corresponding data from the specified register by the serial port transceiving control module, and sending the corresponding data to the upper computer.
3. The method of claim 2, further comprising:
and in response to the upper computer receiving the corresponding data, acquiring the capabilities supported by the SD card controller from the corresponding data to determine debugging contents based on the supported capabilities.
4. The method of claim 1, wherein initiating a read or write data operation to the target register and performing a data read or write data operation to the target register of the SD card controller through an APB interface based on the read or write data operation to debug accordingly comprises:
and initiating a data writing operation to the target register by the debugging state control module based on the register content of the plurality of pieces of frame data, and writing the content of the specified frame data in the plurality of pieces of frame data into the target register through an APB interface based on the data writing operation.
5. The method of claim 1, wherein detecting whether the SD card is in place by the debug status control module comprises:
and inquiring a register related to the SD card bit information in the SD card controller by a debugging state control module at regular intervals so as to detect whether the SD card is in place.
6. The method of claim 1, wherein the parsing the debug data by the serial port transceiver control module comprises:
responding to the serial port transceiving control module to receive the debugging data with a fixed frame format, and judging whether a frame head and a frame tail of the debugging data are correct or not;
and responding to the correctness of the frame head and the frame tail of the debugging data, and analyzing the debugging data by the serial port transceiving control module.
7. The method of claim 1, wherein performing data read or data write to the target register of the SD card controller through an APB interface based on the operation of reading or writing data to debug accordingly comprises:
and performing data reading or data writing on the target register of the SD card controller through a system bus based on the operation of reading or writing data through an APB interface so as to debug correspondingly.
8. An SD card controller debugging system, comprising:
the detection module is configured for detecting whether the SD card is in place or not through the debugging state control module;
the analysis module is configured to respond to the SD card in place, send debugging data to the serial port transceiving control module by the upper computer, and analyze the debugging data by the serial port transceiving control module to obtain a plurality of pieces of frame data respectively comprising offset addresses and corresponding register contents;
the frame data storage module is configured to be used for respectively sending the plurality of pieces of frame data to the register module by the serial port transceiving control module so that the register module respectively stores the plurality of pieces of frame data into the register list according to the offset addresses; and
and the SD card controller debugging module is configured to read the plurality of pieces of frame data in the register list by the debugging state control module, acquire an address of a target register in the SD card controller connected with the SD card based on the register content in the debugging state control module, initiate data reading or data writing operation to the target register, and perform data reading or data writing operation on the target register of the SD card controller through an APB (advanced peripheral bus) interface based on the data reading or data writing operation so as to perform corresponding debugging.
9. A computer-readable storage medium, characterized in that computer program instructions are stored which, when executed by a processor, implement the method according to any one of claims 1-7.
10. A computer device comprising a memory and a processor, characterized in that the memory has stored therein a computer program which, when executed by the processor, performs the method according to any one of claims 1-7.
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