CN113725360B - Thermal field transistor based on tantalum disulfide charge density wave phase transition and preparation method thereof - Google Patents
Thermal field transistor based on tantalum disulfide charge density wave phase transition and preparation method thereof Download PDFInfo
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- CN113725360B CN113725360B CN202111025360.3A CN202111025360A CN113725360B CN 113725360 B CN113725360 B CN 113725360B CN 202111025360 A CN202111025360 A CN 202111025360A CN 113725360 B CN113725360 B CN 113725360B
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- JAAVTMIIEARTKI-UHFFFAOYSA-N [S--].[S--].[Ta+4] Chemical compound [S--].[S--].[Ta+4] JAAVTMIIEARTKI-UHFFFAOYSA-N 0.000 title claims abstract description 42
- 230000007704 transition Effects 0.000 title claims abstract description 11
- 238000002360 preparation method Methods 0.000 title claims description 7
- 238000010438 heat treatment Methods 0.000 claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 230000000694 effects Effects 0.000 claims abstract description 8
- 230000008859 change Effects 0.000 claims abstract description 6
- 239000004065 semiconductor Substances 0.000 claims abstract description 5
- 239000010408 film Substances 0.000 claims description 30
- 229920002120 photoresistant polymer Polymers 0.000 claims description 30
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 24
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 21
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 20
- 239000010931 gold Substances 0.000 claims description 20
- 229910052737 gold Inorganic materials 0.000 claims description 20
- 238000000151 deposition Methods 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 15
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 13
- 239000010936 titanium Substances 0.000 claims description 13
- 229910052719 titanium Inorganic materials 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 238000005566 electron beam evaporation Methods 0.000 claims description 9
- 230000000873 masking effect Effects 0.000 claims description 9
- 238000004528 spin coating Methods 0.000 claims description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 230000008569 process Effects 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 239000007769 metal material Substances 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 230000004044 response Effects 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 239000010409 thin film Substances 0.000 claims description 2
- 230000010354 integration Effects 0.000 abstract description 4
- 230000005669 field effect Effects 0.000 description 7
- 238000012545 processing Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8822—Sulfides, e.g. CuS
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/253—Multistable switching devices, e.g. memristors having three or more electrodes, e.g. transistor-like devices
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention relates to a thermal field transistor based on tantalum disulfide charge density wave phase transition, which is characterized by comprising the following components: the semiconductor device comprises a substrate, a dielectric layer arranged on the substrate, a channel region arranged on the dielectric layer, a source electrode and a drain electrode arranged on the channel region, an insulating layer covered on the upper surface and a grid electrode arranged on the insulating layer; the channel region is made of tantalum disulfide, and the grid electrode is formed by a heating wire; when current flows through the grid, the heating wire can generate a local thermal field due to the Joule heating effect of the current, so that the tantalum disulfide in the channel region generates charge density wave phase change, the channel resistivity is changed, and the regulation and control of the grid on the channel resistivity are formed. The thermal field transistor has the characteristics of simple structure, compatibility with the COMS technology, capability of realizing three-dimensional high-density integration and the like.
Description
Technical Field
The invention belongs to the technical field of microelectronics, and relates to a preparation method of a thermal field transistor based on tantalum disulfide charge density wave phase transition.
Background
A field effect Transistor (FILED EFFECT Transistor, FET) is a semiconductor device that uses the field effect at the input to control the output current. Since 1960, field effect transistors have been used as core elements of integrated chips, and have been playing an indispensable role in the fields of information storage and computation. For the traditional metal-oxide-semiconductor field effect transistor (MOS-FET), the core principle is that the injection and removal of channel carriers are controlled by an external electric field (grid) to realize the electrostatic doping of channel materials, thereby achieving the control of grid voltage to channel current, and the method belongs to voltage control type electronic elements.
With the advent of the information age, the ever-increasing data processing requirements have presented significant challenges to the performance and integration density of transistors. However, as the micro-nano processing size approaches the physical limit, the field effect transistor based on the electrostatic doping effect gradually exposes the short channel effect, the gate leakage is serious, the integration density is difficult to further improve, and the like.
Disclosure of Invention
Based on the above, the present invention provides a method for preparing a thermal field transistor based on tantalum disulfide charge density wave phase transition. The thermal field transistor uses a two-dimensional material tantalum disulfide (TaS 2) supporting charge density waves as a medium, and specifically comprises the following components: the semiconductor device comprises a substrate, a dielectric layer arranged on the substrate, a channel region arranged on the dielectric layer, a source electrode and a drain electrode arranged on the channel region, an insulating layer covered on the upper surface and a grid electrode arranged on the insulating layer; the channel region is made of tantalum disulfide, and the grid electrode is formed by a heating wire; when current flows through the grid, the heating wire can generate a local thermal field due to the Joule heating effect of the current, so that the tantalum disulfide in the channel region generates charge density wave phase change, the channel resistivity is changed, and the regulation and control of the grid on the channel resistivity are formed.
Preferably, the material of the substrate is silicon.
Preferably, the dielectric layer material is silicon dioxide.
Preferably, the insulating layer material is silicon oxide.
Preferably, the metal materials of the source electrode and the drain electrode are titanium and gold, and the gold is above the titanium.
In order to prepare the thermal field transistor, the invention also provides a preparation method of the thermal field transistor based on tantalum disulfide charge density wave phase transition, which comprises the following specific steps:
firstly, growing a layer of silicon oxide film with preset thickness on a silicon substrate by a thermal oxidation method;
Secondly, transferring a 1T phase tantalum disulfide sheet with preset thickness on the silicon oxide film by using a mechanical stripping mode;
Thirdly, depositing photoresist on the structure obtained in the second step by utilizing a spin coating method, masking, exposing and developing to form a source-drain electrode pattern of tantalum disulfide, then sequentially depositing titanium and gold films by utilizing an electron beam evaporation method, and finally stripping the residual photoresist and a metal film above the residual photoresist to leave a metal source-drain electrode of tantalum disulfide;
a fourth step of depositing photoresist on the structure obtained in the third step by utilizing a spin coating method, masking, exposing and developing to form a pattern covering an insulating window of a channel region, then depositing a silicon oxide insulating layer with preset thickness by utilizing an electron beam evaporation mode, and finally stripping the residual photoresist and silicon oxide above the residual photoresist, and leaving the insulating window covering the tantalum disulfide channel;
And fifthly, depositing photoresist on the structure obtained in the fourth step by using a spin coating method again, masking, exposing and developing to form patterns of the metal heating wire and the electrode thereof, then depositing a gold film with a preset thickness by using an electron beam evaporation method, and finally stripping the residual photoresist and the gold film above the residual photoresist, and leaving the heating wire and the electrode thereof.
Preferably, the preset thickness of the silicon oxide film is 300 nanometers; the preset thickness of the tantalum disulfide flake is 30 nanometers; the preset thickness of the silicon oxide insulating layer is 20 nanometers; the preset thickness of the gold film is 30 nanometers; the preset thickness of the titanium film is 5 nanometers.
Preferably, in the third, fourth and fifth steps of the preparation method, the lift-off process is used to strip the residual photoresist and the thin film layer above.
The thermal field transistor provided by the invention is based on a brand new thermal field effect, has a simple structure and low manufacturing cost, is compatible with the CMOS process processed by the existing integrated chip, can realize three-dimensional high-density integration, has stable performance, has response speed lower than microsecond level and modulation frequency reaching more than MHz, and provides a new thought for the development of the integrated chip.
Drawings
Fig. 1 is a schematic diagram of a thermal field transistor.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
The thermal field transistor based on tantalum disulfide charge density wave phase transition provided by the invention uses a metal type two-dimensional material tantalum disulfide (TaS 2) supporting charge density waves as a medium, as shown in fig. 1, and specifically comprises: a substrate 1, a dielectric layer 2 arranged on the substrate 1, a channel region 3 arranged on the dielectric layer 2, a source electrode 4 and a drain electrode 5 arranged on the channel region 3, an insulating layer 6 covering the upper surface and a gate electrode 7 arranged on the insulating layer 6; the channel region 3 is made of tantalum disulfide, and the grid electrode 7 is formed by a heating wire; when current flows through the grid electrode 7, the heating wire generates a local thermal field due to the Joule heating effect of the current, so that the tantalum disulfide in the channel region 3 generates charge density wave phase change, thereby changing the channel resistivity and forming the regulation and control of the grid electrode on the channel resistivity.
The tantalum disulfide is a layered material supporting multiple charge density wave phases, when the temperature changes, the tantalum disulfide can change between the phases of different charge density waves, and the conductivity of the material can also change. The invention uses tantalum disulfide as the channel material of the transistor, and prepares an in-situ heating wire near the tantalum disulfide. When current flows through the heating wire, a local thermal field is generated due to the Joule heating effect of the current. When the temperature of the thermal field reaches the phase transition temperature of tantalum disulfide, the tantalum disulfide changes phase and the resistivity is changed, so that the resistivity of the heating wire (namely the grid) to the channel (tantalum disulfide) is regulated and controlled.
The thermal field transistor can realize the response speed of sub microsecond level and the modulation frequency of MHz based on the local thermal field effect.
In one embodiment, the material of the substrate 1 is silicon, the material of the dielectric layer 2 is silicon dioxide, the material of the insulating layer 6 is silicon oxide, and the metal materials of the source electrode 4 and the drain electrode 5 are gold and titanium, wherein gold is located on the titanium.
In order to prepare the thermal field transistor, the invention also provides a preparation method of the thermal field transistor based on tantalum disulfide charge density wave phase transition, which comprises the following specific steps:
firstly, growing a layer of silicon oxide film with preset thickness on a silicon substrate by a thermal oxidation method;
Secondly, transferring a 1T phase tantalum disulfide sheet with preset thickness on the silicon oxide film by using a mechanical stripping mode;
Thirdly, depositing photoresist on the structure obtained in the second step by utilizing a spin coating method, masking, exposing and developing to form a source-drain electrode pattern of tantalum disulfide, then sequentially depositing titanium and gold films by utilizing an electron beam evaporation method, and finally stripping the residual photoresist and a metal film above the residual photoresist to leave a metal source-drain electrode of tantalum disulfide;
a fourth step of depositing photoresist on the structure obtained in the third step by utilizing a spin coating method, masking, exposing and developing to form a pattern covering an insulating window of a channel region, then depositing a silicon oxide insulating layer with preset thickness by utilizing an electron beam evaporation mode, and finally stripping the residual photoresist and silicon oxide above the residual photoresist, and leaving the insulating window covering the tantalum disulfide channel;
And fifthly, depositing photoresist on the structure obtained in the fourth step by using a spin coating method again, masking, exposing and developing to form patterns of the metal heating wire and the electrode thereof, then depositing a gold film with a preset thickness by using an electron beam evaporation method, and finally stripping the residual photoresist and the gold film above the residual photoresist, and leaving the heating wire and the electrode thereof.
In one embodiment, the predetermined thickness of the silicon oxide film is 300 nm; the preset thickness of the tantalum disulfide flake is 30 nanometers; the preset thickness of the silicon oxide insulating layer is 20 nanometers; the preset thickness of the gold film is 30 nanometers; the preset thickness of the gold film is 30 nanometers; the preset thickness of the titanium film is 5 nanometers.
In another embodiment, the remaining photoresist and film thereon are stripped in steps three, four, and five, all using a lift-off process.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (8)
1. A thermal field transistor based on tantalum disulfide charge density wave phase transition, the thermal field transistor comprising: the semiconductor device comprises a substrate, a dielectric layer arranged on the substrate, a channel region arranged on the dielectric layer, a source electrode and a drain electrode arranged on the channel region, an insulating layer covered on the upper surface and a grid electrode arranged on the insulating layer; the channel region is made of tantalum disulfide, and the grid electrode is formed by a heating wire; when current flows through the grid, the heating wire generates a local thermal field due to the Joule heating effect of the current, so that the tantalum disulfide in the channel region generates charge density wave phase change, thereby changing the channel resistivity and forming the regulation and control of the grid on the channel resistivity;
the thermal field transistor is used for realizing the response speed of sub microsecond level and the modulation frequency of MHz.
2. The thermal field transistor of claim 1, wherein the material of the substrate is silicon.
3. The thermal field transistor of claim 1, wherein the dielectric layer material is silicon dioxide.
4. The thermal field transistor of claim 1, wherein the insulating layer material is silicon oxide.
5. The thermal field transistor of claim 1, wherein the metal material of the source and drain electrodes is gold and titanium, wherein gold is 30 nanometers, titanium is 5 nanometers, and gold is located on top of titanium.
6. A preparation method of a thermal field transistor based on tantalum disulfide charge density wave phase transition is characterized by comprising the following specific steps:
firstly, growing a layer of silicon oxide film with preset thickness on a silicon substrate by a thermal oxidation method;
Secondly, transferring a 1T phase tantalum disulfide sheet with preset thickness on the silicon oxide film by using a mechanical stripping mode;
Thirdly, depositing photoresist on the structure obtained in the second step by utilizing a spin coating method, masking, exposing and developing to form a source-drain electrode pattern of tantalum disulfide, then sequentially depositing a titanium film and a gold film by utilizing an electron beam evaporation method, and finally stripping the residual photoresist and a metal film above the residual photoresist to leave a metal source-drain electrode of tantalum disulfide;
a fourth step of depositing photoresist on the structure obtained in the third step by utilizing a spin coating method, masking, exposing and developing to form a pattern covering an insulating window of a channel region, then depositing a silicon oxide insulating layer with preset thickness by utilizing an electron beam evaporation mode, and finally stripping the residual photoresist and silicon oxide above the residual photoresist, and leaving the insulating window covering the tantalum disulfide channel;
And fifthly, depositing photoresist on the structure obtained in the fourth step by using a spin coating method again, masking, exposing and developing to form patterns of the metal heating wire and the electrode thereof, then depositing a gold film with a preset thickness by using an electron beam evaporation method, and finally stripping the residual photoresist and the gold film above the residual photoresist, and leaving the heating wire and the electrode thereof.
7. The method of manufacturing a thermal field transistor according to claim 6, wherein the predetermined thickness of the silicon oxide film is 300 nm; the preset thickness of the tantalum disulfide flake is 30 nanometers; the preset thickness of the silicon oxide insulating layer is 20 nanometers; the preset thickness of the gold film is 30 nanometers; the preset thickness of the titanium film is 5 nanometers.
8. The method of manufacturing a thermal field transistor according to claim 6, wherein the remaining photoresist and the thin film layer thereon are stripped using a lift-off process in the third, fourth and fifth steps.
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| GB2256314B (en) * | 1991-01-25 | 1994-09-07 | Hitachi Europ Ltd | Charge density wave semiconductor device |
| JPH0766403A (en) * | 1993-08-23 | 1995-03-10 | Nippondenso Co Ltd | Switching device |
| DE202005019360U1 (en) * | 2005-12-10 | 2006-02-02 | Schön, Hendrik | Field effect transistor comprising substrate, active layer, source and drain contact, and gate electrode in which electrical conductivity between source and drain electrodes can be varied |
| JP2011159697A (en) * | 2010-01-29 | 2011-08-18 | Dainippon Printing Co Ltd | Thin film transistor mounting substrate, method of manufacturing the same, and image display device |
| GB201412884D0 (en) * | 2014-07-21 | 2014-09-03 | Inst Jozef Stefan | Switchable macroscopic quantum state devices and methods for their operation |
| CN104992974B (en) * | 2015-05-15 | 2018-03-02 | 西安交通大学 | Buddha's warrior attendant ground mass double hyer insulation gate medium field-effect transistor and preparation method thereof |
| CN107452631A (en) * | 2017-05-08 | 2017-12-08 | 北京大学 | A kind of method that electronic device electrode is prepared using metallic transition metals chalcogen compound |
| CN107919388A (en) * | 2017-11-15 | 2018-04-17 | 苏州大学 | The method for reducing two-dimensional material field-effect transistor contact resistance |
| CN108179399A (en) * | 2018-01-23 | 2018-06-19 | 北京大学 | A kind of method that chemical vapour deposition technique prepares tantalum disulfide |
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| CN111725325A (en) * | 2020-06-30 | 2020-09-29 | 重庆大学 | Novel thin-layer molybdenum disulfide field effect transistor |
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