CN113595391A - Self-adaptive slope compensation device and method for single-inductor dual-output switching converter - Google Patents
Self-adaptive slope compensation device and method for single-inductor dual-output switching converter Download PDFInfo
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- H—ELECTRICITY
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- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses a single-inductor dual-output switching converter self-adaptive slope compensation device and a method, and the device comprises a first voltage detection circuit VS1, a second voltage detection circuit VS2, a third voltage detection circuit VS3, a current detection circuit IS, a timer CLK, a first drive circuit DR1, a second drive circuit DR2, a third drive circuit DR3, a first slope signal generator SGC1, a second slope signal generator SGC2 and a peak current control pulse signal generator PCC. And in each switching period, continuously and automatically updating the slope compensation slope according to the input voltage of the single-inductor double-output switching converter, the voltage of the first output branch circuit and the voltage of the second output branch circuit, so as to realize self-adaptive dynamic regulation. The input voltage range is larger, the transient response performance reduction of the converter is avoided when the compensation slope is over-compensated and the control mode is changed from current mode control to voltage mode control, and the transient response performance of the converter is improved.
Description
Technical Field
The invention relates to the technical field of power electronic equipment, in particular to a self-adaptive slope compensation device and method for a single-inductor double-output switching converter.
Background
The large-scale popularization of portable electronic devices has promoted the development of multiple-output switching power supplies toward low cost, miniaturization and high conversion efficiency. Compared with the traditional multi-output switch converter, the single-inductance multi-output switch converter has the characteristics of few magnetic elements, small volume, low cost and the like, and has wide application prospect in portable equipment. Compared with voltage mode control and peak current mode control, the single-inductor multi-output switch converter improves the voltage stabilization precision of the output voltage of the converter and the response speed to the change of the input voltage, and because the single-inductor multi-output switch converter has the function of current limiting, the peak current control is easy to realize the overcurrent protection of the converter, and when a plurality of power supplies are connected in parallel, the current equalization is more convenient to realize. However, in the single-inductor dual-output switching converter, in the peak current control mode, if slope compensation is not provided, the duty ratio is directly changed by changing the input voltage or the output voltage, and subharmonic instability is caused when the duty ratio is changed in a wide range. Although the conventional fixed slope compensation can solve the above problem, when the input voltage or the output voltage changes, the fixed slope compensation may cause over-compensation, so that the transient response performance of the converter is reduced; due to the limited stability range of the fixed slope compensation, when the variation range of the input and output voltages is too large, the system is caused to exceed the stability range, and further the converter is caused to be in an unstable state.
Disclosure of Invention
The invention aims to provide a single-inductor dual-output switch converter self-adaptive slope compensation device and a method, which are used for solving the problem that when a single-inductor dual-output switch converter in the prior art adopts fixed slope compensation, when input voltage or output voltage changes, the fixed compensation slope can possibly cause overcompensation to reduce the transient response performance of the converter; and because the stable range of the fixed slope compensation is limited, when the variation range of the input and output voltages is too large, the system can exceed the stable range, and further the converter is in an unstable state.
The invention solves the problems through the following technical scheme:
a single-inductance double-output switch converter self-adaptive slope compensation device comprises a first voltage detection circuit VS1, a second voltage detection circuit VS2, a third voltage detection circuit VS3, a current detection circuit IS, a timer CLK, a first drive circuit DR1, a second drive circuit DR2, a third drive circuit DR3, a first slope signal generator SGC1, a second slope signal generator SGC2 and a peak current control pulse signal generator PCC, wherein the first voltage detection circuit VS1 IS used for detecting a first output branch voltage of the single-inductance double-output switch converter, the second voltage detection circuit VS2 IS used for detecting a second output branch voltage of the single-inductance double-output switch converter, the current detection circuit IS IS used for detecting an inductance current of the single-inductance double-output switch converter, the third voltage detection circuit VS3 IS used for detecting an input voltage of the single-inductance double-output switch converter, an output end of the timer CLK, an output end of the first voltage detection circuit VS1, an output end of the second voltage detection circuit VS2, and an output end of the third voltage detection circuit VS3 are respectively connected to an input end of the first ramp signal generator SGC1, an output end of the timer CLK and an output end of the first ramp signal generator SGC1 are respectively connected to an input end of the second ramp signal generator SGC2, an output end of the second ramp signal generator SGC2, an output end of the first voltage detection circuit VS1, an output end of the second voltage detection circuit VS2, and an output end of the current detection circuit IS are respectively connected to an input end of the peak current control pulse signal generator PCC, a first output end of the peak current control pulse signal generator PCC IS connected to the first drive circuit DR1, a second output end of the peak current control pulse signal generator PCC IS connected to the second drive circuit DR2, the third output end of the peak current control pulse signal generator PCC is connected with the third driving circuit DR3, the first driving circuit DR1 is used for driving the conduction and the disconnection of a main switching tube of the single-inductance dual-output switching converter, the second driving circuit DR2 is used for driving the conduction and the disconnection of a first output branch switching tube of the single-inductance dual-output switching converter, and the third driving circuit DR3 is used for driving the conduction and the disconnection of a second output branch switching tube of the single-inductance dual-output switching converter.
The first ramp signal generator SGC1 includes a first subtractor SUB1, a second subtractor SUB2, a third subtractor SUB3, a fourth subtractor SUB4, a first proportional amplifier K1, a second proportional amplifier K2, a third proportional amplifier K3, a first adder SUM1, a second adder SUM2, a multiplier MUL, a divider DIV, and a sample holder S/H, wherein:
the output end of the first voltage detection circuit VS1 and the output end of the third voltage detection circuit VS3 are connected with the input end of a second subtracter SUB 2; the output end of the second subtracter SUB2 is connected with the input end of the first proportional amplifier K1, and the output end of the first proportional amplifier K1 and the output end of the third voltage detection circuit VS3 are connected with the input end of the third subtracter SUB 3; the output end of the third subtractor SUB3 and the output end of the second voltage detection circuit VS2 are connected to the input end of the first adder SUM1, and the output end of the first adder SUM1 is connected to the second proportional amplifier K2;
the output end of the third voltage detection circuit VS3 is connected with the input end of the first subtractor SUB1 and the input end of the third proportional amplifier K3, the output end of the third proportional amplifier K3 and the output end of the third voltage detection circuit VS3 are connected with the input end of a fourth subtractor SUB4, and the output end of the fourth subtractor SUB4 and the output end of the second voltage detection circuit VS2 are connected with the input end of a second subtractor SUM 2;
the output terminal of the first subtractor SUB1 and the output terminal of the second subtractor SUM2 are connected to the input terminal of the multiplier MUL, the output terminal of the multiplier MUL and the output terminal of the second proportional amplifier K2 are connected to the input terminal of the divider DIV, the output terminal of the divider DIV and the output terminal of the timer CLK are connected to the input terminal of the sample holder S/H, and the output terminal of the sample holder S/H is connected to the second ramp signal generator SGC 2.
The second ramp signal generator SGC2 includes a voltage controlled current source IinCapacitor C and second switch tube S2A fourth driving circuit DR4, a fourth voltage detecting circuit VS4, wherein:
the input terminal of the fourth driving circuit DR4 is connected to the output terminal of the timer CLK, and the output terminal of the fourth driving circuit DR4 is connected to the fourth driving circuitTwo switching tubes S2The control terminal of (1);
the voltage-controlled current source IinIs connected with the output end of the first ramp signal generator SGC1 and the second switch tube S2A first terminal of the capacitor C and an input terminal of a fourth voltage detection circuit VS4, an output terminal of the fourth voltage detection circuit VS4 being connected to the peak current control pulse signal generator PCC; voltage-controlled current source IinNegative electrode of (1), second switching tube S2And the second terminal of the capacitor C is grounded.
The peak current control pulse signal generator PCC comprises a first error amplifier EA1, a second error amplifier EA2, a fifth subtractor SUB5, a first comparator CMP1, a second comparator CMP2, a first RS flip-flop RS1, a second RS flip-flop RS2, an exclusive or gate XOR, and a not gate NOR, wherein:
the input end of a first error amplifier EA1 IS connected with the output end of a first voltage detection circuit VS1, the output end of a first error amplifier EA1 and the output end of a second ramp signal generator SGC2 are connected with the input end of a fifth subtracter SUB5, the output end of the fifth subtracter SUB5 and the output end of a current detection circuit IS are connected with the input end of a first comparator CMP1, the output end of the first comparator CMP1 IS connected with the R end of a first RS flip-flop RS1 and the R end of a second RS flip-flop RS2, and the S end of the first RS flip-flop RS1 IS connected with a timer CLK;
the input end of the second error amplifier EA2 IS connected with the output end of the second voltage detection circuit VS2, the output end of the second error amplifier EA2 and the output end of the current detection circuit IS are connected with the input end of a second comparator CMP2, and the output end of the second comparator CMP2 IS connected with the S end of a second RS flip-flop RS 2;
the output end of the first RS trigger RS1 is connected with a first driving circuit DR 1; the output of the first RS flip-flop RS1 and the output of the second RS flip-flop RS2 are connected to inputs of an exclusive or gate XOR, the output of which is connected to inputs of the third driver circuit DR3 and a NOR gate NOR, the output of which is connected to the second driver circuit DR 2.
The self-adaptive slope compensation method of the single-inductor double-output switching converter, which is realized by utilizing the self-adaptive slope compensation device of the single-inductor double-output switching converter, comprises the following steps:
in each switching period, continuously and automatically updating the slope compensation slope according to the input voltage of the single-inductor dual-output switching converter, the voltage of the first output branch and the voltage of the second output branch, so as to realize self-adaptive dynamic regulation, specifically:
in each working cycle, the third voltage detection circuit VS3 detects the input voltage converted by the single-inductor double-output switch to obtain a signal VinThe first voltage detection circuit VS1 detects the first branch circuit voltage converted by the single-inductor double-output switch to obtain a signal VoaThe second voltage detection circuit VS2 detects the second branch voltage converted by the single-inductor double-output switch to obtain a signal VobThe timer CLK generating a signal VclkWill signal Vin、Voa、Vob、VclkSent to a first ramp signal generator SGC1 to obtain a signal VshSignal VshHas a slope of
：
Wherein m is1The slope of the inductive current is obtained when the main switching tube is conducted and the first output branch switching tube is conducted; m is2The slope of the inductive current is obtained when the main switching tube is turned off and the first output branch switching tube is turned on; m is3The slope of the inductive current is obtained when the main switching tube is turned off and the second output branch switching tube is turned on; beta is a stability coefficient, so that the main circuit can stably work by ensuring that the micro-disturbance approaches zero after passing through a plurality of periods;
will signal Vsh、VclkSending the signal to a second ramp signal generator SGC2 to obtain an adaptive compensation ramp signal Ic;
will signal Voa、Ic、VobAnd a signal I output from the current detection circuit ISLFed to peak current control pulse signal generator PCC for obtaining signals PWM1, PWMa and PWMb, signal PWM1 forAnd the signal PWMa is used for controlling the on and off of the first output branch switching tube, and the signal PWMb is used for controlling the on and off of the second output branch switching tube.
Compared with the prior art, the invention has the following advantages and beneficial effects:
(1) compared with the existing current type control single-inductor double-output switch converter with fixed slope compensation, the self-adaptive slope compensation single-inductor double-output switch converter has a larger input voltage working range.
(2) Compared with the existing current type control single-inductor double-output switch converter with fixed slope compensation, the self-adaptive slope compensation single-inductor double-output switch converter provided by the invention avoids the problem that the transient response performance of the converter is reduced when the compensation slope is overcompensated and the control mode is changed from current type control to voltage type control, and improves the transient response performance of the converter.
Drawings
FIG. 1 is a block diagram of the circuit configuration of the present invention;
fig. 2 is a block diagram of a circuit configuration of the first ramp signal generator SGC1 of fig. 1;
fig. 3 is a block diagram of a circuit configuration of the second ramp signal generator SGC2 of fig. 1;
fig. 4 is a block diagram of a circuit configuration of the peak current control pulse signal generator PCC of fig. 1;
FIG. 5 is a waveform diagram of the inductor current of FIG. 1 without slope compensation, with the main circuit adding adaptive slope compensation, and with the main circuit adding overcompensated slope, where (a) is the main circuit without slope compensation inductor current ILA waveform diagram of (a); (b) adding self-adaptive slope compensation inductive current I to main circuitLA waveform diagram of (a); (c) inductive current I for main circuit adding over-compensation slopeLA waveform diagram of (a);
fig. 6 is a transient time domain simulation waveform diagram of the peak current mode control method without slope compensation in fig. 1, when controlling the single-inductor dual-output Boost converter to operate in a steady state, wherein: (a) for the inductive current ILThe transient time domain simulation oscillogram of (1); (b) to output a voltage Voa、VobThe transient time domain simulation oscillogram of (1);
FIG. 7 is a waveform diagram of the peak current type single inductor dual output Boost converter without slope compensation in FIG. 1 when the input voltage suddenly changes (the input voltage Vin changes from 8V → 6V), where (a) is the inductor current ILThe simulated waveform of (2); (b) to output a voltage Voa、VobThe transient time domain simulation waveform of (1); (c) for the inductive current ILTransient time domain simulation waveforms;
FIG. 8 is a waveform diagram of the peak current type controlled single inductor dual output Boost converter with fixed slope compensation in FIG. 1, when the input voltage is suddenly changed (the input voltage Vin changes from 8V → 6V), wherein (a) is the inductor current ILA simulated waveform diagram of (1); (b) to output a voltage Voa、VobThe transient time domain simulation oscillogram of (1); (c) for the inductive current ILThe transient time domain simulation oscillogram of (1);
FIG. 9 is a waveform diagram of the peak current type controlled single inductor dual output Boost converter with adaptive slope compensation added in FIG. 1 when the input voltage suddenly changes (the input voltage Vin changes from 8V → 6V), where (a) is the inductor current ILA simulated waveform diagram of (1); (b) to output a voltage Voa、VobThe transient time domain simulation oscillogram of (1); (c) for the inductive current ILThe transient time domain simulation oscillogram of (1);
FIG. 10 is a waveform diagram of the peak current type controlled single inductor dual output Boost converter with constant slope compensation in FIG. 1, when the input voltage is suddenly changed (the input voltage Vin changes from 6V → 4V), wherein (a) is the inductor current ILA simulated waveform diagram of (1); (b) to output a voltage Voa、VobThe transient time domain simulation oscillogram of (1); (c) for the inductive current ILThe transient time domain simulation oscillogram of (1);
fig. 11 is a waveform diagram of the peak current type controlled single inductor dual output Boost converter with adaptive slope compensation added in fig. 1 when the input voltage suddenly changes (the input voltage Vin changes from 6V → 4V), wherein (a) is the inductor current ILSimulated wave ofA graphical diagram; (b) to output a voltage Voa、VobThe transient time domain simulation oscillogram of (1); (c) for the inductive current ILThe transient time domain simulation oscillogram of (1);
fig. 12 is a circuit configuration block diagram of the second embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to examples, but the embodiments of the present invention are not limited thereto.
Example 1:
referring to fig. 1, an adaptive slope compensation apparatus for a single-inductor dual-output switching converter includes a first voltage detection circuit VS1, a second voltage detection circuit VS2, a third voltage detection circuit VS3, a current detection circuit IS, a timer CLK, a first driving circuit DR1, a second driving circuit DR2, a third driving circuit DR3, a first slope signal generator SGC1, a second slope signal generator SGC2, and a peak current control pulse signal generator PCC, wherein the first voltage detection circuit VS1 IS configured to detect a first output branch voltage of the single-inductor dual-output switching converter, the second voltage detection circuit VS2 IS configured to detect a second output branch voltage of the single-inductor dual-output switching converter, the current detection circuit IS configured to detect an inductor current of the single-inductor dual-output switching converter, the third voltage detection circuit VS3 IS configured to detect an input voltage of the single-inductor dual-output switching converter, an output end of the timer CLK, an output end of the first voltage detection circuit VS1, an output end of the second voltage detection circuit VS2, and an output end of the third voltage detection circuit VS3 are respectively connected to an input end of the first ramp signal generator SGC1, an output end of the timer CLK and an output end of the first ramp signal generator SGC1 are respectively connected to an input end of the second ramp signal generator SGC2, an output end of the second ramp signal generator SGC2, an output end of the first voltage detection circuit VS1, an output end of the second voltage detection circuit VS2, and an output end of the current detection circuit IS are respectively connected to an input end of the peak current control pulse signal generator PCC, a first output end of the peak current control pulse signal generator PCC IS connected to the first drive circuit DR1, a second output end of the peak current control pulse signal generator PCC IS connected to the second drive circuit DR2, the third output end of the peak current control pulse signal generator PCC is connected with the third driving circuit DR3, the first driving circuit DR1 is used for driving the conduction and the disconnection of a main switching tube of the single-inductance dual-output switching converter, the second driving circuit DR2 is used for driving the conduction and the disconnection of a first output branch switching tube of the single-inductance dual-output switching converter, and the third driving circuit DR3 is used for driving the conduction and the disconnection of a second output branch switching tube of the single-inductance dual-output switching converter.
In each working period, the input voltage is detected to obtain a signal VinDetecting the voltages of the two output branches to obtain a signal Voa、VobThe timer CLK generating a signal Vclk(ii) a Will Vin、Voa、Vob、VclkSent to a first ramp signal generator SGC1 to obtain a signal Vsh：
Will Vsh、VclkSending the signal to a second ramp signal generator SGC2 to obtain an adaptive compensation ramp signal Ic。
When the fixed slope compensation is added, the main circuit works in a stable state when the input voltage is in the following range:
wherein, L is the inductance value,
the slope compensation circuit has the advantages that the slope compensation circuit is used for slope compensation slope, when adaptive slope compensation is added, the input voltage can stably work in a full range, the situation that when the input voltage changes excessively, the slope compensation slope exceeds a limited range, and tiny disturbance is amplified after multiple cycles, so that the circuit cannot work in a stable state is avoided. The operating voltage range of the present invention is therefore much larger.
Further, as shown in fig. 2, the first ramp signal generator SGC1 includes a first subtractor SUB1, a second subtractor SUB2, a third subtractor SUB3, a fourth subtractor SUB4, a first proportional amplifier K1, a second proportional amplifier K2, a third proportional amplifier K3, a first adder SUM1, a second adder SUM2, a multiplier MUL, a divider DIV, and a sample holder S/H, wherein:
the output end of the first voltage detection circuit VS1 and the output end of the third voltage detection circuit VS3 are connected with the input end of a second subtracter SUB 2; the output end of the second subtracter SUB2 is connected with the input end of the first proportional amplifier K1, and the output end of the first proportional amplifier K1 and the output end of the third voltage detection circuit VS3 are connected with the input end of the third subtracter SUB 3; the output end of the third subtractor SUB3 and the output end of the second voltage detection circuit VS2 are connected to the input end of the first adder SUM1, and the output end of the first adder SUM1 is connected to the second proportional amplifier K2;
the output end of the third voltage detection circuit VS3 is connected with the input end of the first subtractor SUB1 and the input end of the third proportional amplifier K3, the output end of the third proportional amplifier K3 and the output end of the third voltage detection circuit VS3 are connected with the input end of the fourth subtractor SUB4, the output end of the fourth subtractor SUB4 and the output end of the second voltage detection circuit VS2 are connected with the input end of the second subtractor SUM2,
the output terminal of the first subtractor SUB1 and the output terminal of the second subtractor SUM2 are connected to the input terminal of the multiplier MUL, the output terminal of the multiplier MUL and the output terminal of the second proportional amplifier K2 are connected to the input terminal of the divider DIV, the output terminal of the divider DIV and the output terminal of the timer CLK are connected to the input terminal of the sample holder S/H, and the output terminal of the sample holder S/H is connected to the second ramp signal generator SGC 2.
Will signal VoaAnd VinIs fed to a second subtractor SUB2, the second subtractor SUB2 being connected to a first proportional amplifier K1, the first proportional amplifier K1 and the signal VinAs input signals to a third subtractor SUB3, a third subtractor SUB3 and a signal VobAs input signals for the first summer SUM1, a first summer SUM1 and a second proportional amplifier K2Connecting; will signal VinFed into a third proportional amplifier K3, the third proportional amplifier K3 and the signal Vin as input signals to a fourth subtractor SUB4, a fourth subtractor SUB4 and a signal VobAs an input signal to a second summer SUM 2; will signal VinFed into a first subtractor SUB1, the first subtractor SUB1 and a second adder SUM2 being input terminals of a multiplier MUL, the multiplier MUL and a second proportional amplifier K2 being input terminals of a divider DIV, the divider DIV and a signal VclkAs input signal to the sample-and-hold device S/H.
As shown in connection with fig. 3, the second ramp signal generator SGC2 includes a voltage-controlled current source IinCapacitor C and second switch tube S2A fourth driving circuit DR4, a fourth voltage detecting circuit VS4, wherein:
the input terminal of the fourth driving circuit DR4 is connected to the output terminal of the timer CLK, and the output terminal of the fourth driving circuit DR4 is connected to the second switch tube S2The control terminal of (1);
the voltage-controlled current source IinIs connected with the output end of the first ramp signal generator SGC1 and the second switch tube S2A first terminal of the capacitor C and an input terminal of a fourth voltage detection circuit VS4, an output terminal of the fourth voltage detection circuit VS4 being connected to the peak current control pulse signal generator PCC; voltage-controlled current source IinNegative electrode of (1), second switching tube S2And the second terminal of the capacitor C is grounded.
As shown in fig. 4, the peak current control pulse signal generator PCC includes a first error amplifier EA1, a second error amplifier EA2, a fifth subtractor SUB5, a first comparator CMP1, a second comparator CMP2, a first RS flip-flop RS1, a second RS flip-flop RS2, an exclusive or gate XOR, and a not gate NOR; will signal VoaSending the signal to a first error amplifier EA1 to obtain a signal IrefWill signal IrefAnd IcFed into a fifth subtractor SUB5, a fifth subtractor SUB5 and a signal ILThe first comparator CMP1 is connected to the R terminal of the first RS flip-flop RS1 as an input terminal of the first comparator CMP1, the signal VclkAs input signal of S terminal of first RS trigger RS1The Q end of the first RS trigger RS1 generates a pulse signal PWM1 to control the on and off of a main switching tube; will signal VobSending the signal to a second error amplifier EA2 to obtain a signal Iref2Will signal ILAnd Iref2The output of the second comparator CMP2 is connected with the S end of the second flip-flop RS2, the output of the first comparator CMP1 is connected with the R end of the second flip-flop RS2, the Q end of the first flip-flop RS1 and the Q end of the second flip-flop RS2 are used as the input end of an exclusive-OR gate XOR, the output end of the exclusive-OR gate XOR generates a pulse signal PWMb to control the on and off of a switch tube of the second output branch, the exclusive-OR gate XOR is connected with a NOR, the NOR generates a pulse signal PWMa to control the on and off of a switch tube of the output branch.
The working process and principle are as follows: the first output branch (i.e. branch a, comprising a switch S)aDiode D1Capacitor CoaResistance RcaAnd a resistance Ra) Output voltage signal VoaObtaining a current reference value I through a first error amplifier EA1ref(ii) a The second output branch (i.e. branch b, comprising switch S)bDiode D2Capacitor CobResistance RcbAnd a resistance Rb) Output voltage signal VobObtaining a current reference value I through a second error amplifier EA2ref2To convert the signal Vin、Voa、Vob、VclkSent to a first ramp signal generator SGC1 to obtain a signal VshWill signal VshAnd VclkSending the signal into a two-ramp signal generator SGC2 to obtain an adaptive compensation ramp signal IcWill signal Iref、Iref2、Ic、ILAnd sending the pulse signals into a peak current control pulse signal generator PCC to obtain a control signal pulse PWM1 for controlling the on and off of a main switching tube, a control signal pulse PWMa for controlling the on and off of a branch switching tube a and a control signal pulse PWMb for controlling the on and off of a branch switching tube b.
First ramp signal generator SGC1 completes signal VshGeneration and output of (2): according to the formula
Obtain a signal VshThe magnitude of this value is the compensation ramp slope.
Second ramp signal generator SGC2 completes signal IcGeneration and output of (2): the timer CLK is high at the beginning of each cycle with a very small duty cycle; at the beginning of the cycle, signal VclkAt a high level, the first switch tube S1Closed, capacitor C at signal VclkRapidly discharging to zero during high level period; signal VclkWhen the voltage is low, the first switch tube S1Disconnected, voltage-controlled current source IinCharging a capacitor C with a voltage across the capacitor C
Until the next cycle begins.
The peak current control pulse signal generator PCC completes the generation and output of the signals PWM1, PWMa, PWMb: reference value signal IrefAnd compensating the ramp signal IcObtaining a reference value signal I of the output current of the a branch circuit by differenceref1When the period starts, the output signal of the timer CLK is high level, the inductive current is less than the reference value signal I of the a branch output currentref1At this time, the first comparator CMP1 outputs a low level, the input signal at the R terminal of the first RS flip-flop RS1 is a low level, the input signal at the S terminal is a high level, the output signal at the Q terminal thereof is a high level, and the main switch tube S is connected to the output terminal of the first RS flip-flop RS11Conducting; inductor current signal ILIs also smaller than the output current reference value signal I of the b branchref2At this time, the second comparator CMP2 outputs a high level, the S-terminal input signal of the second RS flip-flop RS2 is a high level, the R-terminal input signal is a low level, the Q-terminal output signal is a high level, the XOR output signal of the XOR gate is a low level, the NOR output signal of the NOR gate is a high level, and the a-branch switch tube SaConducting b branch switch tube SbTurning off; when the inductor current signal ILRising to a branch circuit output current reference value signal Iref1While the first comparator CMP1 outputs a high level, the first RS is touchedThe input signal of the R end of the generator RS1 is high level, the input signal of the S end is low level, the output signal of the Q end is low level, and the main switch tube S1The inductor current is reduced when the switch is switched off; when the inductor current signal ILDown to b branch output current reference value signal Iref2When the voltage is high, the second comparator CMP2 outputs a high level, the S-terminal input signal of the second RS flip-flop RS2 is a high level, the R-terminal input signal is a low level, the Q-terminal output signal is a high level, the XOR output signal of the XOR gate is a high level, the NOR output signal of the NOR gate is a low level, and the a-branch switching tube SaSwitch tube S of switch-off branch bbAnd conducting.
In FIG. 5, m1The slope of the inductive current when the main switch tube is conducted and the first output branch switch tube is conducted is the slope of the rising stage of the inductive current, m2The slope of the inductive current when the main switch tube is turned off and the first output branch switch tube is turned on, i.e. the slope of the first descending stage of the inductive current, m3The slope of the inductive current when the main switch tube is turned off and the second output branch switch tube is turned on, i.e. the slope of the second descending stage of the inductive current, mc1The slope is compensated for. Fig. 5 shows (a) an inductor current waveform when no slope compensation is added, (b) an inductor current waveform when adaptive slope compensation is added, and (c) an inductor current waveform when overcompensation is added. As can be seen from fig. 5: the change trend of the inductive current during overcompensation can not reflect the influence of the working state of the circuit on the conduction time of the main switching tube, the conduction time of the main switching tube is determined by a compensation ramp sawtooth wave signal to a great extent, and the control mode is changed from current mode control to voltage mode control. Therefore, compared with the current type control single-inductor dual-output switching converter with fixed slope compensation, the self-adaptive slope compensation single-inductor dual-output switching converter provided by the invention avoids the problem that the transient response performance of the converter is reduced when the compensation slope is over-compensated and the control mode is changed from current type control to voltage type control, and improves the transient response performance of the converter.
The PSIM simulation software is used for carrying out time domain simulation analysis on the method of the embodiment, and the result is as follows.
Peak currentWhen the type control single-inductor double-output Boost converter works in a steady state, an inductor current signal ILAnd an output voltage signal Voa、VobThe steady state waveform of (2) is shown in fig. 6. Simulation conditions are as follows: input voltage Vin=8V, voltage reference value Voa=24V、Vob=15V, inductance L =100 μ H, capacitance Coa=Cob=470 μ F (equivalent series resistance of 50m Ω), and a load resistance Roa=48Ω、Rob=30Ω。
Fig. 7 shows a peak current mode control single-inductor dual-output Boost converter without ramp compensation (i.e., a circuit for compensating when the slope of the ramp is zero) under the condition of input voltage VinAt time of sudden change (input voltage V)inChanging from 8V → 6V), inductor current ILAn output voltage Voa、VobTime domain simulation waveform diagram of (1).
FIG. 8 shows a peak current mode controlled single inductor dual output Boost converter with fixed slope compensation applied to input voltage VinAt time of sudden change (input voltage V)inChanging from 8V → 6V), the time domain simulated waveform diagram of the inductor current, the output voltage.
FIG. 9 shows that the peak current mode control single-inductor dual-output Boost converter adds adaptive slope compensation to the input voltage VinAt time of sudden change (input voltage V)inChanging from 8V → 6V), the time domain simulated waveform diagram of the inductor current, the output voltage.
Comparing the inductor currents I of FIGS. 7, 8 and 9, respectivelyLAn output voltage Voa、VobThe transient experiment result shows that: when the peak current type control single-inductor dual-output Boost converter does not add slope compensation, when the input voltage V is inputinDown to b branch output voltage VobBelow half, the converter appears unstable; after adding slope compensation, when the input voltage V isinDown to b branch output voltage VobAnd when the voltage is less than half of the voltage, the converter can still stably work.
FIG. 10 shows a peak current mode controlled single inductor dual output Boost converter with fixed slope compensation applied at input voltage VinAt the time of sudden change (input voltage Vin from 6V →4V variation), time domain simulation oscillogram of the inductive current and the output voltage.
FIG. 11 shows that the peak current mode control single-inductor dual-output Boost converter adds adaptive slope compensation to the input voltage VinAt time of sudden change (input voltage V)inVarying from 6V → 4V), a time-domain simulated waveform plot of the inductor current, the output voltage.
Comparing the inductor current I of FIGS. 10 and 11LAn output voltage Voa、VobThe transient experiment result shows that: when the input voltage VinWhen the descending amplitude is too large, the converter added with the fixed slope compensation can not work in a stable state, but the converter adopting the self-adaptive slope compensation can still work in a stable state, and the input voltage V of the converter isinThe stable working range of the device is greatly increased.
Example 2:
on the basis of embodiment 1, the single-inductor dual-output switching Boost converter (TD) is replaced by a single-inductor dual-output Buck converter (TC), as shown in fig. 12.
The invention can also be used in various multi-output circuit topologies such as a single-inductor dual-output Buck-Boost converter, a single-inductor dual-output Bioplor converter and the like.
Example 3:
the self-adaptive slope compensation method of the single-inductor double-output switching converter, which is realized by utilizing the self-adaptive slope compensation device of the single-inductor double-output switching converter, comprises the following steps:
in each switching period, continuously and automatically updating the slope compensation slope according to the input voltage of the single-inductor dual-output switching converter, the voltage of the first output branch and the voltage of the second output branch, so as to realize self-adaptive dynamic regulation, specifically:
in each working cycle, the third voltage detection circuit VS3 detects the input voltage converted by the single-inductor double-output switch to obtain a signal VinThe first voltage detection circuit VS1 detects the first branch circuit voltage converted by the single-inductor double-output switch to obtain a signal VoaThe second voltage detection circuit VS2 detects the second branch voltage converted by the single-inductor double-output switch to obtain a signal VobTo determineThe timer CLK generates a signal VclkWill signal Vin、Voa、Vob、VclkSent to a first ramp signal generator SGC1 to obtain a signal VshSignal VshThe slope compensation slope of (a) is:
wherein m is1The slope of the inductive current is obtained when the main switching tube is conducted and the first output branch switching tube is conducted; m is2The slope of the inductive current is obtained when the main switching tube is turned off and the first output branch switching tube is turned on; m is3The slope of the inductive current is obtained when the main switching tube is turned off and the second output branch switching tube is turned on; the main circuit is a stable coefficient, so that the main circuit can stably work due to the fact that micro-disturbance approaches to zero after a plurality of periods;
will signal Vsh、VclkSending the signal to a second ramp signal generator SGC2 to obtain an adaptive compensation ramp signal Ic;
will signal Voa、Ic、VobAnd a signal I output from the current detection circuit ISLAnd sending the peak current control pulse signal generator PCC to obtain signals PWM1, PWMa and PWMb, wherein the signal PWM1 is used for controlling the conduction and the disconnection of the main switching tube, the signal PWMa is used for controlling the conduction and the disconnection of the first output branch switching tube, and the signal PWMb is used for controlling the conduction and the disconnection of the second output branch switching tube.
Although the present invention has been described herein with reference to the illustrated embodiments thereof, which are intended to be preferred embodiments of the present invention, it is to be understood that the invention is not limited thereto, and that numerous other modifications and embodiments can be devised by those skilled in the art that will fall within the spirit and scope of the principles of this disclosure.
Claims (5)
1. An adaptive slope compensation device of a single-inductor double-output switching converter IS characterized by comprising a first voltage detection circuit VS1, a second voltage detection circuit VS2, a third voltage detection circuit VS3, a current detection circuit IS, a timer CLK, a first drive circuit DR1, a second drive circuit DR2, a third drive circuit DR3, a first slope signal generator SGC1, a second slope signal generator SGC2 and a peak current control pulse signal generator PCC, wherein the first voltage detection circuit VS1 IS used for detecting a first output branch voltage of the single-inductor double-output switching converter, the second voltage detection circuit VS2 IS used for detecting a second output branch voltage of the single-inductor double-output switching converter, the current detection circuit IS IS used for detecting an inductor current of the single-inductor double-output switching converter, the third voltage detection circuit VS3 IS used for detecting an input voltage of the single-inductor double-output switching converter, an output end of the timer CLK, an output end of the first voltage detection circuit VS1, an output end of the second voltage detection circuit VS2, and an output end of the third voltage detection circuit VS3 are respectively connected to an input end of the first ramp signal generator SGC1, an output end of the timer CLK and an output end of the first ramp signal generator SGC1 are respectively connected to an input end of the second ramp signal generator SGC2, an output end of the second ramp signal generator SGC2, an output end of the first voltage detection circuit VS1, an output end of the second voltage detection circuit VS2, and an output end of the current detection circuit IS are respectively connected to an input end of the peak current control pulse signal generator PCC, a first output end of the peak current control pulse signal generator PCC IS connected to the first drive circuit DR1, a second output end of the peak current control pulse signal generator PCC IS connected to the second drive circuit DR2, the third output end of the peak current control pulse signal generator PCC is connected with the third driving circuit DR3, the first driving circuit DR1 is used for driving the conduction and the disconnection of a main switching tube of the single-inductance dual-output switching converter, the second driving circuit DR2 is used for driving the conduction and the disconnection of a first output branch switching tube of the single-inductance dual-output switching converter, and the third driving circuit DR3 is used for driving the conduction and the disconnection of a second output branch switching tube of the single-inductance dual-output switching converter.
2. The single-inductor dual-output switching converter adaptive slope compensation device of claim 1, wherein the first slope signal generator SGC1 comprises a first subtractor SUB1, a second subtractor SUB2, a third subtractor SUB3, a fourth subtractor SUB4, a first proportional amplifier K1, a second proportional amplifier K2, a third proportional amplifier K3, a first adder SUM1, a second adder SUM2, a multiplier MUL, a divider DIV, and a sample holder S/H, wherein:
the output end of the first voltage detection circuit VS1 and the output end of the third voltage detection circuit VS3 are connected with the input end of a second subtracter SUB 2; the output end of the second subtracter SUB2 is connected with the input end of the first proportional amplifier K1, and the output end of the first proportional amplifier K1 and the output end of the third voltage detection circuit VS3 are connected with the input end of the third subtracter SUB 3; the output end of the third subtractor SUB3 and the output end of the second voltage detection circuit VS2 are connected to the input end of the first adder SUM1, and the output end of the first adder SUM1 is connected to the second proportional amplifier K2;
the output end of the third voltage detection circuit VS3 is connected with the input end of the first subtractor SUB1 and the input end of the third proportional amplifier K3, the output end of the third proportional amplifier K3 and the output end of the third voltage detection circuit VS3 are connected with the input end of a fourth subtractor SUB4, and the output end of the fourth subtractor SUB4 and the output end of the second voltage detection circuit VS2 are connected with the input end of a second subtractor SUM 2;
the output terminal of the first subtractor SUB1 and the output terminal of the second subtractor SUM2 are connected to the input terminal of the multiplier MUL, the output terminal of the multiplier MUL and the output terminal of the second proportional amplifier K2 are connected to the input terminal of the divider DIV, the output terminal of the divider DIV and the output terminal of the timer CLK are connected to the input terminal of the sample holder S/H, and the output terminal of the sample holder S/H is connected to the second ramp signal generator SGC 2.
3. The single-inductor dual-output switching converter adaptive slope compensation device according to claim 1 or 2, wherein the second slope signal generator SGC2 comprises a voltage-controlled current source IinCapacitor C and second switch tube S2A fourth driving circuit DR4, a fourth voltage detecting circuit VS4, wherein:
the input terminal of the fourth driving circuit DR4 is connected to the output terminal of the timer CLK, and the output terminal of the fourth driving circuit DR4 is connected to the second switch tube S2The control terminal of (1);
the voltage-controlled current source IinIs connected with the output end of the first ramp signal generator SGC1 and the second switch tube S2A first terminal of the capacitor C and an input terminal of a fourth voltage detection circuit VS4, an output terminal of the fourth voltage detection circuit VS4 being connected to the peak current control pulse signal generator PCC; voltage-controlled current source IinNegative electrode of (1), second switching tube S2And the second terminal of the capacitor C is grounded.
4. The single-inductor dual-output switching converter adaptive slope compensation device according to claim 3, wherein the peak current control pulse signal generator PCC comprises a first error amplifier EA1, a second error amplifier EA2, a fifth subtractor SUB5, a first comparator CMP1, a second comparator CMP2, a first RS flip-flop RS1, a second RS flip-flop RS2, an exclusive-OR gate XOR, and a NOR gate NOR, wherein:
the input end of a first error amplifier EA1 IS connected with the output end of a first voltage detection circuit VS1, the output end of a first error amplifier EA1 and the output end of a second ramp signal generator SGC2 are connected with the input end of a fifth subtracter SUB5, the output end of the fifth subtracter SUB5 and the output end of a current detection circuit IS are connected with the input end of a first comparator CMP1, the output end of the first comparator CMP1 IS connected with the R end of a first RS flip-flop RS1 and the R end of a second RS flip-flop RS2, and the S end of the first RS flip-flop RS1 IS connected with a timer CLK;
the input end of the second error amplifier EA2 IS connected with the output end of the second voltage detection circuit VS2, the output end of the second error amplifier EA2 and the output end of the current detection circuit IS are connected with the input end of a second comparator CMP2, and the output end of the second comparator CMP2 IS connected with the S end of a second RS flip-flop RS 2;
the output end of the first RS trigger RS1 is connected with a first driving circuit DR 1; the output of the first RS flip-flop RS1 and the output of the second RS flip-flop RS2 are connected to inputs of an exclusive or gate XOR, the output of which is connected to inputs of the third driver circuit DR3 and a NOR gate NOR, the output of which is connected to the second driver circuit DR 2.
5. A single-inductor dual-output switching converter adaptive slope compensation method implemented by the device according to any one of claims 1-4, comprising:
in each switching period, continuously and automatically updating the slope compensation slope according to the input voltage of the single-inductor dual-output switching converter, the voltage of the first output branch and the voltage of the second output branch, so as to realize self-adaptive dynamic regulation, specifically:
in each working cycle, the third voltage detection circuit VS3 detects the input voltage converted by the single-inductor double-output switch to obtain a signal VinThe first voltage detection circuit VS1 detects the first branch circuit voltage converted by the single-inductor double-output switch to obtain a signal VoaThe second voltage detection circuit VS2 detects the second branch voltage converted by the single-inductor double-output switch to obtain a signal VobThe timer CLK generating a signal VclkWill signal Vin、Voa、Vob、VclkSent to a first ramp signal generator SGC1 to obtain a signal VshSignal VshThe slope compensation slope of (a) is:
wherein m is1The slope of the inductive current is obtained when the main switching tube is conducted and the first output branch switching tube is conducted; m is2The slope of the inductive current is obtained when the main switching tube is turned off and the first output branch switching tube is turned on; m is3The slope of the inductive current is obtained when the main switching tube is turned off and the second output branch switching tube is turned on; beta is a stability factor;
will signal Vsh、VclkSending the signal to a second ramp signal generator SGC2 to obtain an adaptive compensation ramp signal Ic;
will signal Voa、Ic、VobAnd a signal I output from the current detection circuit ISLFed into peak current control pulse signal generator PCC to obtain signals PWM1, PWMa andPWMb, signal PWM1 is used for controlling the on and off of the main switch tube, signal PWMa is used for controlling the on and off of the first output branch switch tube, and signal PWMb is used for controlling the on and off of the second output branch switch tube.
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