CN113395048A - Mixed compensation three-stage operational amplifier - Google Patents
Mixed compensation three-stage operational amplifier Download PDFInfo
- Publication number
- CN113395048A CN113395048A CN202010166271.XA CN202010166271A CN113395048A CN 113395048 A CN113395048 A CN 113395048A CN 202010166271 A CN202010166271 A CN 202010166271A CN 113395048 A CN113395048 A CN 113395048A
- Authority
- CN
- China
- Prior art keywords
- transistor
- compensation
- module
- operational amplifier
- amplification module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
The invention provides a hybrid compensation three-stage operational amplifier, which combines a feed forward (fed) compensation method and a Miller (Miller) compensation method, can effectively compensate the phase of the three-stage operational amplifier, effectively control the power consumption of the three-stage operational amplifier under the condition of maintaining a certain bandwidth, and simultaneously reduce the influence of the feed forward on the output by utilizing the Miller compensation, so that the hybrid compensation three-stage operational amplifier can be applied to the design of a high-precision low-power converter. The feedforward path is changed from two original paths into one path, so that the influence of the feedforward path is reduced, and compared with feedforward compensation, the speed of establishing the output signal of the amplifier is increased; however, since the second and third stages employ miller compensation, the unity gain bandwidth of the amplifier may be reduced compared to the feedforward compensation. Therefore, a hybrid compensated three stage operational amplifier of the present invention provides a good compromise between speed and bandwidth.
Description
Technical Field
The invention relates to the field of electronic circuits, in particular to a hybrid compensation three-stage operational amplifier.
Background
In view of the development of Complementary Metal Oxide Semiconductor (CMOS) technology, the size of the transistor is continuously reduced, and the intrinsic gain of the transistor is also reduced, and usually below 65nm technology, the intrinsic gain of the transistor is less than or equal to 10. Therefore, the multistage amplifier is the first choice to design and realize an amplifier with high gain (more than or equal to 60dB) in the advanced process.
But the speed of the multi-stage amplifier is slow and can be traded for power consumption if not considered, but this approach is not desirable in engineering applications. Therefore, with the conventional scheme, low power consumption and high speed cannot be compatible in a multistage amplifier at the same time.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, it is an object of the present invention to provide a hybrid compensated three-stage operational amplifier for solving the problem of the prior art that low power consumption and high speed cannot be compatible in a multi-stage amplifier at the same time.
To achieve the above and other related objects, the present invention provides a hybrid compensated three-stage operational amplifier, comprising:
the device comprises a first amplification module, a second amplification module, a third amplification module, a feedforward module and a compensation module;
the input end of the three-stage operational amplifier is electrically connected with the input end of the first amplification module;
the first amplification module, the second amplification module, the compensation module and the third amplification module are sequentially connected in series; the output end of the third amplification module is the output end of the three-stage operational amplifier;
the compensation module comprises a compensation capacitor and a compensation resistor which are connected in series;
the input end of the feedforward module is electrically connected with the input end of the three-stage operational amplifier; and the output end of the feedforward module is electrically connected with the output end of the second amplification module.
Further, the compensation module comprises a compensation capacitor and a compensation resistor which are connected in series.
Further, the transconductance of the first amplifying module is gm1The transconductance of the second amplifying module is gm2The transconductance of the third-party large module is gm3(ii) a The compensation resistor is R and satisfies the following conditions: r is 1/gm3。
Further, the three-stage operational amplifier further comprises a current supply module; the current supply module supplies current to the first amplification module, the second amplification module and the third amplification module.
Further, the first amplifying module includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor; the first transistor, the second transistor and the third transistor are NPN type transistor; the fourth transistor and the fifth transistor are PNP type transistor; the base electrode of the first transistor is connected with the output end of the current supply module, and the emitter electrode of the first transistor is connected with the grounding end; a collector of the first transistor is connected to emitters of the second transistor and the third transistor, respectively, a base of the second transistor is a positive input signal end of the first amplification module, and a base of the third transistor is a negative input signal end of the first amplification module; a collector electrode of the second transistor is connected with a positive output end of the first amplification module, and a collector electrode of the third transistor is connected with a negative output end of the first amplification module; the base electrodes of the fourth transistor and the fifth transistor are connected with a bias power supply of the first amplification module; emitters of the fourth transistor and the fifth transistor are connected with a positive power supply of the three-stage operational amplifier; and the collector electrode of the fourth transistor is connected with the positive output end of the first amplification module, and the collector electrode of the fifth transistor is connected with the negative output end of the first amplification module.
Further, the second amplifying module comprises a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor and an eleventh transistor; the sixth transistor and the seventh transistor are PNP type transistor; the eighth transistor, the ninth transistor, the tenth transistor, and the eleventh transistor are NPN-type transistors; bases of the sixth transistor and the seventh transistor are respectively connected with a positive output end and a negative output end of the first amplification module; the emitters of the sixth transistor and the seventh transistor are connected with a positive power supply of the three-stage operational amplifier; collectors of the sixth transistor and the seventh transistor are respectively connected with a positive output end and a negative output end of the second amplification module; collectors of the eighth transistor and the ninth transistor are respectively connected with a positive output end and a negative output end of the second amplification module; bases of the eighth transistor and the ninth transistor are respectively connected with a positive input signal end and a negative input signal end of the second amplification module; the emitters of the eighth transistor and the ninth transistor are respectively connected with the collectors of the tenth transistor and the eleventh transistor; emitters of the tenth transistor and the eleventh transistor are both connected with a ground terminal; bases of the tenth transistor and the eleventh transistor are both connected with an output end of the current supply module.
Further, the third amplifying module includes a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, and a seventeenth transistor; the twelfth transistor and the thirteenth transistor are PNP type transistor; the fourteenth transistor, the fifteenth transistor, the sixteenth transistor and the seventeenth transistor are NPN-type transistors; the emitters of the twelfth transistor and the thirteenth transistor are connected with a positive power supply of the three-stage operational amplifier; bases of the twelfth transistor and the thirteenth transistor are respectively connected with a positive output end and a negative output end of the second amplification module; a collector of the twelfth transistor is connected to a collector of the fourteenth transistor; a collector of the thirteenth transistor is connected to a collector of the fifteenth transistor; the base electrodes of the fourteenth transistor and the fifteenth transistor are connected with a bias power supply of the third amplification module; an emitter of the fourteenth transistor is connected to a collector of the sixteenth transistor; an emitter of the fifteenth transistor is connected to a collector of the seventeenth transistor; the base electrodes of the sixteenth transistor and the seventeenth transistor are connected with the output end of the current supply module; and the emitting electrodes of the sixteenth transistor and the seventeenth transistor are both connected with a grounding end.
Further, the compensation module comprises a first compensation sub-module and a second compensation sub-module; the first compensation module comprises a first compensation resistor and a first compensation capacitor which are connected in series; the second compensation module comprises a second compensation resistor and a second compensation capacitor which are connected in series; one end of the first compensation resistor, which is far away from the first compensation capacitor, is connected with the positive output end of the second amplification module; one end of the second compensation resistor, which is far away from the second compensation capacitor, is connected with the negative output end of the second amplification module; one end of the first compensation capacitor, which is far away from the first compensation resistor, is connected with a collector of the twelfth transistor; one end of the second compensation capacitor, which is far away from the second compensation resistor, is connected with the collector of the thirteenth transistor.
Further, the current supply module comprises an eighteenth transistor; the eighteenth transistor is an NPN type transistor.
Further, a collector of the eighteenth transistor is connected to a current source; the base electrode of the eighteenth transistor is connected with the collector electrode of the eighteenth transistor; the base electrode of the eighteenth transistor is the output end of the current supply module; and the emitter of the eighteenth transistor is connected with the grounding end.
As described above, the hybrid compensated three-stage operational amplifier of the present invention has the following beneficial effects:
the invention combines a feed forward compensation method and a Miller compensation method, can effectively compensate the phase of the three-stage operational amplifier, effectively controls the power consumption of the three-stage operational amplifier under the condition of maintaining a certain bandwidth, and simultaneously reduces the influence of the feed forward on the output by utilizing the advantages of the Miller compensation, so that the invention can be applied to the design of a high-precision low-power converter. The feedforward path is changed from two original paths into one path, so that the influence of the feedforward path is reduced, and compared with feedforward compensation, the speed of establishing the output signal of the amplifier is increased; however, since the second and third stages employ miller compensation, the unity gain bandwidth of the amplifier may be reduced compared to the feedforward compensation. Therefore, a hybrid compensated three stage operational amplifier of the present invention provides a good compromise between speed and bandwidth.
Drawings
Fig. 1 is a schematic diagram of a conventional three-stage operational amplifier using miller compensation.
Fig. 2 is a schematic diagram of a conventional three-stage operational amplifier employing feed forward compensation.
Fig. 3 is a schematic diagram of a hybrid compensated three-stage operational amplifier according to an embodiment of the invention.
Fig. 4 shows a specific circuit diagram of a hybrid compensated three-stage operational amplifier according to an embodiment of the present invention.
Description of reference numerals
301 first amplification module
302 second amplification module
303 third amplifying module
304 feedforward module
305 compensation module
306 current supply module
3011 first transistor
3012 second transistor
3013 third transistor
3014 fourth transistor
3015 fifth transistor
3021 sixth transistor
3022 seventh transistor
3023 eighth transistor
3024 ninth transistor
3025 tenth transistor
3026 eleventh transistor
3031 twelfth transistor
3032 thirteenth transistor
3033 fourteenth transistor
3034 fifteenth transistor
3035 sixteenth transistor
3036 seventeenth transistor
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1 to 4. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated. The structures, proportions, sizes, and other dimensions shown in the drawings and described in the specification are for understanding and reading the present disclosure, and are not intended to limit the scope of the present disclosure, which is defined in the claims, and are not essential to the art, and any structural modifications, changes in proportions, or adjustments in size, which do not affect the efficacy and attainment of the same are intended to fall within the scope of the present disclosure. In addition, the terms "upper", "lower", "left", "right", "middle" and "one" used in the present specification are for clarity of description, and are not intended to limit the scope of the present invention, and the relative relationship between the terms and the terms is not to be construed as a scope of the present invention.
Fig. 1 is a schematic diagram of a conventional three-stage operational amplifier using miller compensation. Referring to fig. 1, the basic principle of the conventional three-stage operational amplifier using miller compensation is to add a compensation capacitor C1 to compensate a capacitor C2 between stages of the amplifier, thereby increasing the output capacitance of each stage of the amplifier, so that the load capacitance of each stage of the amplifier is increased to 1+ a times of the original capacitance, where a represents the gain of the amplifier, thereby reducing the pole, reducing the unit gain bandwidth of the amplifier, and increasing the phase margin. The method has the advantage that R can be reasonably designed1=1/gm2,R2=1/gm3The advantage of eliminating the influence of the feedforward path on the output to enable the output of the amplifier to be quickly and stably established enables the amplifier to be widely applied to Pipeline ADCs. But since this approach comes at the cost of increased inter-stage capacitance, the bandwidth of the amplifier is greatly limited, making it unsuitable for high speed applications.
Fig. 2 is a schematic diagram of a conventional three-stage operational amplifier employing feed forward compensation. The input to output transfer function can be expressed as:
here, a1 is gm1ro1, a2 is gm2ro2, A3 is gm3ro3, a2 is gm2 '(ro 2/ro 2), and ro1 is an output resistance where ro2 is ro3 per ro 2' first order transconductance. It can be seen from its transfer function (1) that additional LHP can be added by the feed forward path to move the phase of the amplifier forward, thereby improving the phase margin. But at the same time, due to the existence of the feedforward path, the output signal of the amplifier is difficult to stabilize and establish within the error tolerance range in a short time, thereby limiting the applicability of the amplifier in high-speed switched capacitor amplification circuit.
Fig. 3 is a schematic diagram of a hybrid compensated three-stage operational amplifier according to an embodiment of the invention. The hybrid compensated three-stage operational amplifier includes: a first amplification module 301, a second amplification module 302, a third amplification module 303, a feed forward module 304 and a compensation module 305; the input end of the three-stage operational amplifier is electrically connected with the input end of the first amplification module 301; the first amplification module 301, the second amplification module 302, the compensation module 305 and the third-party amplification module are sequentially connected in series; the output end of the third amplifying module 303 is the output end of the three-stage operational amplifier; the compensation module 305 includes a compensation capacitor and a compensation resistor connected in series; the input end of the feedforward module 304 is electrically connected with the input end of the three-stage operational amplifier; the output of the feed forward module 304 is electrically connected to the output of the second amplification module 302.
In the present invention, the first stage (gm1) and the second stage (gm2) are phase compensated by the feedforward path (gm 2'), and the second stage and the third stage (gm3) are Miller compensated by the RC, and the transfer function of the input to the output can be expressed as:
further, the compensation module 305 includes a compensation capacitor C and a compensation resistor R connected in series.
Further, the transconductance of the first amplifying module 301 is gm1The transconductance of the second amplifying block 302 is gm2The transconductance of the third-party large module is gm3(ii) a The compensation resistance is R, and the condition is satisfied: r is 1/gm3。
In the design, the transfer function is changed to be as follows by selecting R to be 1/gm 3:
comparing (1) and (3), it can be seen that, by adopting the hybrid compensation, the feedforward path is changed from the original two paths into one path, thereby reducing the influence of the feedforward path, and compared with the feedforward compensation, the speed of establishing the output signal of the amplifier is increased; however, since the second and third stages employ miller compensation, the unity gain bandwidth of the amplifier may be reduced compared to the feedforward compensation. Therefore, the hybrid compensation is a compromise between the setup speed and the bandwidth.
Further, the three-stage operational amplifier further includes a current supply module 306; the current supply module 306 supplies current to the first amplification module 301, the second amplification module 302, and the third amplification module 303.
Fig. 4 shows a specific circuit diagram of a hybrid compensated three-stage operational amplifier according to an embodiment of the present invention. As shown in fig. 4, the first amplification module 301 includes a first transistor 3011, a second transistor 3012, a third transistor 3013, a fourth transistor 3014, and a fifth transistor 3015; the first transistor 3011, the second transistor 3012, and the third transistor 3013 are NPN transistors; the fourth transistor 3014 and the fifth transistor 3015 are PNP transistors; the base of the first transistor 3011 is connected to the output terminal of the current supply module 306, and the emitter of the first transistor 3011 is connected to the ground terminal; a collector of the first transistor 3011 is connected to emitters of the second transistor 3012 and the third transistor 3013, respectively, a base of the second transistor 3012 is a positive input signal end of the first amplification module 301, and a base of the third transistor 3013 is a negative input signal end of the first amplification module 301; the collector of the second transistor 3012 is connected to the positive output terminal of the first amplification module 301, and the collector of the third transistor 3013 is connected to the negative output terminal of the first amplification module 301; bases of the fourth transistor 3014 and the fifth transistor 3015 are both connected to the bias power supply of the first amplification module 301; emitters of the fourth transistor 3014 and the fifth transistor 3015 are both connected to a positive power supply of the three-stage operational amplifier; the collector of the fourth transistor 3014 is connected to the positive output terminal of the first amplification block 301, and the collector of the fifth transistor 3015 is connected to the negative output terminal of the first amplification block 301.
As shown in fig. 4, the second amplifying block 302 includes a sixth transistor 3021, a seventh transistor 3022, an eighth transistor 3023, a ninth transistor 3024, a tenth transistor 3025, and an eleventh transistor 3026; the sixth transistor 3021 and the seventh transistor 3022 are PNP transistors; the eighth transistor 3023, the ninth transistor 3024, the tenth transistor 3025, and the eleventh transistor 3026 are NPN transistor transistors; bases of the sixth transistor 3021 and the seventh transistor 3022 are connected to a positive output terminal and a negative output terminal of the first amplification block 301, respectively; the emitters of the sixth transistor 3021 and the seventh transistor 3022 are both connected to the positive power supply of the three-stage operational amplifier; collectors of the sixth transistor 3021 and the seventh transistor 3022 are connected to the positive output terminal and the negative output terminal of the second amplification block 302, respectively; collectors of the eighth transistor 3023 and the ninth transistor 3024 are connected to the positive output terminal and the negative output terminal of the second amplification block 302, respectively; bases of the eighth transistor 3023 and the ninth transistor 3024 are connected to a positive input signal terminal and a negative input signal terminal of the second amplification block 302, respectively; an emitter of the eighth transistor 3023 is connected to a collector of the tenth transistor 3025, and an emitter of the ninth transistor 3024 is connected to a collector of the eleventh transistor 3026; emitters of the tenth transistor 3025 and the eleventh transistor 3026 are both connected to the ground terminal; the bases of the tenth transistor 3025 and the eleventh transistor 3026 are both connected to the output of the current supply block 306.
As shown in fig. 4, the third amplifying module 303 includes a twelfth transistor 3031, a thirteenth transistor 3032, a fourteenth transistor 3033, a fifteenth transistor 3034, a sixteenth transistor 3035 and a seventeenth transistor 3036; the twelfth transistor 3031 and the thirteenth transistor 3032 are PNP transistors; the fourteenth transistor 3033, the fifteenth transistor 3034, the sixteenth transistor 3035 and the seventeenth transistor 3036 are NPN transistors; the emitters of the twelfth transistor 3031 and the thirteenth transistor 3032 are both connected with the positive power supply of the three-stage operational amplifier; bases of a twelfth transistor 3031 and a thirteenth transistor 3032 are respectively connected with a positive output end and a negative output end of the second amplification module 302; a collector of the twelfth transistor 3031 is connected to a collector of the fourteenth transistor 3033; a collector of the thirteenth transistor 3032 is connected to a collector of the fifteenth transistor 3034; the bases of the fourteenth transistor 3033 and the fifteenth transistor 3034 are both connected with the bias power supply of the third amplification module 303; an emitter of the fourteenth transistor 3033 is connected to a collector of the sixteenth transistor 3035; an emitter of the fifteenth transistor 3034 is connected to a collector of the seventeenth transistor 3036; the bases of the sixteenth transistor 3035 and the seventeenth transistor 3036 are both connected with the output end of the current supply module 306; emitters of the sixteenth transistor 3035 and the seventeenth transistor 3036 are both connected to the ground terminal.
As shown in fig. 4, the compensation module 305 includes a first compensation sub-module and a second compensation sub-module; the first compensation module comprises a first compensation resistor R11 and a first compensation capacitor C11 which are connected in series; the second compensation module comprises a second compensation resistor R22 and a second compensation capacitor C22 which are connected in series; one end of the first compensation resistor R11, which is far away from the first compensation capacitor C11, is connected to the positive output end of the second amplification module 302; one end of the second compensation resistor R22, which is far away from the second compensation capacitor C22, is connected to the negative output end of the second amplifying block 302; one end of the first compensation capacitor C11, which is far away from the first compensation resistor R11, is connected with the collector of the twelfth transistor 3031; the end of the second compensation capacitor C22 facing away from the second compensation resistor R22 is connected to the collector of the thirteenth transistor 3032.
As shown in fig. 4, the current supply module 306 includes an eighteenth transistor; the eighteenth transistor is an NPN transistor.
As shown in fig. 4, the collector of the eighteenth transistor is connected to a current source; the base electrode of the eighteenth transistor is connected with the collector electrode of the eighteenth transistor; the base of the eighteenth transistor is the output end of the current supply module 306; an emitter of the eighteenth transistor is connected to the ground terminal.
In summary, the present invention combines a feed forward (fed) compensation method and a Miller compensation method, so as to effectively compensate the phase of the three-stage operational amplifier, effectively control the power consumption of the three-stage operational amplifier while maintaining a certain bandwidth, and simultaneously reduce the influence of the feed forward on the output by using the advantage of Miller compensation, so that the present invention can be applied to the design of a high-precision low-power converter. The feedforward path is changed from two original paths into one path, so that the influence of the feedforward path is reduced, and compared with feedforward compensation, the speed of establishing the output signal of the amplifier is increased; however, since the second and third stages employ miller compensation, the unity gain bandwidth of the amplifier may be reduced compared to the feedforward compensation. Therefore, a hybrid compensated three stage operational amplifier of the present invention provides a good compromise between speed and bandwidth.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (10)
1. A hybrid compensated three-stage operational amplifier, comprising: the device comprises a first amplification module, a second amplification module, a third amplification module, a feedforward module and a compensation module;
the input end of the three-stage operational amplifier is electrically connected with the input end of the first amplification module;
the first amplification module, the second amplification module, the compensation module and the third amplification module are sequentially connected in series; the output end of the third amplification module is the output end of the three-stage operational amplifier;
the compensation module comprises a compensation capacitor and a compensation resistor which are connected in series;
the input end of the feedforward module is electrically connected with the input end of the three-stage operational amplifier; and the output end of the feedforward module is electrically connected with the output end of the second amplification module.
2. The hybrid compensated three-stage operational amplifier of claim 1, wherein:
the compensation module comprises a compensation capacitor and a compensation resistor which are connected in series.
3. The hybrid compensated three-stage operational amplifier of claim 2, wherein:
the transconductance of the first amplifying module is gm1The transconductance of the second amplifying module is gm2The transconductance of the third-party large module is gm3;
The compensation resistor is R and satisfies the following conditions: r is 1/gm3。
4. The hybrid compensated three-stage operational amplifier of claim 1, wherein:
the three-stage operational amplifier also comprises a current supply module;
the current supply module supplies current to the first amplification module, the second amplification module and the third amplification module.
5. The hybrid compensated three-stage operational amplifier of claim 4, wherein: the first amplifying module comprises a first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor;
the first transistor, the second transistor and the third transistor are NPN type transistor; the fourth transistor and the fifth transistor are PNP type transistor;
the base electrode of the first transistor is connected with the output end of the current supply module, and the emitter electrode of the first transistor is connected with the grounding end;
a collector of the first transistor is connected to emitters of the second transistor and the third transistor, respectively, a base of the second transistor is a positive input signal end of the first amplification module, and a base of the third transistor is a negative input signal end of the first amplification module; a collector electrode of the second transistor is connected with a positive output end of the first amplification module, and a collector electrode of the third transistor is connected with a negative output end of the first amplification module;
the base electrodes of the fourth transistor and the fifth transistor are connected with a bias power supply of the first amplification module; emitters of the fourth transistor and the fifth transistor are connected with a positive power supply of the three-stage operational amplifier; and the collector electrode of the fourth transistor is connected with the positive output end of the first amplification module, and the collector electrode of the fifth transistor is connected with the negative output end of the first amplification module.
6. The hybrid compensated three-stage operational amplifier of claim 4, wherein: the second amplification module comprises a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor and an eleventh transistor;
the sixth transistor and the seventh transistor are PNP type transistor; the eighth transistor, the ninth transistor, the tenth transistor, and the eleventh transistor are NPN-type transistors;
bases of the sixth transistor and the seventh transistor are respectively connected with a positive output end and a negative output end of the first amplification module; the emitters of the sixth transistor and the seventh transistor are connected with a positive power supply of the three-stage operational amplifier; collectors of the sixth transistor and the seventh transistor are respectively connected with a positive output end and a negative output end of the second amplification module;
collectors of the eighth transistor and the ninth transistor are respectively connected with a positive output end and a negative output end of the second amplification module; bases of the eighth transistor and the ninth transistor are respectively connected with a positive input signal end and a negative input signal end of the second amplification module; the emitters of the eighth transistor and the ninth transistor are respectively connected with the collectors of the tenth transistor and the eleventh transistor;
emitters of the tenth transistor and the eleventh transistor are both connected with a ground terminal; bases of the tenth transistor and the eleventh transistor are both connected with an output end of the current supply module.
7. The hybrid compensated three-stage operational amplifier of claim 4, wherein: the third amplifying module comprises a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor and a seventeenth transistor;
the twelfth transistor and the thirteenth transistor are PNP type transistor; the fourteenth transistor, the fifteenth transistor, the sixteenth transistor and the seventeenth transistor are NPN-type transistors;
the emitters of the twelfth transistor and the thirteenth transistor are connected with a positive power supply of the three-stage operational amplifier; bases of the twelfth transistor and the thirteenth transistor are respectively connected with a positive output end and a negative output end of the second amplification module; a collector of the twelfth transistor is connected to a collector of the fourteenth transistor; a collector of the thirteenth transistor is connected to a collector of the fifteenth transistor;
the base electrodes of the fourteenth transistor and the fifteenth transistor are connected with a bias power supply of the third amplification module; an emitter of the fourteenth transistor is connected to a collector of the sixteenth transistor; an emitter of the fifteenth transistor is connected to a collector of the seventeenth transistor;
the base electrodes of the sixteenth transistor and the seventeenth transistor are connected with the output end of the current supply module; and the emitting electrodes of the sixteenth transistor and the seventeenth transistor are both connected with a grounding end.
8. The hybrid compensated three-stage operational amplifier of claim 4, wherein: the compensation module comprises a first compensation submodule and a second compensation submodule;
the first compensation module comprises a first compensation resistor and a first compensation capacitor which are connected in series; the second compensation module comprises a second compensation resistor and a second compensation capacitor which are connected in series;
one end of the first compensation resistor, which is far away from the first compensation capacitor, is connected with the positive output end of the second amplification module; one end of the second compensation resistor, which is far away from the second compensation capacitor, is connected with the negative output end of the second amplification module;
one end of the first compensation capacitor, which is far away from the first compensation resistor, is connected with a collector of the twelfth transistor; one end of the second compensation capacitor, which is far away from the second compensation resistor, is connected with the collector of the thirteenth transistor.
9. The hybrid compensated three-stage operational amplifier of claim 4, wherein: the current supply module comprises an eighteenth transistor; the eighteenth transistor is an NPN type transistor.
10. The hybrid compensated three-stage operational amplifier of claim 9, wherein:
a collector of the eighteenth transistor is connected with a current source; the base electrode of the eighteenth transistor is connected with the collector electrode of the eighteenth transistor; the base electrode of the eighteenth transistor is the output end of the current supply module;
and the emitter of the eighteenth transistor is connected with the grounding end.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010166271.XA CN113395048B (en) | 2020-03-11 | 2020-03-11 | Hybrid compensation three-stage operational amplifier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010166271.XA CN113395048B (en) | 2020-03-11 | 2020-03-11 | Hybrid compensation three-stage operational amplifier |
Publications (2)
Publication Number | Publication Date |
---|---|
CN113395048A true CN113395048A (en) | 2021-09-14 |
CN113395048B CN113395048B (en) | 2023-03-14 |
Family
ID=77615551
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010166271.XA Active CN113395048B (en) | 2020-03-11 | 2020-03-11 | Hybrid compensation three-stage operational amplifier |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN113395048B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114614776A (en) * | 2022-05-12 | 2022-06-10 | 绍兴圆方半导体有限公司 | Two-stage operational amplifier circuit, operational amplifier, and electronic apparatus |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030067351A1 (en) * | 2001-09-28 | 2003-04-10 | Sridhar Raghavendra N. | Multipath Nested Gm Nested Miller Compensation |
CN101425785A (en) * | 2008-12-09 | 2009-05-06 | 中国科学院微电子研究所 | Transconductance-capacitance compensation circuit of flip network |
CN101917169A (en) * | 2010-08-05 | 2010-12-15 | 复旦大学 | High-bandwidth low-power consumption frequency-compensation three-stage operational amplifier |
US20130200953A1 (en) * | 2012-02-08 | 2013-08-08 | Mediatek Inc. | Operational amplifier circuits |
CN103780213A (en) * | 2013-12-24 | 2014-05-07 | 南京中科微电子有限公司 | Multistage operational amplifier |
-
2020
- 2020-03-11 CN CN202010166271.XA patent/CN113395048B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030067351A1 (en) * | 2001-09-28 | 2003-04-10 | Sridhar Raghavendra N. | Multipath Nested Gm Nested Miller Compensation |
CN101425785A (en) * | 2008-12-09 | 2009-05-06 | 中国科学院微电子研究所 | Transconductance-capacitance compensation circuit of flip network |
CN101917169A (en) * | 2010-08-05 | 2010-12-15 | 复旦大学 | High-bandwidth low-power consumption frequency-compensation three-stage operational amplifier |
US20130200953A1 (en) * | 2012-02-08 | 2013-08-08 | Mediatek Inc. | Operational amplifier circuits |
CN103780213A (en) * | 2013-12-24 | 2014-05-07 | 南京中科微电子有限公司 | Multistage operational amplifier |
Non-Patent Citations (2)
Title |
---|
XIAOHONG PENG等: ""Nested feed-forward Gm-stage and nulling resistor plus nested-Miller compensation for multistage amplifiers"", 《PROCEEDINGS OF THE IEEE 2002 CUSTOM INTEGRATED CIRCUITS CONFERENCE》 * |
郭廷: ""一种低噪声低失调高精度的运算放大器的研究与设计"", 《中国优秀博硕士学位论文全文数据库(硕士) 信息科技辑》 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114614776A (en) * | 2022-05-12 | 2022-06-10 | 绍兴圆方半导体有限公司 | Two-stage operational amplifier circuit, operational amplifier, and electronic apparatus |
Also Published As
Publication number | Publication date |
---|---|
CN113395048B (en) | 2023-03-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP2266204A1 (en) | Differential rf amplifier | |
CN109189137B (en) | Bipolar anti-irradiation 5A low-voltage broadband linear voltage stabilizer | |
US7557651B2 (en) | Dual transconductance amplifiers and differential amplifiers implemented using such dual transconductance amplifiers | |
TWI756821B (en) | Current mirror arrangements and analog-to-digital converter systems | |
CN113395048B (en) | Hybrid compensation three-stage operational amplifier | |
US7233208B2 (en) | Bias compensation circuit for RF power amplifier | |
CN103888093B (en) | Common-mode level reset circuit for differential signals | |
TW202145705A (en) | Current mirror arrangements | |
US10826438B2 (en) | Bias circuit | |
CN111756343B (en) | Rail-to-rail output circuit for high-speed operational amplifier | |
TWI753758B (en) | Current mirror arrangements | |
US9871492B2 (en) | Analog amplifier for recovering abnormal operation of common mode feedback | |
JP2008219283A (en) | Differential current mode transmission circuit | |
CN108120871B (en) | Low offset voltage comparator | |
US20050030096A1 (en) | Balanced variable gain amplifier capable of achieving performance by low source voltage | |
CN113972906B (en) | Broadband level shift circuit and design method thereof | |
RU2319292C1 (en) | Cascode differential amplifier | |
EP1230731B1 (en) | Transconductor with controllable transconductance for low supply voltages | |
CN106712731B (en) | Operational amplifier | |
RU2321158C1 (en) | Cascode differential amplifier | |
TWI600995B (en) | Voltage clamping circuit | |
JP6673645B2 (en) | Differential amplifier | |
CN116707467B (en) | class-AB structure voltage buffer suitable for large capacitive load | |
CN118092560A (en) | Base current eliminating circuit and eliminating method of bipolar transistor | |
CN113009958B (en) | Current mirror arrangement with reduced sensitivity to buffer offset |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |