CN113381738A - Schmitt trigger with adjustable negative threshold voltage - Google Patents
Schmitt trigger with adjustable negative threshold voltage Download PDFInfo
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- CN113381738A CN113381738A CN202110710443.XA CN202110710443A CN113381738A CN 113381738 A CN113381738 A CN 113381738A CN 202110710443 A CN202110710443 A CN 202110710443A CN 113381738 A CN113381738 A CN 113381738A
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- 238000007493 shaping process Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/3565—Bistables with hysteresis, e.g. Schmitt trigger
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/011—Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356165—Bistable circuits using complementary field-effect transistors using additional transistors in the feedback circuit
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Abstract
The invention discloses a Schmitt trigger with adjustable negative threshold voltage, which comprises a first PMOS transistor, an NMOS transistor group and a phase inverter, wherein an input port is used for inputting a signal IN and a negative threshold voltage adjusting signal ADP, and an output port is used for outputting a signal OUT; the drain electrode of the NMOS transistor group is connected with the drain electrode of the first PMOS transistor and the input end of the phase inverter, the source electrode and the body of the NMOS transistor group are connected with the ground GND, and the grid electrode of the NMOS transistor group is connected with the input signal IN. The invention can change the negative threshold voltage by adjusting the voltage of the negative threshold voltage adjusting signal ADP, thereby greatly widening the application range of the Schmitt trigger and meeting different application requirements of various fields.
Description
Technical Field
The invention relates to the technical field of Schmitt triggers, in particular to a Schmitt trigger with adjustable negative threshold voltage.
Background
The Schmitt trigger is often placed at an input port of the integrated circuit to serve as a waveform shaping circuit, and can shape external signal waveforms with interference into standard square wave waveforms, so that the influence of the external interference on the inside of the integrated circuit is reduced, and the processing speed of the integrated circuit is increased. A conventional schmitt trigger is the structure shown in fig. 1.
Schmitt triggers have two stable states, but unlike conventional triggers, schmitt triggers use a potential-triggered approach, the state of which is maintained by the input signal potential. Referring to fig. 2, the schmitt trigger has different threshold voltages for two different changing directions of input signals, namely negative-going decreasing and positive-going increasing. That is, when the input voltage is higher than the forward threshold voltage, the output is high; when the input voltage is lower than the negative threshold voltage, the output is low; when the input is between the positive and negative threshold voltages, the output is unchanged, that is, the corresponding threshold voltage is different when the output is inverted from high level to low level or from low level to high level. The output level changes only when the input level changes sufficiently.
Some practitioners have proposed a schmitt trigger circuit (chinese patent application 201710190467.0), which includes an inverter circuit composed of MOS transistors, a first feedback circuit, and a first inverter; the inverter circuit is used for determining the negative threshold voltage of the trigger through the overturning voltage of the inverter circuit; the feedback circuit is used for changing the forward threshold voltage by changing the width-to-length ratio of the MOS tube; the first inverter is used for shaping the output signal of the inverter circuit. The Schmitt trigger circuit realizes the change of the threshold voltage of the trigger by changing the width-length ratio of the MOS tube, can only change the threshold voltage when the Schmitt trigger circuit is designed, and cannot dynamically adjust the positive or negative threshold voltage when the circuit works after being manufactured.
However, with the development of integrated circuits, application scenarios such as wide voltage control and the like desire that the negative threshold voltage of the schmitt trigger at the input port of the integrated circuit is adjustable. Obviously, the structure of the existing Schmitt trigger is complex, and the adjusting effect cannot really meet the actual requirement.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: aiming at the technical problems in the prior art, the invention provides the Schmitt trigger with the adjustable negative threshold voltage, which has the advantages of simple structure, low cost, simple and convenient manufacture and wide application range.
In order to solve the technical problems, the invention adopts the following technical scheme:
a Schmitt trigger with adjustable negative threshold voltage comprises a first PMOS transistor, an NMOS transistor group and a phase inverter, wherein an input port is used for inputting a signal IN and a negative threshold voltage adjusting signal ADP, and an output port is used for outputting a signal OUT. The drain electrode of the NMOS transistor group is connected with the drain electrode of the first PMOS transistor and the input end of the phase inverter, the source electrode and the body of the NMOS transistor group are connected with the ground GND, and the grid electrode of the NMOS transistor group is connected with the input signal IN. With the above structure, the present invention can change the negative threshold voltage by adjusting the voltage of the negative threshold voltage adjusting signal ADP.
As a further improvement of the invention: the NMOS transistor group comprises a first NMOS transistor, a second NMOS transistor and a third NMOS transistor.
As a further improvement of the invention: the NMOS transistor group comprises
The drain electrode of the first NMOS transistor is connected with the drain electrode of the first PMOS transistor, the drain electrode of the second NMOS transistor and the input end of the inverter, the source electrode of the first NMOS transistor is connected with the ground GND, and the grid electrode of the first NMOS transistor is connected with the input signal IN.
The drain electrode of the second NMOS transistor is connected with the drain electrode of the first PMOS transistor, the drain electrode of the first NMOS transistor and the input end of the phase inverter, the source electrode of the second NMOS transistor is connected with the drain electrode of the third NMOS transistor, the source electrode of the second NMOS transistor is connected with the body of the third NMOS transistor and is connected with the ground GND, and the grid electrode of the second NMOS transistor is connected with the output end of the phase inverter.
The drain of the third NMOS transistor is connected to the source of the second NMOS transistor, the source and the body are connected to ground GND, and the gate is connected to a negative threshold voltage adjustment signal ADP.
As a further improvement of the invention: the drain electrode of the first PMOS transistor is connected with the drain electrode of the first NMOS transistor, the drain electrode of the second NMOS transistor and the input end of the inverter, the source electrode and the body are connected with a power supply VDD, and the grid electrode is connected with an input signal IN.
As a further improvement of the invention: the input end of the phase inverter is connected with the drain electrode of the first PMOS transistor, the drain electrode of the first NMOS transistor and the drain electrode of the second NMOS transistor, and the output end of the phase inverter is connected with the output signal OUT.
As a further improvement of the invention: the inverter circuit comprises a second PMOS transistor and a fourth NMOS transistor, wherein the source electrode and the body of the second PMOS transistor are connected with a power supply VDD, the drain electrode of the second PMOS transistor is connected with the drain electrode and the output end OUT of the fourth NMOS transistor, and the grid electrode of the second PMOS transistor is connected with the input end IN. The source and the bulk of the fourth NMOS transistor are connected to the GND, the drain of the fourth NMOS transistor is connected to the drain of the second PMOS transistor and the output terminal OUT, and the gate of the fourth NMOS transistor is connected to the input terminal IN.
Compared with the prior art, the invention has the advantages that:
the schmitt trigger with the adjustable negative threshold voltage has the advantages of simple structure, low cost and simple and convenient manufacture, and can provide the function of adjusting the negative threshold voltage, namely the schmitt trigger can change the negative threshold voltage by adjusting the voltage of a negative threshold voltage adjusting signal ADP. Therefore, the application range of the Schmitt trigger is greatly expanded, and the Schmitt trigger can meet different application requirements of various fields.
Drawings
Fig. 1 is a schematic diagram of a circuit structure of a conventional schmitt trigger.
Fig. 2 is a schematic diagram illustrating the operation of a conventional schmitt trigger.
Fig. 3 is a schematic diagram of a circuit structure of a schmitt trigger in a specific application example.
FIG. 4 is a schematic diagram of a circuit structure of an inverter according to an embodiment of the present invention.
FIG. 5 is a diagram illustrating the negative threshold voltage adjustment signal ADP is 0V in an embodiment of the present invention.
FIG. 6 is a diagram illustrating the negative threshold voltage adjustment signal ADP of 0.8V in an exemplary embodiment of the present invention.
FIG. 7 is a diagram illustrating the negative threshold voltage adjustment signal ADP of 1.2V in an exemplary embodiment of the present invention.
In fig. 3-7: 1 a first PMOS transistor, 2 a first NMOS transistor, 3 a second NMOS transistor, 4 an inverter, 5 a third NMOS transistor, 6 a second PMOS transistor, 7 a fourth NMOS transistor.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
As shown IN fig. 3, the schmitt trigger with adjustable negative threshold voltage of the present invention includes a first PMOS transistor 1, an NMOS transistor group and an inverter 4, wherein an input port is an input signal IN and a negative threshold voltage adjusting signal ADP, and an output port is an output signal OUT. The drain electrode of the NMOS transistor group is connected with the drain electrode of the first PMOS transistor 1 and the input end of the phase inverter 4, the source electrode and the body of the NMOS transistor group are connected with the ground GND, and the grid electrode of the NMOS transistor group is connected with the input signal IN. The source and bulk of the first PMOS transistor 1 are connected to a power supply VDD, and the gate is connected to an input signal IN. The drain of the first PMOS transistor 1 is connected to the NMOS transistor group and the input of the inverter 4. With the above structure, the present invention can change the negative threshold voltage by adjusting the voltage of the negative threshold voltage adjusting signal ADP.
In a specific application example, the NMOS transistor group includes a first NMOS transistor 2, a second NMOS transistor 3, and a third NMOS transistor 5.
In a specific application example, the detailed structure of the invention comprises:
the drain of the first PMOS transistor 1 is connected to the drain of the first NMOS transistor 2, the drain of the second NMOS transistor 3, and the input terminal of the inverter 4, the source and bulk of which are connected to the power supply VDD, and the gate of which is connected to the input signal IN.
The drain of the first NMOS transistor 2 is connected to the drain of the first PMOS transistor 1, the drain of the second NMOS transistor 3, and the input terminal of the inverter 4, the source and the bulk are connected to ground GND, and the gate is connected to the input signal IN.
The drain of the second NMOS transistor 3 is connected to the drain of the first PMOS transistor 1, the drain of the first NMOS transistor 2, and the input of the inverter 4, the source is connected to the drain of the third NMOS transistor 5, the bulk is connected to ground GND, and the gate is connected to the output of the inverter 4.
The drain of the third NMOS transistor 5 is connected to the source of the second NMOS transistor 3, the source and the bulk are connected to ground GND, and the gate is connected to the negative threshold voltage adjustment signal ADP.
It is understood that other embodiments employing NMOS transistor group structures are within the scope of the present invention.
The input end of the inverter 4 is connected with the drain of the first PMOS transistor 1, the drain of the first NMOS transistor 2 and the drain of the second NMOS transistor 3, and the output end is connected with the output signal OUT.
IN a preferred embodiment, as shown IN fig. 4, the present invention further optimizes the inverter 4 circuit, the inverter 4 circuit comprises a second PMOS transistor 6 and a fourth NMOS transistor 7, wherein the source and the bulk of the second PMOS transistor 6 are connected to the power supply VDD, the drain of the second PMOS transistor 6 is connected to the drain of the fourth NMOS transistor 7 and the output OUT, and the gate of the second PMOS transistor 6 is connected to the input IN. The source and the bulk of the fourth NMOS transistor 7 are connected to ground GND, the drain of the fourth NMOS transistor 7 is connected to the drain of the second PMOS transistor 6 and to the output OUT, and the gate of the fourth NMOS transistor 7 is connected to the input IN.
The invention is a specific application example to illustrate the working principle of the structure.
For a circuit of the present invention implemented IN a certain process, when the negative threshold voltage adjustment signal ADP is 0V, the positive threshold voltage is 0.66V, and the negative threshold voltage is 0.40V, as shown IN fig. 5, where I is an IN voltage and II is an OUT voltage.
When the negative threshold voltage adjusting signal ADP is 0.8V, the positive threshold voltage is still 0.66V, and the negative threshold voltage becomes 0.31V, as shown IN fig. 6, I is IN voltage and II is OUT voltage.
When the negative threshold voltage adjusting signal ADP is 1.2V, the positive threshold voltage is still 0.66V, and the negative threshold voltage becomes 0.19V, as shown IN fig. 7, I is IN voltage and II is OUT voltage.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (4)
1. A Schmitt trigger with adjustable negative threshold voltage is characterized by comprising a first PMOS transistor (1), an NMOS transistor group and an inverter (4), wherein the NMOS transistor group comprises a first NMOS transistor (2), a second NMOS transistor (3) and a third NMOS transistor (5);
the drain electrode of the first NMOS transistor (2) is connected with the drain electrode of the first PMOS transistor (1), the drain electrode of the second NMOS transistor (3) and the input end of the inverter (4), the source electrode of the first NMOS transistor (2) is connected with the ground GND, and the gate electrode of the first NMOS transistor (2) is connected with the input signal IN;
the drain electrode of the second NMOS transistor (3) is connected with the drain electrode of the first PMOS transistor (1), the drain electrode of the first NMOS transistor (2) and the input end of the inverter (4), the source electrode of the second NMOS transistor (3) is connected with the drain electrode of the third NMOS transistor (5), the source electrode of the second NMOS transistor is connected with the ground GND, and the grid electrode of the second NMOS transistor (3) is connected with the output end of the inverter (4);
the drain electrode of the third NMOS transistor (5) is connected with the source electrode of the second NMOS transistor (3), the source electrode of the third NMOS transistor (5) is connected with the ground GND through the body, and the grid electrode of the third NMOS transistor (5) is connected with the negative threshold voltage adjusting signal ADP.
2. The schmitt trigger according to claim 1, characterized in that: the drain electrode of the first PMOS transistor (1) is connected with the drain electrode of the first NMOS transistor (2), the drain electrode of the second NMOS transistor (3) and the input end of the inverter (4), the source electrode of the first PMOS transistor (1) is connected with a power supply VDD, and the grid electrode of the first PMOS transistor (1) is connected with an input signal IN.
3. The schmitt trigger as recited in claim 1, wherein the schmitt trigger comprises: the input end of the phase inverter (4) is connected with the drain electrode of the first PMOS transistor (1), the drain electrode of the first NMOS transistor (2) and the drain electrode of the second NMOS transistor (3), and the output end of the phase inverter (4) is connected with the output signal OUT.
4. The schmitt trigger according to claim 1, characterized in that: the inverter (4) circuit comprises a second PMOS transistor (6) and a fourth NMOS transistor (7), wherein the source electrode of the second PMOS transistor (6) is connected with a power supply VDD through a body, the drain electrode of the second PMOS transistor (6) is connected with the drain electrode of the fourth NMOS transistor (7) and an output end OUT, the gate electrode of the second PMOS transistor (6) is connected with an input end IN, the source electrode of the fourth NMOS transistor (7) is connected with the body through GND, the drain electrode of the fourth NMOS transistor (7) is connected with the drain electrode of the second PMOS transistor (6) and the output end OUT, and the gate electrode of the fourth NMOS transistor (7) is connected with the input end IN.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110710443.XA CN113381738A (en) | 2021-06-25 | 2021-06-25 | Schmitt trigger with adjustable negative threshold voltage |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110710443.XA CN113381738A (en) | 2021-06-25 | 2021-06-25 | Schmitt trigger with adjustable negative threshold voltage |
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| CN113381738A true CN113381738A (en) | 2021-09-10 |
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3984703A (en) * | 1975-06-02 | 1976-10-05 | National Semiconductor Corporation | CMOS Schmitt trigger |
| CN101488736A (en) * | 2009-02-06 | 2009-07-22 | 中国航天时代电子公司第七七一研究所 | Dynamic body bias Schmitt trigger circuit |
| CN103368532A (en) * | 2013-07-09 | 2013-10-23 | 华东师范大学 | Hysteretic voltage digital adjustable Schmitt trigger |
| CN103607184A (en) * | 2013-10-23 | 2014-02-26 | 上海华力微电子有限公司 | CMOS Schmidt trigger circuit |
| CN106292813A (en) * | 2015-05-14 | 2017-01-04 | 快捷半导体(苏州)有限公司 | Hysteresis comparator, integrated circuit and voltage comparative approach |
| CN108183699A (en) * | 2017-12-29 | 2018-06-19 | 芯原微电子(上海)有限公司 | The method for triggering the adjustable Schmidt trigger of window and its adjusting triggering window |
| CN108667440A (en) * | 2017-03-28 | 2018-10-16 | 峰岹科技（深圳）有限公司 | A kind of Schmitt trigger circuit |
| CN112087219A (en) * | 2020-09-16 | 2020-12-15 | 南京微盟电子有限公司 | Low-power-consumption hysteresis reverse trigger |
-
2021
- 2021-06-25 CN CN202110710443.XA patent/CN113381738A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3984703A (en) * | 1975-06-02 | 1976-10-05 | National Semiconductor Corporation | CMOS Schmitt trigger |
| CN101488736A (en) * | 2009-02-06 | 2009-07-22 | 中国航天时代电子公司第七七一研究所 | Dynamic body bias Schmitt trigger circuit |
| CN103368532A (en) * | 2013-07-09 | 2013-10-23 | 华东师范大学 | Hysteretic voltage digital adjustable Schmitt trigger |
| CN103607184A (en) * | 2013-10-23 | 2014-02-26 | 上海华力微电子有限公司 | CMOS Schmidt trigger circuit |
| CN106292813A (en) * | 2015-05-14 | 2017-01-04 | 快捷半导体(苏州)有限公司 | Hysteresis comparator, integrated circuit and voltage comparative approach |
| CN108667440A (en) * | 2017-03-28 | 2018-10-16 | 峰岹科技（深圳）有限公司 | A kind of Schmitt trigger circuit |
| CN108183699A (en) * | 2017-12-29 | 2018-06-19 | 芯原微电子(上海)有限公司 | The method for triggering the adjustable Schmidt trigger of window and its adjusting triggering window |
| CN112087219A (en) * | 2020-09-16 | 2020-12-15 | 南京微盟电子有限公司 | Low-power-consumption hysteresis reverse trigger |
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