CN113380310A - Display panel and display device - Google Patents
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- CN113380310A CN113380310A CN202110624599.6A CN202110624599A CN113380310A CN 113380310 A CN113380310 A CN 113380310A CN 202110624599 A CN202110624599 A CN 202110624599A CN 113380310 A CN113380310 A CN 113380310A
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- 230000009286 beneficial effect Effects 0.000 abstract description 8
- 230000004888 barrier function Effects 0.000 description 22
- 238000010586 diagram Methods 0.000 description 10
- 206010066054 Dysmorphism Diseases 0.000 description 7
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- 230000001788 irregular Effects 0.000 description 4
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- 238000005516 engineering process Methods 0.000 description 2
- 238000009432 framing Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/35—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being liquid crystals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The invention discloses a display panel and a display device, and relates to the technical field of display, wherein the display panel comprises a display area and a non-display area surrounding the display area; the non-display region comprises a gate drive circuit; the gate driving circuit includes a plurality of shift registers; in a first direction, the distance between two adjacent second transistors in the first shift register is larger than the distance between two adjacent second transistors in the second shift register, and/or in a second direction, the distance between two adjacent second transistors in the first shift register is larger than the distance between two adjacent second transistors in the second shift register, wherein the first direction and the second direction intersect; the non-display area also comprises a binding area and at least one special-shaped non-display area which is arranged close to the binding area; the driving chip is bound in the binding area; at least one second shift register is located in the special-shaped non-display area. The invention is beneficial to realizing narrow frame.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
With the development of science and technology, display screens gradually develop towards thin structures with high screen ratio and narrow frames. Simultaneously in order to improve the visual effect of display screen, still can carry out chamfered edge or radius to four angles of display screen and handle, carry out dysmorphism designs such as C angle, R angle, L type or U type.
The middle area of the display screen is a display area, and the periphery of the display screen is a frame. The gate driving circuit is arranged in the frame and comprises a cascaded shift register, and the arrangement of the shift register can cause the width of the frame to be increased, so that the development of a narrow-frame display screen is not facilitated. Particularly, in the prior art, since the display screen is designed with the C-angle, the arrangement of the shift registers in the corresponding region in the frame is disordered, and the area of the region corresponding to the C-angle in the frame is large, which is not favorable for the development of the narrow-frame display screen.
In view of the above, there is a need in the art to develop a technique capable of reducing the bezel at the irregular portion to increase the screen occupation ratio.
Disclosure of Invention
In view of this, the present invention provides a display panel and a display device, which are beneficial to realizing a narrow bezel.
The present invention provides a display panel including: a display area and a non-display area surrounding the display area; the non-display area comprises a blocking part and a grid driving circuit, the blocking part surrounds the display area, and the grid driving circuit is at least partially positioned between the blocking part and the display area along a first direction; the grid driving circuit comprises a plurality of cascaded shift registers, each shift register comprises at least one first transistor and a plurality of second transistors, the size of each first transistor is larger than that of each second transistor, and in the same shift register, each first transistor is positioned between the display area and the second transistor closest to the display area; the shift register comprises a first shift register and a second shift register; in a first direction, the distance between two adjacent second transistors in the first shift register is larger than the distance between two adjacent second transistors in the second shift register, and/or in a second direction, the distance between two adjacent second transistors in the first shift register is larger than the distance between two adjacent second transistors in the second shift register, wherein the first direction and the second direction intersect; the non-display area also comprises a binding area and at least one special-shaped non-display area which is arranged close to the binding area, and the special-shaped non-display area is positioned on one side of the binding area along the first direction; the special-shaped non-display area comprises a section of special-shaped edge, the special-shaped edge is positioned on one side, close to the display area, of the special-shaped non-display area, and the extending direction of the special-shaped edge is intersected with the first direction and the second direction; the display panel also comprises a driving chip, and the driving chip is bound in the binding area; at least one second shift register is located in the special-shaped non-display area.
Based on the same idea, the invention also provides a display device, which comprises the display panel.
Compared with the prior art, the display panel and the display device provided by the invention at least realize the following beneficial effects:
in the display panel provided by the invention, because the distance between two adjacent second transistors in the first shift register is larger than the distance between two adjacent second transistors in the second shift register in the first direction, and/or the distance between two adjacent second transistors in the first shift register is larger than the distance between two adjacent second transistors in the second shift register in the second direction, that is, by reducing the distance between two adjacent second transistors in the second shift register in the first direction and/or the second direction, the length of the second shift register in the first direction and/or the width of the second shift register in the second direction are reduced, which is beneficial to reducing the area of the second shift register. The at least one second shift register is located in the special-shaped non-display area, namely, at least one shift register in the shift registers located in the special-shaped non-display area is the second shift register, and the second shift register is smaller in length in the first direction and/or smaller in width in the second direction, so that the width of the special-shaped non-display area in the first direction and/or the second direction is favorably reduced, and narrow framing is favorably realized.
And because the area of the second shift register is reduced by reducing the distance between two adjacent second transistors in the second shift register in the first direction and/or in the second direction, the size of the first transistor in the second shift register is the same as that of the first transistor in the first shift register, and the size of the second transistor in the second shift register is the same as that of the second transistor in the first shift register, the output performances of the second shift register and the first shift register tend to be consistent.
Of course, it is not necessary for any product in which the present invention is practiced to specifically achieve all of the above-described technical effects simultaneously.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is a plan view of a display panel provided by the present invention;
FIG. 2 is an enlarged view of portion A of the display panel of FIG. 1;
FIG. 3 is another enlarged schematic view of portion A of the display panel of FIG. 1;
FIG. 4 is a schematic structural diagram of a first shift register according to the present invention;
FIG. 5 is a schematic diagram of a second shift register according to the present invention;
FIG. 6 is a schematic diagram of a partial structure of a display panel according to the present invention;
FIG. 7 is an enlarged view of the portion C of the display panel shown in FIG. 6;
FIG. 8 is a schematic view of a partial structure of a special-shaped non-display area provided by the present invention;
FIG. 9 is a schematic view of another partial structure of the special-shaped non-display area provided by the present invention;
FIG. 10 is a schematic view of another partial structure of the special-shaped non-display area provided by the present invention;
FIG. 11 is a schematic view of another partial structure of the special-shaped non-display area provided by the present invention;
fig. 12 is a schematic plan view of a display device according to the present invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Fig. 1 is a plan view of a display panel provided by the present invention, and referring to fig. 1, the present embodiment provides a display panel including a display area AA and a non-display area NA surrounding the display area AA, wherein the display area AA is used for displaying, the non-display area NA is not used for displaying, and the non-display area NA may be provided with circuit elements, traces, and other structures.
The non-display area NA includes a barrier portion 10 and a gate driving circuit 20, the barrier portion 10 surrounds the display area AA, and the gate driving circuit 20 is at least partially located between the barrier portion 10 and the display area 20 along the first direction X. Specifically, in some optional embodiments, the first direction X is a direction in which the scan line extends, but the embodiment of the present application is not limited to this, and in other embodiments, the first direction X may also be another direction, which is not described herein again.
The display panel provided by the present invention may be a liquid crystal display panel, an organic light emitting display panel, or another type of display panel. In some optional embodiments, when the display panel is a liquid crystal display panel, the barrier portion 10 is located between the array substrate and the color film substrate, and the barrier portion 10 includes sealant. In some alternative embodiments, when the display panel is an organic light emitting display panel, the barrier 10 is located between the array substrate and the encapsulation layer. When the encapsulation layer is a thin film encapsulation layer, the barrier portion 10 includes a retaining wall. When the encapsulation layer is a rigid encapsulation layer, the barrier portion 10 includes a sealant.
Fig. 2 is an enlarged schematic view of a portion a of the display panel shown in fig. 1, and referring to fig. 1 and 2, the gate driving circuit 20 includes a plurality of cascaded shift registers 30, each shift register 30 may be electrically connected to one scan line G, and the shift registers 30 provide signals to the scan lines G electrically connected thereto.
Fig. 3 is another enlarged schematic view of a portion a of the display panel shown in fig. 1, and referring to fig. 1 and 3, in some alternative embodiments, the gate driving circuit 20 further includes a dummy shift register 301, the dummy shift register 301 may not be electrically connected to the scan line, and the dummy shift register 301 may also be electrically connected to the scan line, but does not provide signals to the sub-pixels located in the display region.
Fig. 4 is a schematic structural diagram of a first shift register provided by the invention, fig. 5 is a schematic structural diagram of a second shift register provided by the invention, referring to fig. 1 and fig. 3 to fig. 5, the shift register 30 includes at least one first transistor T1 and a plurality of second transistors T2, the size of the first transistor T1 is larger than that of the second transistor T2, and in the same shift register 30, the first transistor T1 is located between the display area AA and the second transistor T2 closest to the display area AA. It should be noted that fig. 3 and fig. 4 exemplarily show that the shift register 30 includes one first transistor T1 and four second transistors T2, in other embodiments of the present invention, the shift register 30 may further include other numbers of first transistors T1 and second transistors T2, and the shift register 30 may further include a capacitor, which is not described herein again.
The shift register 30 includes a first shift register 31 and a second shift register 32. In the first direction X, the distance between two adjacent second transistors T2a in the first shift register 31 is d1, the distance between two adjacent second transistors T2b in the second shift register 32 is d2, and d1 > d2, that is, in the first direction X, the distance between two adjacent second transistors T2a in the first shift register 31 is greater than the distance between two adjacent second transistors T2b in the second shift register 32, and by reducing the distance between two adjacent second transistors T2b in the second shift register 32 in the first direction X, the length of the second shift register 32 in the first direction X is reduced.
In the second direction Y, a pitch between two adjacent second transistors T2a in the first shift register 31 is larger than a pitch between two adjacent second transistors T2b in the second shift register 32, wherein the first direction X and the second direction Y intersect. Optionally, the first direction X and the second direction Y are perpendicular. By reducing the pitch between two adjacent second transistors T2b in the second shift register 32 in the second direction Y, the width of the second shift register 32 in the second direction Y is reduced.
It should be noted that the present embodiment exemplarily shows that in the first direction X, the distance between two adjacent second transistors T2a in the first shift register 31 is greater than the distance between two adjacent second transistors T2b in the second shift register 32, and in the second direction Y, the distance between two adjacent second transistors T2a in the first shift register 31 is greater than the distance between two adjacent second transistors T2b in the second shift register 32. In other embodiments of the present invention, it may also be adopted in the display panel that a distance between two adjacent second transistors T2a in the first shift register 31 is greater than a distance between two adjacent second transistors T2b in the second shift register 32 in the first direction X, or a distance between two adjacent second transistors T2a in the first shift register 31 is greater than a distance between two adjacent second transistors T2b in the second shift register 32 in the second direction Y.
The display panel provided by the embodiment is a specially-shaped display panel, that is, the shape of the display panel is not rectangular. The non-display area NA includes a bundled area NA2, at least one shaped non-display area NA1 disposed adjacent to the bundled area NA2, the shaped non-display area NA1 is located at a corner area of the display panel, and the shaped non-display area NA1 does not extend in either the first direction X or the second direction Y. The display panel further includes a driver chip 40, and the driver chip 40 is bound to the binding area NA 2. The shaped non-display area NA1 is located at one side of the bundled area NA2 along the first direction X, i.e., the shaped non-display area NA1 is located at a corner area of one side of the display panel close to the driving chip 40.
The special-shaped non-display area NA1 includes a special-shaped edge B1, the special-shaped edge B1 is located on a side of the special-shaped non-display area NA1 close to the display area AA, an extending direction of the special-shaped edge B1 intersects both the first direction X and the second direction Y, the special-shaped edge B1 may be a curved line segment, an arc line segment, or an oblique line segment, and fig. 1 and 2 only use the special-shaped edge B1 as an arc line segment for illustration.
Because the structure of dysmorphism non-display area NA1 is set to the corner district in the non-display area NA in the display panel, compare with the structure that the corner district sets to the right angle shape in the non-display area NA, the area of dysmorphism non-display area NA1 is less, and dysmorphism non-display area NA1 is close to the setting of binding district NA2, still be provided with the line of being connected with driver chip 40 electricity in the dysmorphism non-display area NA1, thereby cause the space that is used for placing shift register 30 in the dysmorphism non-display area NA1 not enough, need increase the width of dysmorphism non-display area NA1 on first direction X and/or second direction Y and place shift register 30, be unfavorable for realizing the narrow frame.
In some alternative embodiments, with reference to fig. 3, a dummy shift register 301 is further disposed in the gate driving circuit 20, the dummy shift register 301 does not need to provide signals to the sub-pixels located in the display area, and the dummy shift register is disposed in the non-display area NA 1. For example, the dummy shift register 301 may be configured to close the shift register 30 connected to the scan line at the last stage and empty the charge in the driving node thereof, and of course, in other embodiments of the present invention, the dummy shift register 301 may have other functions, which will not be described herein again. The arrangement of the virtual shift register 301 in the special-shaped non-display area NA1 further results in an insufficient layout area of the shift register 30 in the special-shaped non-display area NA1, and the width of the special-shaped non-display area NA1 in the first direction X and/or the second direction Y needs to be further increased to place the virtual shift register 301, which is not favorable for realizing a narrow frame.
It should be noted that fig. 3 exemplarily shows that one virtual shift register 301 is arranged in the gate driving circuit 20, in other embodiments of the present invention, other numbers of virtual shift registers may also be arranged in the gate driving circuit 20 according to actual production requirements, and details of the present invention are not repeated herein.
Since the spacing between two adjacent second transistors T2a in the first shift register 31 is greater than the spacing between two adjacent second transistors T2b in the second shift register 32 in the first direction X, and/or the spacing between two adjacent second transistors T2a in the first shift register 31 is greater than the spacing between two adjacent second transistors T2b in the second shift register 32 in the second direction Y, that is, by reducing the spacing between two adjacent second transistors T2b in the second shift register 32 in the first direction X and/or the second direction Y, the length of the second shift register 32 in the first direction X and/or the width in the second direction Y is reduced, which is advantageous for reducing the area of the second shift register 32. At least one second shift register 32 is located in the irregular non-display area NA1, that is, at least one shift register 30 of the shift registers 30 located in the irregular non-display area NA1 is the second shift register 32, and since the length of the second shift register 32 in the first direction X is smaller and/or the width of the second shift register 32 in the second direction Y is smaller, the width of the irregular non-display area NA1 in the first direction X and/or the second direction Y is favorably reduced, and the narrow bezel is favorably realized.
And since the area of the second shift register 32 is reduced in the second shift register 32 by reducing the pitch between two adjacent second transistors T2b in the first direction X and/or in the second direction Y, the size of the first transistor T1b in the second shift register 32 is the same as the size of the first transistor T1a in the first shift register 31, and the size of the second transistor T2b in the second shift register 32 is the same as the size of the second transistor T2a in the first shift register 31, so that the output performance of the second shift register 32 and the first shift register 31 tends to be uniform.
In the present embodiment, only one side of the display panel is provided with the gate driver circuit 20 as an example. Alternatively, the gate driving circuit 20 may be disposed on both sides of the display panel.
In other embodiments of the present invention, the non-display area may further include two or more special-shaped non-display areas, and the setting of the shift register in each special-shaped non-display area may refer to the setting in fig. 2, which is not described herein again.
In some alternative embodiments, the first shift register 31 is spaced from the barrier 10 by L1, the second shift register 32 is spaced from the barrier 10 by L2, and L1 < L2, i.e. the spacing between the first shift register 31 and the barrier 10 is smaller.
The common material of the barrier portion 10 is a curing adhesive, the curing effect of which is affected by the light transmittance, and the higher the light transmittance, the better the curing effect. Because the interval between two adjacent second crystals T2a is great in first shift register 31, effectively reduce the influence to the luminousness of separation portion 10, can effectively reduce the interval between first shift register 31 and the separation portion 10, be favorable to reducing the width of non-display area NA on first direction X, effectively reduce the area of non-display area NA, be favorable to realizing the narrow frame. Further, in order to further reduce the width of the non-display area NA in the first direction X, a portion of the first shift register 31 overlaps with the barrier section 10 in the direction perpendicular to the display panel, and illustratively, the second crystal T2a in the first shift register 31 overlaps with the barrier section 10 in the direction perpendicular to the display panel, since the distance between two adjacent second crystals T2a in the first shift register 31 is large, the influence on the light transmittance of the barrier section 10 is small, and the influence on the curing effect of the barrier section 10 is small.
In some alternative embodiments, L1 < 150 μm ≦ L2. When the pitch between the first shift register 31 and the barrier portion 10 is smaller than 150 μm, the pitch between two adjacent second crystals T2 in the shift register 30 has a large influence on the curing effect of the barrier portion 10. In the gate driver circuit 20, the shift register 30 having a distance smaller than 150 μm from the barrier portion 10 is the first shift register 31, and the distance between two adjacent second transistors T2a in the first shift register 31 is large, so that the influence on the light transmittance of the barrier portion 10 is effectively reduced. Alternatively, the first shift register 31 partially overlaps the barrier section 10 in a direction perpendicular to the display panel.
It should be noted that, in the gate driving circuit 20 shown in this embodiment, the shift register 30 having a distance from the blocking portion 10 smaller than 150 μm is the first shift register 31, and the shift register 30 having a distance from the blocking portion 10 greater than or equal to 150 μm is the second shift register 32, in other embodiments of the present invention, other process standards may also be adopted to set the shift register 30 to be the first shift register 31 or the second shift register 32 according to the distance from the blocking portion 10, which is not described herein again.
With continued reference to fig. 1 and 2, in some alternative embodiments, the non-display area NA further includes a second non-display area NA3, the second non-display area NA3 is located at one side of the display area AA along the first direction X, and the second non-display area NA3 extends along the second direction Y, the space between the shift register 30 and the blocking part 10 in the second non-display area NA3 is small, in some alternative embodiments, the shift register 30 in the second non-display area NA3 partially overlaps with the blocking part 10, the shift register 30 located in the second non-display area NA3 is the first shift register 31, since the distance between two adjacent second crystals T2a in the first shift register 31 is large, the influence on the light transmittance of the barrier portion 10 is effectively reduced, the distance between the first shift register 31 and the blocking portion 10 can be effectively reduced, the width of the second non-display area NA3 in the first direction X can be effectively reduced, and the narrow frame can be realized.
Fig. 6 is a partial schematic structure diagram of a display panel provided by the present invention, fig. 7 is an enlarged schematic diagram of a portion C in the display panel shown in fig. 6, referring to fig. 1, fig. 6 and fig. 7, in some optional embodiments, the non-display area NA further includes a fan-shaped routing area NA4, the plurality of traces 50 extend from the display area AA to extend through the fan-shaped routing area NA4 to be electrically connected to the driver chip 40, and therefore, the fan-shaped routing area NA4 is located between the display area AA and the driver chip 40. Specifically, in some optional embodiments, the trace 50 is a data line, but the embodiment of the present application is not limited thereto, and in other embodiments, the trace 50 may also be another signal line, which is not described herein again. Since the corner area of the non-display area NA in the display panel near the driving chip 40 is configured as the special-shaped non-display area NA1, a part of the fan-shaped wiring area NA4 is located in the special-shaped non-display area NA1 between the gate driving circuit 20 and the display area AA.
Specifically, in the structures shown in fig. 6 and 7, since the adjacent second shift registers 32 are arranged by being shifted, and the overlapping area of the adjacent second shift registers 32 in the second direction Y is: the second sub-section 34b of one of the second shift registers 32 and the first sub-section 33b of the other second shift register 32, thus enabling a further narrow bezel in both the first direction X and the second direction Y.
With continued reference to fig. 4 and 5, in some alternative embodiments, the shift register 30 includes a first sub-section 33 and a second sub-section 34 arranged along the first direction X, the first transistor T1 being located in the first sub-section 33, and the second transistor T2 being located in the second sub-section 34.
In the second direction Y, the spacing between two adjacent second transistors T2a in the first shift register 31 is greater than the spacing between two adjacent second transistors T2b in the second shift register 32, so that, in the first shift register 31, the width of the first sub-area 33a is h1 and the width of the second sub-area 34a is h2 in the second direction Y; in the second shift register 32, in the second direction Y, the width of the first sub-area 33b is h1, and the width of the second sub-area 34b is h 3; wherein h2 is more than 0 and more than h3 and less than or equal to h 1. I.e. in the second direction Y, the width of the second sub-section 34a in the first shift register 31 is smaller than the width of the second sub-section 34b in the second shift register 32. Since the size of the first transistor T1 is larger than the size of the second transistor T2 in the shift register 30, the width of the first sub-area 33a in the first shift register 31 is the width of the first transistor T1 in the second direction Y. In the second direction Y, the width of the second sub-area 34a in the first shift register 31 is smaller than the width of the first sub-area 33, and the width of the second sub-area 34b in the second shift register 32 is smaller than or equal to the width of the first sub-area 33, which effectively reduces the width of the shift register 30 in the second direction Y.
It should be noted that fig. 3-5 exemplarily show that the first sub-area 33 includes one first transistor T1, the second sub-area 34 includes four first transistors T1 and the first transistors T1 are arranged in an array, in other embodiments of the present invention, the first sub-area 33 may further include two or more first transistors T1, and the first transistors T1 in the first sub-area 33 are arranged along the first direction X, the second sub-area 34 may further include another number of second transistors T2, and the second transistors T2 may also be arranged in another manner.
In some alternative embodiments, when the first sub-section 33 comprises two or more first transistors T1, the spacing between two adjacent first transistors T1a in the first shift register 31 may be larger than the spacing between two adjacent first transistors T1b in the second shift register 32, further reducing the length of the second shift register 32 in the first direction X.
In the prior art, because the corner area of the non-display area in the display panel, which is close to the driving chip, is configured as the special-shaped non-display area, when the shift registers in the special-shaped non-display area are arranged along the second direction, all the shift registers cannot be placed in the special-shaped non-display area under the condition that the width of the special-shaped non-display area in the second direction is not changed. In order not to increase the width of the shaped non-display area in the second direction, there is a structure in which two or more shift registers are arranged in the first direction in the shaped non-display area, resulting in a larger width of the shaped non-display area in the first direction. And part of the fan-shaped wiring area is positioned in the special-shaped non-display area and between the grid drive circuit and the display area, so that the width of the special-shaped non-display area in the first direction is further larger.
Fig. 8 is a partial structural schematic diagram of the special-shaped non-display area provided by the present invention, referring to fig. 8, in some alternative embodiments, a portion of the shift register 30 in the special-shaped non-display area NA1 is the second shift register 32, and the second shift registers 32 are sequentially arranged in the second direction Y. Since the width of the second sub-area 34b in the second shift register 32 is less than or equal to the width of the first sub-area 33b, at least a part of the second shift register 32 can be set to be located in the space formed by the first sub-area 33b and the second sub-area 34b in the second shift register 32 adjacent to the second shift register 32, and the space formed by the first sub-area 33b and the second sub-area 34b in the second shift register 32 can be effectively utilized, so that more shift registers 30 can be set without changing the width of the special-shaped non-display area NA1 in the second direction Y, thereby avoiding two or more shift registers 30 from being arranged in parallel in the first direction X in the special-shaped non-display area NA1, effectively reducing the width of the special-shaped non-display area NA1 in the first direction X, and facilitating edge narrowing.
It will be appreciated that, by way of example, with reference to fig. 8, the second shift register 32a being partially located in the space formed by the first sub-area 33b and the second sub-area 34b in the second shift register 32b adjacent thereto means that, in the direction perpendicular to the display panel, the second shift register 32a and the second shift register 32b do not overlap, and the first sub-area 33b and the second sub-area 34b in the second shift register 32b are arranged half-way around the second shift register 32a in a T-shape or L-shape.
With continued reference to fig. 1 and 8, in some alternative embodiments, except for the last stage of the second shift register 32, the rest of the second shift register 32 is partially located in the space formed by the first sub-area 33b and the second sub-area 34b in the next stage of the second shift register 32 adjacent to the rest of the second shift register 32.
In some alternative embodiments, the portion of the first shift register 31 adjacent to the first stage second shift register 32 is located in the space formed by the first sub-section 33b and the second sub-section 34b in the adjacent second shift register 32.
Alternatively, the second shift registers 32 may be arranged along the extending direction of the shaped edge B1.
Fig. 9 is a schematic partial structure view of another special-shaped non-display area provided by the present invention, and referring to fig. 1 and fig. 9, in some alternative embodiments, the display panel further includes a plurality of first shift register sets 35, and one first shift register set 35 includes at least two second shift registers 32.
In the same first shift register group 35, except for the first stage of the second shift register 32, the rest of the second shift registers 32 are partially located in the space formed by the first sub-region 33b and the second sub-region 34b in the previous stage of the second shift register 32 adjacent to the first stage of the second shift register group.
Alternatively, the first shift register group 35 may be arranged along the extending direction of the shaped edge B1.
It should be noted that fig. 9 exemplarily shows that one first shift register group 35 includes two second shift registers 32, in other embodiments of the present invention, one first shift register group 35 further includes three or more second shift registers 32, and the arrangement of the second shift registers 32 in the same first shift register group 35 can refer to fig. 9, which is not described herein again.
Fig. 10 is a schematic partial structure diagram of a special-shaped non-display area provided by the present invention, and referring to fig. 10, in some alternative embodiments, the display panel further includes a plurality of first shift register sets 35 and a plurality of second shift register sets 36.
One first shift register group 35 includes at least two second shift registers 32, and in the same first shift register group 35, except for the first-stage second shift register 32, the rest of the second shift registers 32 are partially located in the space formed by the first sub-area 33b and the second sub-area 34b in the previous-stage second shift register 32 adjacent to the first shift register group.
One second shift register group 36 includes at least two second shift registers 32, and in the same second shift register group 36, except for the last stage second shift register 32, the rest of the second shift registers 32 are partially located in the space formed by the first sub-area 33b and the second sub-area 34b in the next stage second shift register 32 adjacent to the second shift register group.
In the second direction Y, the first shift register group 35 and the second shift register group 36 are arranged at intervals.
Alternatively, the first shift register group 35 and the second shift register group 36 may be arranged along the extending direction of the special-shaped edge B1.
It should be noted that fig. 10 exemplarily shows that one first shift register group 35 includes two second shift registers 32, one second shift register group 36 includes two second shift registers 32, in other embodiments of the present invention, one first shift register group 35 further includes three or more second shift registers 32, one second shift register group 36 further includes three or more second shift registers 32, and the arrangement of the second shift registers 32 in the same first shift register group 35 and the arrangement of the second shift registers 32 in the same second shift register group 36 can both refer to fig. 10, which is not described herein again.
Fig. 8-10 exemplarily show three arrangements of the second shift register 32 when the display panel includes the second shift register 32 sequentially arranged in the second direction Y, because the width of the second sub-area 34b in the second shift register 32 is less than or equal to the width of the first sub-area 33b, at least a part of the second shift register 32 can be disposed in the space formed by the first sub-area 33b and the second sub-area 34b in the second shift register 32 adjacent thereto, the space formed by the first sub-area 33b and the second sub-area 34b in the second shift register 32 can be effectively utilized, so that more shift registers 30 can be disposed without changing the width of the special-shaped non-display area NA1 in the second direction Y, thereby avoiding disposing two or more shift registers 30 in the special-shaped non-display area NA1 in parallel with each other along the first direction X, the width of the special-shaped non-display area NA1 in the first direction X is effectively reduced, and the edge narrowing is facilitated.
It should be noted that the arrangement of the second shift register 32 in the display panel may also adopt other arrangement modes according to the extending direction of the special-shaped edge B1, and the description of the invention is omitted here.
Fig. 11 is a schematic partial structure diagram of a special-shaped non-display area provided by the present invention, and referring to fig. 1 and fig. 11, in some alternative embodiments, the display panel further includes a plurality of third shift register groups 37, and a third shift register group 37 includes a first shift register 31 and a second shift register 32. In the same third shift register group 37, the first shift register 31 is partially located in the space formed by the first sub-area 33b and the second sub-area 34b in the second shift register 32, and the space formed by the first sub-area 33b and the second sub-area 34b in the second shift register 32 is effectively utilized, so that more shift registers 30 can be arranged under the condition that the width of the special-shaped non-display area NA1 in the second direction Y is not changed, thereby avoiding that two or more shift registers 30 are arranged in parallel in the first direction X in the special-shaped non-display area NA1, effectively reducing the width of the special-shaped non-display area NA1 in the first direction X, and being beneficial to realizing narrow edge.
In the second direction Y, the third shift register groups 37 are arranged in order. Alternatively, the third shift register group 37 may be arranged along the extending direction of the shaped edge B1.
In some alternative embodiments, please refer to fig. 12, where fig. 12 is a schematic plan view of a display device provided in the present invention, and the display device 1000 provided in this embodiment includes the display panel 100 provided in the above embodiments of the present invention. The embodiment of fig. 12 is only an example of a mobile phone, and the display device 1000 is described, it is to be understood that the display device 1000 provided in the embodiment of the present invention may also be another display device 1000 having a display function, such as a computer, a television, a vehicle-mounted display device, and the present invention is not limited thereto. The display device 1000 provided in the embodiment of the present invention has the beneficial effects of the display panel 100 provided in the embodiment of the present invention, and specific reference may be made to the specific description of the display panel 100 in the foregoing embodiments, and the detailed description of the embodiment is not repeated herein.
As can be seen from the above embodiments, the display panel and the display device provided by the present invention at least achieve the following beneficial effects:
in the display panel provided by the invention, because the distance between two adjacent second transistors in the first shift register is larger than the distance between two adjacent second transistors in the second shift register in the first direction, and/or the distance between two adjacent second transistors in the first shift register is larger than the distance between two adjacent second transistors in the second shift register in the second direction, that is, by reducing the distance between two adjacent second transistors in the second shift register in the first direction and/or the second direction, the length of the second shift register in the first direction and/or the width of the second shift register in the second direction are reduced, which is beneficial to reducing the area of the second shift register. The at least one second shift register is located in the special-shaped non-display area, namely, at least one shift register in the shift registers located in the special-shaped non-display area is the second shift register, and the second shift register is smaller in length in the first direction and/or smaller in width in the second direction, so that the width of the special-shaped non-display area in the first direction and/or the second direction is favorably reduced, and narrow framing is favorably realized.
And because the area of the second shift register is reduced by reducing the distance between two adjacent second transistors in the second shift register in the first direction and/or in the second direction, the size of the first transistor in the second shift register is the same as that of the first transistor in the first shift register, and the size of the second transistor in the second shift register is the same as that of the second transistor in the first shift register, the output performances of the second shift register and the first shift register tend to be consistent.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (13)
1. A display panel, comprising: a display area and a non-display area surrounding the display area;
the non-display area comprises a blocking part and a gate driving circuit, the blocking part surrounds the display area, and the gate driving circuit is at least partially positioned between the blocking part and the display area along a first direction;
the gate driving circuit comprises a plurality of cascaded shift registers, each shift register comprises at least one first transistor and a plurality of second transistors, the size of each first transistor is larger than that of each second transistor, and in the same shift register, the first transistors are located between the display area and the second transistors closest to the display area; the shift register comprises a first shift register and a second shift register;
in the first direction, the distance between two adjacent second transistors in the first shift register is larger than the distance between two adjacent second transistors in the second shift register, and/or in the second direction, the distance between two adjacent second transistors in the first shift register is larger than the distance between two adjacent second transistors in the second shift register, wherein the first direction and the second direction intersect;
the non-display area further comprises a binding area and at least one special-shaped non-display area which is arranged close to the binding area, and the special-shaped non-display area is positioned on one side of the binding area along the first direction;
the special-shaped non-display area comprises a section of special-shaped edge, the special-shaped edge is positioned on one side, close to the display area, of the special-shaped non-display area, and the extending direction of the special-shaped edge is intersected with the first direction and the second direction;
the display panel further comprises a driving chip, and the driving chip is bound in the binding area;
at least one of the second shift registers is located in the special-shaped non-display area.
2. The display panel according to claim 1,
the distance between the first shift register and the blocking part is L1, the distance between the second shift register and the blocking part is L2, and L1 < L2.
3. The display panel according to claim 2,
L1＜150μm≤L2。
4. the display panel according to claim 1,
the non-display area further comprises a second non-display area, the second non-display area is positioned on one side of the display area along the first direction, and the second non-display area extends along the second direction;
the shift register located in the second non-display area is a first shift register.
5. The display panel according to claim 1,
the non-display area further comprises a fan-shaped wiring area, the fan-shaped wiring area is located between the display area and the driving chip, and part of the fan-shaped wiring area is located in the special-shaped non-display area and between the grid driving circuit and the display area.
6. The display panel according to claim 5,
the shift register comprises a first subregion and a second subregion which are arranged along the first direction, the first transistor is positioned in the first subregion, and the second transistor is positioned in the second subregion;
in the first shift register, in the second direction, the width of the first sub-area is h1, and the width of the second sub-area is h 2;
in the second shift register, in a second direction, the width of the first sub-area is h1, and the width of the second sub-area is h 3; wherein the content of the first and second substances,
0＜h3＜h2≤h1。
7. the display panel according to claim 6,
in the second direction, the second shift registers are arranged in sequence, and at least part of the second shift registers are located in a space formed by the first sub-area and the second sub-area in the second shift register adjacent to the second shift register.
8. The display panel according to claim 7,
except the second shift register of the last stage, the rest second shift registers are partially positioned in a space formed by a first subarea and a second subarea in the second shift register adjacent to the rest second shift registers.
9. The display panel according to claim 7,
the display panel further includes a plurality of first shift register groups, one of the first shift register groups including at least two of the second shift registers;
in the same first shift register group, except for the second shift register of the first stage, the rest of the second shift registers are partially positioned in a space formed by a first sub-area and a second sub-area in the second shift register adjacent to the first shift register group.
10. The display panel according to claim 7,
the display panel further includes a plurality of first shift register groups and a plurality of second shift register groups;
one first shift register group comprises at least two second shift registers, and in the same first shift register group, except for the first-stage second shift register, the rest second shift registers are partially positioned in a space formed by a first sub-area and a second sub-area in the adjacent second shift register;
one second shift register group comprises at least two second shift registers, and in the same second shift register group, except the last stage of the second shift register, the rest second shift registers are partially positioned in a space formed by a first subarea and a second subarea in the second shift register adjacent to the second shift register group;
in the second direction, the first shift register group and the second shift register group are arranged at intervals.
11. The display panel according to claim 6,
the display panel further includes a plurality of third shift register groups, one of the third shift register groups including one of the first shift registers and one of the second shift registers;
in the same third shift register group, the first shift register part is located in a space formed by a first subarea and a second subarea in the second shift register;
in the second direction, the third shift register groups are arranged in sequence.
12. The display panel according to claim 1,
the blocking part comprises frame glue.
13. A display device characterized by comprising the display panel according to any one of claims 1 to 12.
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