CN113303033A - Substrate assembly and air conditioner - Google Patents

Substrate assembly and air conditioner Download PDF

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Publication number
CN113303033A
CN113303033A CN201980070359.7A CN201980070359A CN113303033A CN 113303033 A CN113303033 A CN 113303033A CN 201980070359 A CN201980070359 A CN 201980070359A CN 113303033 A CN113303033 A CN 113303033A
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China
Prior art keywords
region
patch capacitor
capacitor
component
substrate assembly
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CN201980070359.7A
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Chinese (zh)
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CN113303033B (en
Inventor
小畑智辉
藤间美子
池内直哉
森本悠介
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G2/00Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02Mountings
    • H01G2/06Mountings specially adapted for mounting on a printed-circuit support
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The present invention relates to a board assembly for supplying electric power to devices constituting an air-conditioning apparatus. The substrate assembly has: a wiring substrate; a rectangular parallelepiped patch capacitor disposed on the wiring substrate; and a 1 st member and a 2 nd member each having a rectangular parallelepiped shape and disposed on the wiring substrate so as to sandwich the chip capacitor. The patch capacitor is arranged so that at least a part of the patch capacitor overlaps with a 1 st protection region and a 2 nd protection region, respectively, in a plan view, the 1 st protection region being a semicircular region on the patch capacitor side having a diameter corresponding to a side of the 1 st component facing the patch capacitor, and the 2 nd protection region being a semicircular region on the patch capacitor side having a diameter corresponding to a side of the 2 nd component facing the patch capacitor.

Description

Substrate assembly and air conditioner
Technical Field
The present invention relates to a substrate assembly having a wiring board on which a Chip capacitor (Chip capacitor) is mounted, and an air conditioner.
Background
Conventionally, an air-conditioning apparatus includes a substrate assembly in which a chip capacitor such as a multilayer ceramic capacitor is mounted on a wiring substrate (see, for example, patent document 1). When a load is applied to a part of the wiring board due to attachment of the wiring board to the housing box, insertion and removal of the connector, or the like, the wiring board is bent and deformed at each position of the wiring board.
In the wiring board, if the amount of deformation of the mounting portion of the chip capacitor exceeds a predetermined value, the chip capacitor may be cracked and broken. Therefore, in the substrate assembly, it is necessary to suppress the amount of deformation of the mounting portion of the chip capacitor to a predetermined value or less.
Further, since the patch capacitor has been miniaturized in recent years, the resistance of the wiring board against deformation is reduced, and the risk of failure is increased. Therefore, even when a load is applied to a part of the wiring board, it is necessary to consider that the amount of deformation of the mounting portion of the chip capacitor is reduced as much as possible.
Patent document 1: japanese patent laid-open publication No. 2018-129982
However, in the conventional board assembly as in patent document 1, a certain distance is secured between the chip capacitor and the other board mounting component, and the other component is provided only on one of the parallel 2 side surfaces of the chip capacitor. Each of the components mounted on the wiring board forms a protection region for improving the rigidity of the periphery of the component on the wiring board. However, in the case of the conventional board assembly, a protection region for other components provided in a wiring board is intentionally not formed at a mounting portion of the chip capacitor. Therefore, when a load is applied to a part of the wiring board, the amount of deformation of the mounting portion of the chip capacitor exceeds a predetermined value, which causes a crack in the chip capacitor and a failure in the chip capacitor.
Disclosure of Invention
The present invention has been made to solve the above-described problems, and an object thereof is to provide a substrate assembly and an air conditioner in which a failure of a chip capacitor due to the occurrence of a crack is suppressed even when a load is applied to a part of a wiring substrate.
A substrate assembly according to the present invention is a substrate assembly for supplying electric power to a device constituting an air-conditioning apparatus, the substrate assembly including: a wiring substrate; a rectangular parallelepiped patch capacitor disposed on the wiring substrate; and a rectangular parallelepiped 1 st member and a 2 nd member arranged on the wiring substrate so as to sandwich the chip capacitor, the chip capacitor being arranged so that at least a part thereof overlaps with a 1 st protective region and a 2 nd protective region, respectively, in a plan view, the 1 st protective region being a semicircular region on the chip capacitor side where a side of the 1 st member facing the chip capacitor is a diameter, and the 2 nd protective region being a semicircular region on the chip capacitor side where a side of the 2 nd member facing the chip capacitor is a diameter.
An air conditioning device according to the present invention includes: the substrate assembly described above; and a refrigerant circuit formed by connecting the compressor, the load-side heat exchanger, the expansion valve, and the heat-source-side heat exchanger by refrigerant pipes.
According to the present invention, since at least a part of the patch capacitor overlaps with each of the 1 st protective region and the 2 nd protective region, even when a load is applied to a part of the wiring board, the rigidity of the mounting portion of the patch capacitor on the wiring board can be improved. Therefore, since an increase in the amount of deformation of the mounting portion of the chip capacitor on the wiring board can be suppressed, a failure of the chip capacitor due to the occurrence of a crack can be suppressed.
Drawings
Fig. 1 is a configuration diagram illustrating an overall view of an air-conditioning apparatus according to embodiment 1 of the present invention.
Fig. 2 is a plan view showing a configuration example of the substrate assembly of fig. 1.
Fig. 3 is a graph illustrating a relationship between a distance from the connector receiving portion and a deformation amount of the wiring substrate in the case where the substrate assembly of fig. 2 does not have the 1 st member and the 2 nd member.
Fig. 4 is an explanatory view illustrating a region where the amount of deformation of the wiring substrate exceeds the threshold value when the 1 st component and the 2 nd component are not mounted when the connector is inserted into and removed from the connector receiving portion, together with the substrate assembly of fig. 2.
Fig. 5 is an explanatory view illustrating the wiring substrate and the patch capacitor of fig. 2.
Fig. 6 is an explanatory view illustrating a state in which the wiring substrate of fig. 5 is flexed.
Fig. 7 is a side view illustrating how the wiring board is bent when a downward load is applied to the connector receiving portion of fig. 2.
Fig. 8 is a plan view showing a different configuration example of the substrate assembly of fig. 1 from that of fig. 2.
Fig. 9 is a plan view showing a different configuration example of the substrate assembly of fig. 1 from those of fig. 2 and 8.
Fig. 10 is a plan view showing a different configuration example of the substrate assembly of fig. 1 from that of fig. 2, 8, and 9.
Fig. 11 is a plan view showing an example of the configuration of the substrate assembly according to modification 1-1 of embodiment 1 of the present invention.
Fig. 12 is a side view showing a configuration example of a substrate assembly according to modification 1-2 of embodiment 1 of the present invention.
Fig. 13 is a plan view showing an example of the configuration of a substrate assembly included in an air-conditioning apparatus according to embodiment 2 of the present invention.
Fig. 14 is a plan view showing a configuration example of the substrate assembly according to embodiment 2 of the present invention, which is different from that of fig. 13.
Fig. 15 is a side view illustrating a state in which a downward load is applied to the connector receiving portion of fig. 14 and the wiring board is deflected.
Fig. 16 is an explanatory view showing a state in which the wiring board of fig. 14 is bent downward about the 1 st component, the chip capacitor, and the 2 nd component.
Fig. 17 is an explanatory view showing a state in which the wiring board of fig. 14 is bent upward about the 1 st component, the chip capacitor, and the 2 nd component.
Fig. 18 is a plan view showing a different configuration example from those of fig. 13 and 14 of the substrate assembly according to embodiment 2 of the present invention.
Fig. 19 is a plan view showing an example of the configuration of the substrate assembly according to modification 2-1 of embodiment 2 of the present invention.
Detailed Description
Embodiment 1.
Fig. 1 is a configuration diagram illustrating an overall view of an air-conditioning apparatus according to embodiment 1 of the present invention. The air conditioning and the overall structure of the apparatus 100 are explained with reference to fig. 1.
As shown in fig. 1, the air-conditioning apparatus 100 includes a compressor 51, a four-way valve 52, a load-side heat exchanger 53, an expansion valve 54, and a heat-source-side heat exchanger 55. That is, the air-conditioning apparatus 100 includes a refrigerant circuit 50 in which a compressor 51, a four-way valve 52, a load-side heat exchanger 53, an expansion valve 54, and a heat-source-side heat exchanger 55 are connected by refrigerant pipes R.
Further, the air-conditioning apparatus 100 includes: a load-side fan 63 attached to the load-side heat exchanger 53 and configured to send air to the load-side heat exchanger 53; and a heat-source-side fan 65 that is attached to the heat-source-side heat exchanger 55 and sends air to the heat-source-side heat exchanger 55. For example, the compressor 51, the four-way valve 52, the expansion valve 54, the heat source side heat exchanger 55, and the heat source side blower 65 constitute components of an outdoor unit disposed outdoors, and the load side heat exchanger 53 and the load side blower 63 constitute components of an indoor unit disposed indoors.
The compressor 51 is driven by, for example, an inverter, and compresses a refrigerant. The four-way valve 52 is connected to the discharge side of the compressor 51 and switches the flow path of the refrigerant. The four-way valve 52 is switched to a flow path of a solid line in fig. 1, for example, during the heating operation, and is switched to a flow path of a broken line in fig. 1 during the cooling operation and the defrosting operation. The load-side heat exchanger 53 is constituted by, for example, a fin-and-tube heat exchanger, and exchanges heat between the indoor air and the refrigerant. The expansion valve 54 is, for example, an electronic expansion valve, and decompresses and expands the refrigerant. The heat source side heat exchanger 55 is constituted by, for example, a fin-and-tube heat exchanger, and exchanges heat between the outside air and the refrigerant.
Further, the air-conditioning apparatus 100 has a control unit 1 including a housing box 1a and a substrate assembly 10. The control unit 1 includes a control device (control device) that controls devices such as the compressor 51, the four-way valve 52, the expansion valve 54, the load-side blower 63, and the heat-source-side blower 65 that constitute the air-conditioning apparatus 100. The control device is composed of an arithmetic device such as a cpu (central Processing unit) and an operation program that realizes various functions in cooperation with the arithmetic device. The control unit 1 supplies electric power to each device constituting the air-conditioning apparatus 100 through the board assembly 10.
In fig. 1, an example in which 1 substrate assembly 10 is provided in the control unit 1 is shown, but the present invention is not limited to this, and a plurality of substrate assemblies 10 may be provided in the control unit 1. In fig. 1, the substrate assembly 10 is illustrated as controlling the supply of electric power to all the devices requiring electric power supply in the air-conditioning apparatus 100, but the present invention is not limited to this. For example, the air-conditioning apparatus 100 may include, as the control unit 1, a control unit that controls devices provided in the indoor unit and a control unit that controls devices provided in the outdoor unit. In this case, the air-conditioning apparatus 100 includes at least 1 board assembly 10 that supplies power to the devices provided in the indoor unit and at least 1 board assembly 10 that supplies power to the devices provided in the outdoor unit.
Fig. 2 is a plan view showing a configuration example of the substrate assembly of fig. 1. The substrate assembly 10 supplies power to the devices constituting the air-conditioning apparatus 100. As shown in fig. 2, the board assembly 10 includes a wiring board 11 fixed and housed in a housing case 1a, and a rectangular parallelepiped chip capacitor 20 disposed on the wiring board 11. The patch capacitor 20 of embodiment 1 is a multilayer ceramic capacitor. The substrate assembly 10 includes a 1 st member 31 and a 2 nd member 32 arranged in a rectangular parallelepiped shape on the wiring substrate 11 with the chip capacitor 20 interposed therebetween.
The patch capacitor 20 is arranged so that at least a part thereof overlaps with a 1 st protective region 31a and a 2 nd protective region 32a, respectively, in a plan view, the 1 st protective region 31a being a region of a semicircle on the patch capacitor 20 side having a diameter of the opposite side 1m, and the 2 nd protective region 32a being a region of a semicircle on the patch capacitor 20 side having a diameter of the opposite side 2 m. The facing side 1m is a side of the 1 st member 31 facing the patch capacitor 20 in a plan view. The facing side 2m is a side of the 2 nd member 32 facing the patch capacitor 20 in a plan view. Here, the side parallel to the facing side 1m of the 1 st member 31 in a plan view and the facing side 1m are defined as the longer sides of the 1 st member 31. The side parallel to the facing side 2m of the 2 nd member 32 in a plan view and the facing side 2m are long sides of the 2 nd member 32.
The 1 st protective region 31a is a region where the rigidity of the wiring substrate 11 is particularly improved by mounting the 1 st component 31. The 2 nd protective region 32a is a region where the rigidity of the wiring substrate 11 is particularly improved by mounting the 2 nd component 32. Actually, the protection region 31b, which is a region under the 1 st member 31 and a semicircular region outside the 1 st member 31 having the long side opposite to the facing side 1m as a diameter, is also a region in which the rigidity of the wiring substrate 11 is improved, similarly to the 1 st protection region 31 a. Further, the protection region 32b in which the region of the lower portion of the 2 nd member 32 is combined with the semicircular region outside the 2 nd member 32 having the long side opposite to the facing side 2m as the diameter is also a region in which the rigidity of the wiring substrate 11 is improved, similarly to the 2 nd protection region 32 a.
Although not shown, a semicircular region in which the respective short sides of the 1 st member 31 and the 2 nd member 32 are located outside the diameter in a plan view also serves as a protection region in which the rigidity of the wiring substrate 11 is improved. The short side of the 1 st member 31 is 2 sides perpendicular to the opposing side 1m, and the short side of the 2 nd member 32 is 2 sides perpendicular to the opposing side 2 m. However, although the 1 st member 31 and the 2 nd member 32 are referred to as long sides or short sides in a plan view for convenience, the long sides need not be longer than the short sides. That is, the short side may be longer than the long side, or the long side may be equal to the short side.
In the example of fig. 2, the 1 st part 31 and the 2 nd part 32 are configured such that the 1 st protection region 31a overlaps the 2 nd protection region 32 a. The patch capacitor 20 is disposed in an overlapping region 30a where the 1 st protection region 31a and the 2 nd protection region 32a overlap. The length of the facing side 1m of the 1 st member 31 is longer than the length of the side of the patch capacitor 20 facing the 1 st member 31 in plan view. Similarly, the length of the facing side 2m of the 2 nd member 32 is longer than the length of the side of the patch capacitor 20 facing the 2 nd member 32 in a plan view.
In addition, the mounting area of each of the 1 st component 31 and the 2 nd component 32 of embodiment 1 on the wiring substrate 11 is larger than the mounting area of the chip capacitor 20 on the wiring substrate 11. Here, the mounting area refers to an area actually in contact with the substrate. The chip capacitor 20, the 1 st component 31, and the 2 nd component 32 according to embodiment 1 are directly in contact with the wiring substrate 11 without interposing solder or the like between the components and the wiring substrate 11.
The board assembly 10 further includes a rectangular parallelepiped connector receiving portion 40 disposed on the wiring board 11. The patch capacitor 20, the 1 st part 31, and the 2 nd part 32 are arranged in the order of the 1 st part 31, the patch capacitor 20, and the 2 nd part 32 from near to far with respect to the connector receptacle 40. That is, the 1 st component 31, the chip capacitor 20, and the 2 nd component 32 are arranged in this order on the wiring board 11 as viewed from the connector receiving portion 40.
In the example of fig. 2, the patch capacitor 20 is disposed in a front region 40a sandwiched by straight lines along 2 short sides of the connector receiving portion 40 in a plan view. The 1 st member 31 and the 2 nd member 32 are arranged so as to entirely overlap the front region 40a in a plan view. Here, among the respective sides of the connector receiving portion 40 in a plan view, the side on the patch capacitor 20 side is defined as a long side, and the side perpendicular to the long side is defined as a short side. However, the long side and the short side are only expressed formally, and the relationship between the lengths is not limited.
In fig. 2, the 1 st member 31 is arranged such that the opposing side 1m is parallel to the long side of the connector receiving portion 40, and the 2 nd member 32 is arranged such that the opposing side 2m is parallel to the long side of the connector receiving portion 40. The 1 st member 31 and the 2 nd member 32 are arranged along a direction in which a center line Lo, which is a line segment connecting the center 4c of the connector receiving portion 40 and the center 2c of the patch capacitor 20, extends. In fig. 2, the distance from the 1 st member 31 to the patch capacitor 20 is equal to the distance from the 2 nd member 32 to the patch capacitor 20. The distance from the 1 st member 31 to the patch capacitor 20 may be different from the distance from the 2 nd member 32 to the patch capacitor 20. The same applies to the later-described drawings.
Since a connector (not shown) is inserted into and removed from the connector receiving portion 40, an upward or downward load is applied to a portion of the wiring substrate 11 where the connector receiving portion 40 is mounted. Therefore, the wiring board 11 is bent by inserting and removing the connector into and from the connector receiving portion 40. That is, deformation corresponding to the distance from the connector receiving portion 40 occurs around the connector receiving portion 40 in the wiring substrate 11.
Here, the amount of change per unit length when a load is applied to the object is defined as the amount of deformation ∈. When a length of a certain object before a load is applied to a portion thereof is denoted by L and a length of the object deformed by the load applied to the portion thereof is denoted by Δ L, a deformation amount ∈ of the object is expressed by a formula of "∈ Δ L/L". For example, when a rod of 1000[ mm ] is stretched left and right to become 1001[ mm ], the amount of deformation ε of the rod is 1000[ μ ST ] (1[ mm ]/1000[ mm ═ 0.001[ ST ]). Note that [ ST ] is an abbreviation for "strain", and is a symbol denoted by the amount of deformation ∈ for convenience. However, the larger the size of the wiring substrate 11, the larger the deformation when a load is applied, and the easier the mechanical stress is applied to each element mounted on the wiring substrate 11. Further, the heavier the weight of the wiring substrate 11, the more the deformation when a load is applied, and the more easily the mechanical stress is applied to each element mounted on the wiring substrate 11.
Fig. 3 is a graph illustrating a relationship between a distance from the connector receiving portion and a deformation amount of the wiring substrate in the case where the substrate assembly of fig. 2 does not have the 1 st member and the 2 nd member. As shown in fig. 3, as the distance from the connector receiving portion 40 increases, the amount of deformation ∈ of the wiring board 11 gradually increasesAnd (4) adding. And, a distance D is reached at a distance from the connector receiving portion 401In this case, the amount of deformation ∈ of the wiring substrate 11 on which the 1 st component 31 and the 2 nd component 32 are not mounted exceeds the threshold value. The threshold value is set to a value at which the chip capacitor 20 is likely to crack if the amount of deformation ∈ of the portion of the wiring board 11 where the chip capacitor 20 is mounted exceeds the threshold value. In FIG. 3, 1000[ μ ST ] is illustrated]As a threshold value.
The distance between the connector receiving portion 40 and the connector receiving portion is changed to a distance D1The deformation amount epsilon increases gradually in the interval till then, and approaches the distance D1The rate of increase in the deformation amount ε increases. At a distance D from the connector receiving portion 401To a distance DPThe deformation amount epsilon increases relatively slowly, and when the distance from the connector receiving part 40 becomes the distance DPWhen the deformation amount ε is large. At a distance D from the connector receiving portion 40PTo a distance D2The deformation amount epsilon decreases relatively slowly, and when the distance from the connector receiving part 40 reaches the distance D2When the deformation amount epsilon is lower than the threshold value. Further, the distance D is compared with the distance from the connector receiving portion 402Long, the amount of deformation epsilon decreases.
Fig. 4 is an explanatory view illustrating a region where the amount of deformation of the wiring substrate exceeds the threshold value when the 1 st component and the 2 nd component are not attached when the connector is inserted into and removed from the connector receiving portion, together with the substrate assembly of fig. 2. Fig. 5 is an explanatory view illustrating the wiring substrate and the patch capacitor of fig. 2. Fig. 6 is an explanatory view illustrating a state in which the wiring substrate of fig. 5 is flexed. Fig. 7 is a side view illustrating how the wiring board is bent when a downward load is applied to the connector receiving portion of fig. 2. In fig. 4, the distance D from fig. 3 will be1The corresponding line is taken as a dotted line L1Will be at a distance D from FIG. 32The corresponding line is taken as a dotted line L2Will be indicated by the dotted line L1And the dotted line L2The sandwiched region serves as a deformed region 40 d.
Here, as shown in fig. 5, the chip capacitor 20 as a multilayer ceramic capacitor includes a ceramic dielectric 21, an internal electrode 22, and an external electrode 23. As shown in fig. 6, when wiring board 11 is bent and the amount of deformation ∈ of the mounting portion of chip capacitor 20 exceeds a threshold value, crack Cr across ceramic dielectric 21 and internal electrode 22 is generated. The same applies to the case where wiring board 11 is bent as in the example of fig. 6. If the crack Cr is generated, the chip capacitor 20 may be broken due to, for example, conduction or disconnection of the internal electrode 22, and thus reliability of the substrate assembly 10 is lowered.
In this regard, in the substrate assembly 10 according to embodiment 1, as shown in fig. 2 and 4, the chip capacitor 20 is sandwiched between the 1 st member 31 and the 2 nd member 32. The patch capacitor 20 is disposed in the overlap region 30 a. That is, the mounting portion of the chip capacitor 20 is improved in rigidity by mounting the 1 st member 31, and is further improved in rigidity by mounting the 2 nd member 32. Therefore, as shown in fig. 7, even when a downward load is applied to the connector receiving portion 40 and the wiring board 11 is bent, the deformation amount ∈ of the mounting portion of the chip capacitor 20 can be suppressed to a threshold value or less by the protection region formed by the mounting of the 1 st member 31 and the 2 nd member 32. Therefore, generation of cracks in the patch capacitor 20 can be suppressed, and failure of the patch capacitor 20 can be avoided.
As the 1 st and 2 nd members 31 and 32, an ic (integrated circuit), a switch, a transformer, a heat sink, a relay, a terminal block, and the like are conceivable. The 1 st member 31 and the 2 nd member 32 may be connector receiving portions independent of the connector receiving portion 40. On the other hand, an axial lead type member or a radial lead type member which does not contact the wiring substrate 11 cannot be used as the 1 st member 31 and the 2 nd member 32.
Fig. 8 is a plan view showing a different configuration example of the substrate assembly of fig. 1 from that of fig. 2. In fig. 8, in order to facilitate understanding of the overlap region 30a, oblique lines indicating the 1 st protective region 31a and the 2 nd protective region 32a are also shown on the patch capacitor 20.
That is, fig. 2 illustrates a case where the patch capacitor 20 is disposed in the overlap region 30a, but the present invention is not limited thereto. The 1 st part 31 and the 2 nd part 32 may be arranged such that the 1 st protective region 31a overlaps the 2 nd protective region 32a to form a repeating region 30a, and the patch capacitor 20 may be arranged such that a part thereof overlaps the repeating region 30 a. In this case, as shown in fig. 8, a part of the overlapping region 30a may overlap the patch capacitor 20 in a plan view, or the entire overlapping region 30a may overlap the patch capacitor 20. Even with the above configuration, the increase in the amount of deformation ∈ at the mounting portion of the chip capacitor 20 can be suppressed by the protective region formed by the mounting of the 1 st member 31 and the 2 nd member 32, and therefore, it is possible to avoid a failure of the chip capacitor 20 due to the occurrence of a crack.
Fig. 9 is a plan view showing a different configuration example of the substrate assembly of fig. 1 from those of fig. 2 and 8. In fig. 2 and 8, the 1 st member 31 and the 2 nd member 32 are illustrated as having the same size, but the present invention is not limited thereto. As shown in fig. 9, the 1 st part 31 may be larger than the 2 nd part 32. In addition, the 2 nd member 32 may be larger than the 1 st member 31, contrary to fig. 9.
In fig. 2 and the like, the case where the entire 1 st member 31 overlaps the front surface area 40a is illustrated, but the present invention is not limited to this, and the 1 st member 31 may be disposed so that a part thereof overlaps the front surface area 40 a. Similarly, fig. 2 and the like illustrate a case where the entire 2 nd member 32 overlaps the front surface area 40a, but the present invention is not limited to this, and the 2 nd member 32 may be disposed so that a part thereof overlaps the front surface area 40 a. That is, the 1 st member 31 and the 2 nd member 32 may be arranged so that at least a part thereof overlaps the front surface region 40a in a plan view.
Fig. 10 is a plan view showing a different configuration example of the substrate assembly of fig. 1 from that of fig. 2, 8, and 9. As shown in fig. 10, both the 1 st member 31 and the 2 nd member 32 may be arranged so as not to be included in the front region 40a in a plan view. Here, a straight line drawn in parallel with the center line Lo from an end 4d of the connector receiving portion 40 on the opposite side of the chip capacitor 20, which is close to the short side of the chip capacitor 20 in a plan view, is taken as a straight line Ld. A straight line drawn in parallel with the center line Lo from the end 4e on the patch capacitor 20 side on the other short side of the connector receiving portion 40 in a plan view is defined as a straight line Le.
In this case, in a plan view, the 1 st member 31 and the 2 nd member 32 may be disposed in at least a part of the diagonal region 40t between the straight line Ld and the straight line Le. For example, if no component 1 and no component 2 31 and no component 32 are mounted on the wiring substrate 11, the mounting portion of the chip capacitor 20 is assumed to be located in the deformation region 40 d. Even in such a case, if at least a part of each of the 1 st member 31 and the 2 nd member 32 is arranged to overlap the oblique region 40t, an increase in the amount of deformation ∈ at the mounting portion of the chip capacitor 20 can be suppressed by the protective region formed by the mounting of the 1 st member 31 and the 2 nd member 32 when the wiring substrate 11 is flexed. Therefore, generation of cracks in the patch capacitor 20 can be suppressed, and failure of the patch capacitor 20 can be avoided. Fig. 10 shows an example in which the 1 st member 31 and the 2 nd member 32 are entirely included in the diagonal region 40 t.
As described above, in the substrate assembly 10 according to embodiment 1, at least a part of the chip capacitor 20 overlaps with the 1 st protective region 31a and the 2 nd protective region 32a, respectively, in a plan view. That is, the distances between the patch capacitor 20 and the 1 st and 2 nd members 31 and 32 become shorter. Therefore, even when a load is applied to a part of wiring board 11, the rigidity of the mounting portion of chip capacitor 20 on wiring board 11 can be improved. Therefore, since an increase in the amount of deformation ∈ at the mounting portion of the chip capacitor 20 on the wiring board 11 can be suppressed, it is possible to suppress a failure of the chip capacitor 20 due to the occurrence of a crack, and protect the chip capacitor 20.
Here, the 1 st part 31 and the 2 nd part 32 may be arranged so that the 1 st protection region 31a overlaps the 2 nd protection region 32 a. In this way, the 1 st protective region 31a and the 2 nd protective region 32a cooperate with each other to increase the rigidity of the mounting portion of the chip capacitor 20, and therefore, the occurrence of cracks in the chip capacitor 20 can be further suppressed. The patch capacitor 20 may be disposed in the overlapping region 30a, which is a region where the 1 st protective region 31a and the 2 nd protective region 32a overlap. In this way, since both the influence of the reinforcement by the 1 st member 31 and the influence of the reinforcement by the 2 nd member 32 act on the entire mounting portion of the chip capacitor 20, the chip capacitor 20 can be protected more reliably.
In addition, in a plan view, the length of the facing side 1m may be longer than the length of the side of the patch capacitor 20 facing the 1 st member 31 in the 1 st member 31, and the length of the facing side 2m may be longer than the length of the side of the patch capacitor 20 facing the 2 nd member 32 in the 2 nd member 32. In the case of the above configuration, since the protective regions of the 1 st member 31 and the 2 nd member 32 are wide, the protective region overlapping the mounting portion of the chip capacitor 20 can be increased. Therefore, since the degree of freedom of the arrangement of the patch capacitor 20 is increased, the arrangement of the patch capacitor 20, the 1 st member 31, and the 2 nd member 32 can be flexibly adjusted. In embodiment 1, only the facing side 1m of the 1 st member 31 may be longer than the side of the chip capacitor 20 facing the 1 st member 31, and the length of the facing side 2m of the 2 nd member 32 may be equal to or shorter than the length of the side of the chip capacitor 20 facing the 2 nd member 32.
In addition, the mounting area of each of the 1 st component 31 and the 2 nd component 32 to the wiring substrate 11 may be larger than the mounting area of the chip capacitor 20 to the wiring substrate 11. In this way, since the protection regions of the 1 st component 31 and the 2 nd component 32 are enlarged, the reliability of protection of the chip capacitor 20 can be improved, and the reliability of the substrate assembly 10 can be improved.
In addition, in a plan view, the patch capacitor 20 may be disposed in the front area 40a, and the 1 st member 31 and the 2 nd member 32 may be disposed so that at least a part thereof overlaps the front area 40 a. In addition, in a plan view, at least a part of each of the 1 st member 31 and the 2 nd member 32 may be disposed in an oblique region 40t sandwiched by a straight line Ld drawn from the end 4d to be parallel to the center line Lo and a straight line Le drawn from the end 4e to be parallel to the center line Lo. In this way, since the patch capacitor 20 and the 1 st and 2 nd components 31 and 32 are arranged along the center line Lo, the patch capacitor 20 can be stably protected.
However, the 1 st and 2 nd parts 31 and 32 may be configured such that the 1 st and 2 nd protection regions 31a and 32a do not overlap. Even in this case, since the 2 protection regions are connected via the patch capacitor 20, the rigidity of the mounting portion of the patch capacitor 20 can be improved.
< modification 1-1 >
Fig. 11 is a plan view showing an example of the configuration of the substrate assembly according to modification 1-1 of embodiment 1 of the present invention. The wiring board 11 of modification 1-1 is formed with a plurality of mounting holes 45 for fixing to the housing box 1 a. That is, the storage box 1a of modification 1 is formed with a fixing member (not shown) having a projection portion fitted into the mounting hole 45. The wiring substrate 11 is fixed to the housing box 1a by fitting the protruding portion into the mounting hole 45. In fig. 11, 1 mounting hole 45 is shown because a part of the wiring substrate 11 is illustrated.
When the protrusion of the fixing member is fitted into the mounting hole 45, an upward or downward load is applied to the position of the mounting hole 45 of the wiring substrate 11. Therefore, in the case of the substrate assembly 10 according to modification 1-1, the wiring substrate 11 is also bent during the mounting operation of the wiring substrate 11, and the wiring substrate 11 is deformed. When the fixing member is made of resin and has elasticity, the amount of deformation ∈ of the wiring board 11 particularly increases.
When the mounting hole 45 is formed in the corner portion of the wiring substrate 11 as shown in fig. 11, the deformed region 40d is formed in the wiring substrate 11 when the 1 st component 31 and the 2 nd component 32 are not mounted on the wiring substrate 11. In this regard, in the substrate assembly 10 of modification 1-1, the 1 st part 31 and the 2 nd part 32 are arranged on the wiring substrate 11 so as to sandwich the chip capacitor 20. Further, since the patch capacitor 20 is disposed so that at least a part thereof overlaps with the 1 st protective region 31a and the 2 nd protective region 32a in a plan view, the rigidity of the mounting portion of the patch capacitor 20 on the wiring substrate 11 can be improved. Therefore, when the projection of the fixing member is fitted into the mounting hole 45, even if a load is applied to the portion of the mounting hole 45, an increase in the amount of deformation ∈ of the mounting portion of the chip capacitor 20 on the wiring substrate 11 can be suppressed. Therefore, the patch capacitor 20 can be protected from failure of the patch capacitor 20 due to the occurrence of cracks.
< modification 1-2 >
Fig. 12 is a side view showing a configuration example of a substrate assembly according to modification 1-2 of embodiment 1 of the present invention. In the above description, the case where the chip capacitor 20, the 1 st component 31, and the 2 nd component 32 are mounted on the same surface of the wiring substrate 11 has been exemplified, but the present invention is not limited thereto. In the substrate assembly 10, as shown in fig. 12, the chip capacitor 20 and the 1 st and 2 nd components 31 and 32 may be mounted on different surfaces of the wiring substrate 11. Further, in the substrate assembly 10, the chip capacitor 20 and the 1 st component 31 and the 2 nd component 32 may be mounted on different surfaces of the wiring substrate 11, or the 1 st component 31, the chip capacitor 20 and the 2 nd component 32 may be mounted on different surfaces of the wiring substrate 11. In this case, as in the case of fig. 2 and the like, a protective region is formed under and around the 1 st member 31 and the 2 nd member 32. Therefore, even when a load is applied to a part of wiring board 11, an increase in the amount of deformation ∈ at the mounting portion of chip capacitor 20 can be suppressed, and therefore, a failure of chip capacitor 20 due to the occurrence of a crack can be suppressed.
In the above-described drawings, the 1 st protection region 31a and the 2 nd protection region 32a overlap each other, but the present invention is not limited thereto. The 1 st and 2 nd members 31 and 32 may be arranged so that the 1 st and 2 nd protection regions 31a and 32a do not overlap. Even in this case, since the 2 protection regions are connected via the patch capacitor 20, the rigidity of the mounting portion of the patch capacitor 20 can be improved. Therefore, the occurrence of cracks can suppress the failure of the patch capacitor 20.
Embodiment 2.
Fig. 13 is a plan view showing an example of the configuration of a substrate assembly included in an air-conditioning apparatus according to embodiment 2 of the present invention. The configuration of the air-conditioning apparatus according to embodiment 2 is the same as that of fig. 1 illustrated in embodiment 1 described above. The same reference numerals are used for the components equivalent to those in embodiment 1, and the description thereof is omitted.
The components of the substrate assembly 110 according to embodiment 2 are the same as those of the substrate assembly 10 according to embodiment 1. However, the substrate assembly 110 differs from the substrate assembly 10 in the arrangement of the patch capacitor 20, the 1 st component 31, and the 2 nd component 32 with respect to the force point portion that applies a load to the wiring substrate 11.
In the case of the substrate assembly 110 illustrated in fig. 13, the 1 st member 31 and the 2 nd member 32 are arranged such that the long side, which is the side facing the patch capacitor 20 in a plan view, is along the center line Lo connecting the center 4c of the connector receptacle 40 and the center 2c of the patch capacitor 20. That is, the 1 st part 31 is disposed such that the opposing sides 1m are parallel to the center line Lo, and the 2 nd part 32 is disposed such that the opposing sides 2m are parallel to the center line Lo.
However, the substrate assembly 110 is not limited to the side around the wiring substrate 11 being perpendicular or parallel to the center line Lo in a plan view. Therefore, the 1 st member 31 and the 2 nd member 32 may be arranged such that the long sides thereof are perpendicular to the long sides of the connector receiving portion 40 in a plan view. As described above, the long side of the connector receptacle 40 is the side of the connector receptacle 40 on the patch capacitor 20 side in plan view.
Fig. 13 illustrates a deformed region 40d formed by inserting and removing the connector into and from the connector receiving portion 40 when the 1 st component 31 and the 2 nd component 32 are not mounted on the wiring substrate 11. That is, in the case of the wiring board 11 to which the 1 st component 31 and the 2 nd component 32 are not mounted, the connector is largely bent by insertion and removal of the connector into and from the connector receiving portion 40.
In this regard, the substrate assembly 110 is arranged with the 1 st part 31 and the 2 nd part 32 on the wiring substrate 11 with the chip capacitor 20 interposed therebetween. The patch capacitor 20 is arranged so that at least a part thereof overlaps with the 1 st protective region 31a and the 2 nd protective region 32a, respectively, in a plan view. Therefore, even when the connector is inserted into and removed from the connector receiving portion 40, the rigidity around the chip capacitor 20 can be increased, and therefore, an increase in the amount of deformation ∈ at the mounting portion of the chip capacitor 20 can be suppressed. Therefore, the occurrence of cracks can be suppressed, and the chip capacitor 20 can be protected from failure of the chip capacitor 20.
In fig. 13, the case where the patch capacitor 20 is disposed in the overlapping region 30a where the 1 st protection region 31a and the 2 nd protection region 32a overlap is illustrated, but the present invention is not limited to this, as in the case of embodiment 1. For example, the patch capacitor 20 may be configured to partially overlap the repetition area 30 a. Even with this configuration, the increase in the amount of deformation ∈ at the mounting portion of the chip capacitor 20 can be suppressed by the protective region formed by the mounting of the 1 st member 31 and the 2 nd member 32, and therefore, the occurrence of cracks can be suppressed from causing a failure of the chip capacitor 20. In addition, the 1 st part 31 and the 2 nd part 32 may be configured such that the 1 st protection region 31a and the 2 nd protection region 32a do not overlap. Even in this case, since the 2 protection regions are connected via the patch capacitor 20, the rigidity of the mounting portion of the patch capacitor 20 can be improved.
In addition, when the respective components are arranged as in the substrate assembly 110, the protective regions around the lower portions and the short sides of the 1 st and 2 nd members 31 and 32 become large restraining forces against the deflection of the wiring board 11 due to the load applied to the connector receiving portion 40. Here, each short side of the 1 st member 31 is 2 sides perpendicular to the facing side 1m in a plan view, and each short side of the 2 nd member 32 is 2 sides perpendicular to the facing side 2m in a plan view. That is, when a load is applied to the connector receiving portion 40, the amount of deformation ∈ of the wiring substrate 11 can be reduced outside the short side on the connector receiving portion 40 side of the 1 st member 31 and the 2 nd member 32, and an increase in the amount of deformation ∈ of the wiring substrate 11 in the region sandwiched between the 1 st member 31 and the 2 nd member 32 can be prevented. Therefore, in the case of the substrate assembly 110 according to embodiment 2, even if the chip capacitor 20 does not overlap at least a part of the 1 st member 31 and the 2 nd member 32, if it is disposed in the vicinity of the outer peripheries of the 1 st protective region 31a and the 2 nd protective region 32a, the amount of deformation ∈ at the mounting portion of the chip capacitor 20 can be suppressed to a threshold value or less.
Fig. 14 is a plan view showing a configuration example of the substrate assembly according to embodiment 2 of the present invention, which is different from that of fig. 13. Fig. 15 is a side view illustrating a state in which a downward load is applied to the connector receiving portion of fig. 14 and the wiring board is deflected. Fig. 16 is an explanatory view showing a state in which the wiring board of fig. 14 is bent downward about the 1 st component, the chip capacitor, and the 2 nd component. Fig. 17 is an explanatory view showing a state in which the wiring board of fig. 14 is bent upward about the 1 st component, the chip capacitor, and the 2 nd component. The advantages of the structure of the substrate assembly 110 according to embodiment 2 will be described in more detail with reference to fig. 14 to 17.
In fig. 14, the case where the 1 st member 31 is larger than the 2 nd member 32 is exemplified. More specifically, in the example of fig. 14, the opposing side 1m of the 1 st member 31 is longer than the opposing side 2m of the 2 nd member 32, and the mounting area of the 1 st member 31 is larger than that of the 2 nd member 32. In addition, the 1 st member 31 has the facing side 1m longer than the side of the chip capacitor 20 facing the 1 st member 31, and the 2 nd member 32 has the facing side 2m longer than the side of the chip capacitor 20 facing the 2 nd member 32.
Here, as shown in fig. 15, a case is assumed where a downward load is applied to the connector receiving portion 40 and the wiring substrate 11 is deflected. In this case, even if a load is applied to the connector receiving portion 40, the protective regions around the lower portions and the short sides of the 1 st member 31 and the 2 nd member 32 suppress an increase in the amount of deformation ∈ of the mounting portion of the chip capacitor 20 on the wiring substrate 11. That is, as shown in fig. 15, even when a downward load is applied to the connector receiving portion 40, the wiring board 11 can maintain the portion where the 1 st component 31 and the 2 nd component 32 are attached to be horizontal, and form a region in which the deformation amount ∈ is relatively large outside the short side of the 1 st component 31 and the 2 nd component 32 on the connector receiving portion 40 side. The same applies to the case where an upward load is applied to the connector receptacle 40.
That is, even in the case where the wiring substrate 11 is bent downward around the 1 st member 31, the chip capacitor 20, and the 2 nd member 32 as shown in fig. 16, the rigidity of the portion of the wiring substrate 11 sandwiched between the 1 st member 31 and the 2 nd member 32 is improved. Therefore, the mounting portion of the chip capacitor 20 can be kept horizontal, and the chip capacitor 20 can be protected. Further, even in the case where wiring board 11 is bent upward around first member 31, chip capacitor 20, and second member 32 as shown in fig. 17, the rigidity of the portion of wiring board 11 sandwiched between first member 31 and second member 32 is improved. Therefore, the mounting portion of the chip capacitor 20 can be kept horizontal, and the chip capacitor 20 can be protected.
However, fig. 13 and 14 illustrate a case where a part of each of the 1 st member 31 and the 2 nd member 32 overlaps the front surface region 40a, but the present invention is not limited thereto. The 1 st member 31 and the 2 nd member 32 may entirely overlap the front surface region 40 a.
Fig. 18 is a plan view showing a different configuration example from those of fig. 13 and 14 of the substrate assembly according to embodiment 2 of the present invention. That is, the 1 st member 31 and the 2 nd member 32 may not overlap with the front surface region 40a in a plan view.
In this case, the 1 st member 31 and the 2 nd member 32 may be each disposed at least partially in the oblique region 40t between the straight line Ld and the straight line Le in a plan view. Here, a case is assumed where the mounting portion of the chip capacitor 20 on the wiring substrate 11 is located in the deformation region 40d when the 1 st component 31 and the 2 nd component 32 are not mounted. In such an assumption, if at least a part of each of the 1 st member 31 and the 2 nd member 32 is disposed so as to overlap the oblique region 40t, an increase in the amount of deformation ∈ of the mounting portion of the chip capacitor 20 can be suppressed by the protective region formed by the mounting of the 1 st member 31 and the 2 nd member 32 even when the wiring substrate 11 is flexed. Therefore, the occurrence of cracks in the patch capacitor 20 can be suppressed, and failure of the patch capacitor 20 can be avoided. However, the 1 st member 31 and the 2 nd member 32 may be entirely included in the diagonal region 40 t. Other structures and alternative structures are the same as those of the substrate assembly 10 of embodiment 1.
As described above, in the substrate assembly 110 according to embodiment 2, at least a part of the chip capacitor 20 overlaps the 1 st protective region 31a and the 2 nd protective region 32a, respectively, in a plan view. That is, the distances between the patch capacitor 20 and the 1 st and 2 nd members 31 and 32 become shorter. Therefore, even when a load is applied to a part of wiring board 11, the rigidity of the mounting portion of chip capacitor 20 on wiring board 11 can be improved. Therefore, since an increase in the amount of deformation ∈ at the mounting portion of the chip capacitor 20 on the wiring board 11 can be suppressed, it is possible to suppress a failure of the chip capacitor 20 due to the occurrence of a crack, and to protect the chip capacitor 20.
In the substrate assembly 110, the 1 st member 31 and the 2 nd member 32 are arranged such that the long sides thereof are perpendicular to the long sides of the connector receptacle 40 in a plan view. That is, as shown in fig. 13, 14, and 18, the facing side 1m of the 1 st member 31 and the facing side 2m of the 2 nd member 32 are perpendicular to the long side of the connector receiving portion 40. Therefore, the protective regions around the lower portions and the short sides of the 1 st member 31 and the 2 nd member 32 provide a large restraining force against the bending of the wiring substrate 11 due to the load applied to the connector receiving portion 40. Therefore, when a load is applied to the connector receiving portion 40, the amount of deformation ∈ of the wiring board 11 can be reduced outside the shorter side of the 1 st member 31 and the 2 nd member 32 on the connector receiving portion 40 side. Further, the increase in the amount of deformation ∈ at the mounting portion of the chip capacitor 20 can be suppressed by the protective region formed in the lower portions of the 1 st member 31 and the 2 nd member 32 and the region sandwiched between the 1 st member 31 and the 2 nd member 32. Therefore, according to the substrate assembly 110, the occurrence of cracks in the chip capacitor 20 can be further suppressed, and thus, the failure of the chip capacitor 20 due to the occurrence of cracks can be more reliably suppressed.
Further, as shown in fig. 13, the 1 st member 31 and the 2 nd member 32 may be arranged so that the edges facing the patch capacitor 20 in a plan view are straight lines connecting the center 4c of the connector receiving portion 40 and the center 2c of the patch capacitor 20. The straight line connecting the center 4c and the center 2c is a straight line extending the center line Lo. In this way, since the rigidity of the mounting portion of the chip capacitor 20 can be increased in a balanced manner by the 1 st member 31 and the 2 nd member 32, stable protection of the chip capacitor 20 can be achieved.
In addition, the patch capacitor 20 may be disposed in the front region 40a in a plan view, and the 1 st member 31 and the 2 nd member 32 may be disposed so as to overlap at least a portion of the front region 40 a. In addition, at least a part of each of the 1 st member 31 and the 2 nd member 32 may be disposed in the oblique region 40t in a plan view. In this way, since the 1 st member 31 and the 2 nd member 32 can be arranged in a balanced manner in the deformed region 40d which is formed if the 1 st member 31 and the 2 nd member 32 are not mounted, the patch capacitor 20 can be protected more stably.
Other effects are similar to those of embodiment 1. The configuration of modification 1-2 and its alternative configuration can be applied to the substrate assembly 110, and similar effects can be obtained.
< modification 2-1 >
Fig. 19 is a plan view showing an example of the configuration of the substrate assembly according to modification 2-1 of embodiment 2 of the present invention. As in modification 1-1 described above, a plurality of mounting holes 45 are formed in wiring board 11 of modification 2-1. That is, in the case of the board assembly 110 according to modification 2-1, an upward or downward load is applied to the position of the mounting hole 45 during the mounting operation of the wiring board 11.
In this regard, in the substrate assembly 110 of modification 2-1, the 1 st part 31 and the 2 nd part 32 are arranged on the wiring substrate 11 so as to sandwich the chip capacitor 20. The patch capacitor 20 is arranged so that at least a part thereof overlaps with the 1 st protective region 31a and the 2 nd protective region 32a, respectively, in a plan view. Therefore, even when a load is applied to the position of mounting hole 45, the rigidity of the mounting portion of chip capacitor 20 on wiring board 11 can be improved. Therefore, since an increase in the amount of deformation ∈ at the mounting portion of the chip capacitor 20 on the wiring board 11 can be suppressed, it is possible to suppress a failure of the chip capacitor 20 due to the occurrence of a crack, and to protect the chip capacitor 20.
The above-described embodiments are preferred specific examples of the substrate assembly and the air-conditioning apparatus, and the technical scope of the present invention is not limited to these embodiments. For example, in the above description, the shapes of the patch capacitor 20, the 1 st member 31, the 2 nd member 32, and the connector receiving portion 40 are rectangular parallelepiped, but the rectangular parallelepiped shape also includes a square. Moreover, the respective side surfaces of the patch capacitor 20, the 1 st member 31, the 2 nd member 32, and the connector receiving portion 40 do not have to be flat, and a small amount of unevenness may be present.
In addition, a plurality of patch capacitors 20 may be mounted on the substrate assemblies 10 and 110, and in this case, all the patch capacitors 20 may be disposed so as to be sandwiched between the 1 st member 31 and the 2 nd member 32. In addition, in the above embodiments, the example in which the patch capacitor 20 is sandwiched by 2 members is shown, but the present invention is not limited to this, and the patch capacitor 20 may be surrounded by 3 or more members.
In the above embodiments, the case where the flow path of the refrigerant in the refrigerant circuit 50 is switched by the four-way valve 52 has been exemplified, but the present invention is not limited to this, and a configuration in which a two-way valve and a three-way valve are combined may be used instead of the four-way valve 52. However, the air-conditioning apparatus 100 may be configured to exclusively perform the cooling operation or the heating operation without providing a flow path switching mechanism such as the four-way valve 52 to form the refrigerant circuit 50.
Description of reference numerals:
1 … control unit; 1a … storage box; 1m, 2m … opposite sides; 2c, 4c … center; 4d, 4e … end; 10. 110 … substrate assembly; 11 … wiring substrate; 20 … patch capacitors; 21 … ceramic dielectric; 22 … internal electrodes; 23 … outer electrodes; 30a … repeat region; 31 … part 1; 31a … protection area 1; 31b, 32b … protection zones; 32 … part 2; 32a … protection area 2; a 40 … connector receiving portion; 40a … front area; 40d … deformation region; 40t … diagonal area; 45 … mounting holes; a 50 … refrigerant circuit; 51 … compressor; 52 … four-way valve; 53 … load side heat exchanger; 54 … expansion valve; 55 … heat source side heat exchanger; 63 … load side fan; 65 … heat source side fan; 100 … air conditioning device; cr … cracks; lo … centerline; r … refrigerant piping; epsilon … deformation.

Claims (12)

1. A board assembly for supplying electric power to a device constituting an air-conditioning apparatus, the board assembly comprising:
a wiring substrate;
a rectangular parallelepiped patch capacitor disposed on the wiring board; and
a rectangular parallelepiped 1 st member and a rectangular parallelepiped 2 nd member arranged on the wiring substrate so as to sandwich the chip capacitor,
the patch capacitor is configured to overlap at least a part of the No. 1 protection region and the No. 2 protection region respectively when viewed from above,
the 1 st protective region is a semicircular region on the patch capacitor side where a side of the 1 st member facing the patch capacitor is a diameter, and the 2 nd protective region is a semicircular region on the patch capacitor side where a side of the 2 nd member facing the patch capacitor is a diameter.
2. The substrate assembly of claim 1,
the 1 st and 2 nd components are configured such that the 1 st protection zone overlaps the 2 nd protection zone.
3. The substrate assembly of claim 2,
the patch capacitor is arranged in a region where the 1 st protection region overlaps the 2 nd protection region.
4. The substrate assembly according to any one of claims 1 to 3,
the length of the side of the 1 st component facing the patch capacitor in a plan view is longer than the length of the side of the patch capacitor facing the 1 st component,
the length of the side of the 2 nd component facing the patch capacitor in a plan view is longer than the length of the side of the patch capacitor facing the 2 nd component.
5. The substrate assembly of claim 4,
the mounting area of each of the 1 st component and the 2 nd component to the wiring board is larger than the mounting area of the chip capacitor to the wiring board.
6. The substrate assembly according to any one of claims 1 to 5,
the 1 st component and the 2 nd component are mounted on a different surface of the wiring board from the patch capacitor.
7. The substrate assembly according to any one of claims 1 to 6,
further comprises a rectangular parallelepiped connector receiving part disposed on the wiring board,
the patch capacitor is arranged in a front area sandwiched by straight lines along 2 short sides of the connector receiving portion in a plan view,
the 1 st member and the 2 nd member are each configured such that at least a part thereof overlaps with the front surface region in a plan view.
8. The substrate assembly according to any one of claims 1 to 6,
further comprises a rectangular parallelepiped connector receiving part disposed on the wiring board,
wherein the 1 st member and the 2 nd member are each disposed in an oblique region in a plan view, at least a part of each of the members being disposed on a straight line connecting a center of the connector receiving portion and a center of the patch capacitor in a plan view as a center line,
the oblique region is a region sandwiched between a straight line drawn from an end of the short side of the connector receptacle on the side opposite to the patch capacitor and parallel to the center line, and a straight line drawn from an end of the other short side of the connector receptacle on the side of the patch capacitor and parallel to the center line.
9. The substrate assembly according to claim 7 or 8,
the patch capacitor, the 1 st component, and the 2 nd component are configured to be in the order of the 1 st component, the patch capacitor, and the 2 nd component from proximal to distal with respect to the connector receptacle.
10. The substrate assembly according to claim 7 or 8,
the 1 st member and the 2 nd member are arranged such that long sides thereof are perpendicular to long sides of the connector receiving portion in a plan view.
11. The substrate assembly of any one of claims 7, 8, 10,
the 1 st member and the 2 nd member are arranged such that, in a plan view, respective sides facing the patch capacitor are along a straight line connecting a center of the connector receiving portion and a center of the patch capacitor.
12. An air-conditioning apparatus is characterized by comprising:
the substrate assembly of any one of claims 1 to 11; and
a refrigerant circuit formed by connecting the compressor, the load-side heat exchanger, the expansion valve, and the heat-source-side heat exchanger by refrigerant pipes.
CN201980070359.7A 2019-01-28 2019-01-28 Substrate assembly and air conditioner Active CN113303033B (en)

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