CN113299832A - Transient field effect transistor based on carbon nano tube, preparation method and integrated device - Google Patents

Transient field effect transistor based on carbon nano tube, preparation method and integrated device Download PDF

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CN113299832A
CN113299832A CN202110549606.0A CN202110549606A CN113299832A CN 113299832 A CN113299832 A CN 113299832A CN 202110549606 A CN202110549606 A CN 202110549606A CN 113299832 A CN113299832 A CN 113299832A
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field effect
effect transistor
metal
substrate
channel region
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CN113299832B (en
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胡又凡
夏梵
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Peking University
Qiantang Science and Technology Innovation Center
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Peking University
Qiantang Science and Technology Innovation Center
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/20Carbon compounds, e.g. carbon nanotubes or fullerenes
    • H10K85/221Carbon nanotubes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/40Organic transistors
    • H10K10/46Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462Insulated gate field-effect transistors [IGFETs]
    • H10K10/484Insulated gate field-effect transistors [IGFETs] characterised by the channel regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H10K19/10Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00 comprising field-effect transistors

Abstract

The present disclosure provides a carbon nanotube-based transient field effect transistor, comprising: a substrate formed of an environmentally degradable material; the channel material of the channel region is a carbon nano tube; the gate dielectric layer is made of metal oxide; the gate electrode is made of aluminum; and source and drain electrodes formed of a stacked metal. The disclosure also provides a preparation method of the transient field effect transistor based on the carbon nano tube and an integrated device.

Description

Transient field effect transistor based on carbon nano tube, preparation method and integrated device
Technical Field
The disclosure provides a transient field effect transistor based on a carbon nano tube, a preparation method and an integrated device.
Background
Complementary metal-oxide-semiconductor field effect transistors (CMOS FETs) are the mainstream technology for electronic chips today. Carbon nanotubes are suitable as channel materials for next-generation electronic devices due to their excellent electrical characteristics. CMOS technology requires the simultaneous fabrication of N-type and P-type field effect transistors with symmetric performance curves. Especially, in the prior art, the preparation of the N-type field effect transistor based on the carbon nanotube still faces the problems of air stability, process complexity, performance incompatibility and the like.
Transient electronic devices can operate stably for a period of time in a certain operating environment and accomplish specific target tasks. After the task is completed, the material can be degraded in the environment without unnecessary trouble caused by recovering devices or divulging a secret. Currently, this technology has been applied to biodegradable devices, environmental monitoring devices, consumer electronics devices, and hardware-level encryption devices. Due to the self-degradation characteristic of the transient electronic device, special materials are required to be adopted for preparation, and the transient electronic device comprises degradable metals, degradable polymers and degradable oxides. These materials are not compatible with conventional micro-nano fabrication processes, and new techniques need to be developed to fabricate transient electronic devices. Although the construction of transient electronic devices using carbon nanotubes has been a preliminary progress, due to the limitations of transient materials and incompatibility of processes, the transient field effect transistors based on carbon nanotubes are still blank, and how to successfully manufacture the field effect transistors based on carbon nanotubes is still a problem to be solved, especially for the transient N-type field effect transistors based on carbon nanotubes.
Disclosure of Invention
In order to solve one of the above technical problems, the present disclosure provides a transient field effect transistor based on a carbon nanotube, a method for manufacturing the same, and an integrated device.
According to one aspect of the present disclosure, a carbon nanotube based transient field effect transistor includes:
a substrate formed of an environmentally degradable material;
the channel material of the channel region is a carbon nano tube;
the gate dielectric layer is made of metal oxide;
the gate electrode is made of aluminum; and
a source electrode and a drain electrode formed of a stacked metal,
when the field effect transistor is a P-type field effect transistor, the laminated metal is a laminated metal formed by high work function metal and aluminum; when the field effect transistor is an N-type field effect transistor prepared by an electrostatic doping method, the laminated metal is a laminated metal formed by high-work-function metal and aluminum; when the field effect transistor is an N-type field effect transistor prepared by an undoped method, the laminated metal is a laminated metal formed by low-work-function metal and aluminum, wherein in the laminated metal, the thickness of the aluminum is far greater than that of the high-work-function metal/low-work-function metal.
According to at least one embodiment of the present disclosure, the high work function metal is at least one of palladium, gold, and platinum, preferably palladium; the low work function metal is at least one of scandium, yttrium, erbium and lanthanum, and scandium is preferable.
According to at least one embodiment of the present disclosure, the metal oxide is at least one of aluminum oxide, hafnium oxide, and zirconium oxide, preferably aluminum oxide.
According to at least one embodiment of the present disclosure, when the field effect transistor is a P-type field effect transistor or an N-type field effect transistor prepared by an undoped method, the structure of the field effect transistor is a local bottom gate structure or a top gate structure;
in the local bottom gate structure, the gate dielectric layer and the gate electrode are located on one side of the channel region facing the substrate, and the source electrode and the drain electrode are respectively located on two sides of the channel region.
According to at least one embodiment of the present disclosure, when the field effect transistor is an N-type field effect transistor manufactured by an electrostatic doping method, the structure of the field effect transistor is a local bottom gate structure, in the local bottom gate structure, the gate dielectric layer and the gate electrode are located on one side of the channel region facing the substrate, and the source electrode and the drain electrode are respectively located on two sides of the channel region.
According to at least one embodiment of the present disclosure, the N-type field effect transistor manufactured by the electrostatic doping method further includes an electrostatic doping layer located on a side of the channel region away from the substrate.
According to at least one embodiment of the present disclosure, the electrostatically doped layer is in the form of a thin layer of metal and metal oxide in the form of a stack.
According to at least one embodiment of the present disclosure, the thin layer metal is at least one of aluminum, gold, titanium, silver, and platinum, preferably aluminum, and the metal oxide is at least one of aluminum oxide, hafnium oxide, and zirconium oxide, preferably aluminum oxide.
According to another aspect of the present disclosure, a method for preparing a transient field effect transistor based on a carbon nanotube includes:
providing a substrate, the substrate being formed of an environmentally degradable material;
forming a channel region with a carbon nanotube as a channel material on the substrate;
forming a gate dielectric layer made of metal oxide on the channel region;
forming a top gate electrode made of aluminum on the gate dielectric layer; and
and forming a source electrode and a drain electrode in the form of stacked metal on both sides of the channel region.
According to still another aspect of the present disclosure, a method for manufacturing a transient field effect transistor based on a carbon nanotube includes:
providing a substrate, the substrate being formed of an environmentally degradable material;
forming a bottom gate electrode made of aluminum on the substrate;
forming a gate dielectric layer made of metal oxide on the bottom gate electrode;
forming a channel region which takes the carbon nano tube as a channel material on the gate dielectric layer; and
and forming a source electrode and a drain electrode in the form of stacked metal on both sides of the channel region.
According to at least one embodiment of the present disclosure, when the field effect transistor is a P-type field effect transistor, the stacked metal is a stacked metal formed by a high work function metal and aluminum, when the field effect transistor is an N-type field effect transistor prepared by an undoped method, the stacked metal is a stacked metal formed by a low work function metal and aluminum, and a thickness of the aluminum is much greater than a thickness of the high work function metal/low work function metal.
According to at least one embodiment of the present disclosure, when the field effect transistor is an N-type field effect transistor manufactured by an electrostatic doping method, the stacked metal is a stacked metal formed by a high work function metal and aluminum, and a thickness of the aluminum is much greater than a thickness of the high work function metal.
According to at least one embodiment of the present disclosure, further comprising: and forming an electrostatic doping layer on the channel region, wherein the electrostatic doping layer is in the form of a thin metal layer and a metal oxide layer in a laminated form.
According to at least one embodiment of the present disclosure, the forming of the electrostatically doped layer comprises: a thin layer of metal is vapor deposited on the channel layer and a metal oxide is grown by atomic layer deposition over the thin layer of metal.
According to yet another aspect of the disclosure, an integrated device comprises a transient field effect transistor as described in any of the above.
Drawings
The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the disclosure and together with the description serve to explain the principles of the disclosure.
Fig. 1 shows a schematic diagram of a carbon nanotube based transient field effect transistor according to one embodiment of the present disclosure.
Fig. 2 shows a flow diagram of a method of fabricating a carbon nanotube based transient field effect transistor according to one embodiment of the present disclosure.
Fig. 3 shows a schematic diagram of a carbon nanotube based transient field effect transistor according to one embodiment of the present disclosure.
Fig. 4 shows a flow chart of a method of fabricating a carbon nanotube based transient field effect transistor according to one embodiment of the present disclosure.
Fig. 5 shows a schematic diagram of a carbon nanotube based transient field effect transistor according to one embodiment of the present disclosure.
Fig. 6 shows a flow chart of a method of fabricating a carbon nanotube based transient field effect transistor according to one embodiment of the present disclosure.
Fig. 7 shows a schematic diagram of a carbon nanotube based transient field effect transistor according to one embodiment of the present disclosure.
Fig. 8 shows a flow chart of a method of fabricating a carbon nanotube based transient field effect transistor according to one embodiment of the present disclosure.
Fig. 9 shows a schematic diagram of a carbon nanotube based transient field effect transistor according to one embodiment of the present disclosure.
Fig. 10 shows a flow chart of a method of fabricating a carbon nanotube based transient field effect transistor according to one embodiment of the present disclosure.
Detailed Description
The present disclosure will be described in further detail with reference to the drawings and embodiments. It is to be understood that the specific embodiments described herein are for purposes of illustration only and are not to be construed as limitations of the present disclosure. It should be further noted that, for the convenience of description, only the portions relevant to the present disclosure are shown in the drawings.
It should be noted that the embodiments and features of the embodiments in the present disclosure may be combined with each other without conflict. Technical solutions of the present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.
Unless otherwise indicated, the illustrated exemplary embodiments/examples are to be understood as providing exemplary features of various details of some ways in which the technical concepts of the present disclosure may be practiced. Accordingly, unless otherwise indicated, features of the various embodiments may be additionally combined, separated, interchanged, and/or rearranged without departing from the technical concept of the present disclosure.
The use of cross-hatching and/or shading in the drawings is generally used to clarify the boundaries between adjacent components. As such, unless otherwise noted, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, proportion, commonality between the illustrated components and/or any other characteristic, attribute, property, etc., of a component. Further, in the drawings, the size and relative sizes of components may be exaggerated for clarity and/or descriptive purposes. While example embodiments may be practiced differently, the specific process sequence may be performed in a different order than that described. For example, two processes described consecutively may be performed substantially simultaneously or in reverse order to that described. In addition, like reference numerals denote like parts.
When an element is referred to as being "on" or "on," "connected to" or "coupled to" another element, it can be directly on, connected or coupled to the other element or intervening elements may be present. However, when an element is referred to as being "directly on," "directly connected to" or "directly coupled to" another element, there are no intervening elements present. For purposes of this disclosure, the term "connected" may refer to physically, electrically, etc., and may or may not have intermediate components.
For descriptive purposes, the present disclosure may use spatially relative terms such as "below … …," below … …, "" below … …, "" below, "" above … …, "" above, "" … …, "" higher, "and" side (e.g., as in "side wall") to describe one component's relationship to another (other) component as illustrated in the figures. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and/or manufacture in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below … …" can encompass both an orientation of "above" and "below". Further, the devices may be otherwise positioned (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, when the terms "comprises" and/or "comprising" and variations thereof are used in this specification, the presence of stated features, integers, steps, operations, elements, components and/or groups thereof are stated but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and/or groups thereof. It is also noted that, as used herein, the terms "substantially," "about," and other similar terms are used as approximate terms and not as degree terms, and as such, are used to interpret inherent deviations in measured values, calculated values, and/or provided values that would be recognized by one of ordinary skill in the art.
According to one embodiment of the present disclosure, a carbon nanotube based transient field effect transistor is provided. The transient field effect transistor is automatically degraded in the environment after completing a specific function, so that the difficulty caused by treating and recycling electronic wastes and the environmental pollution caused by improper treatment are avoided.
A transient field effect transistor according to the present disclosure may include a substrate, a channel region, a gate dielectric layer, a gate electrode, a source electrode, and a drain electrode.
The substrate may be formed of an environmentally degradable material, e.g., the substrate may be an environmentally degradable flexible substrate, such as a water soluble substrate or the like.
The channel material of the channel region may be a carbon nanotube network film.
The material of the gate dielectric layer may be a metal oxide, and the metal oxide may be at least one of aluminum oxide, hafnium oxide and zirconium oxide, and is preferably aluminum oxide.
The material of the gate electrode may be selected from aluminum.
The source electrode and the drain electrode are formed of a stacked metal. Examples of P-type field effect transistors and N-type field effect transistors will be provided in this disclosure. When the field effect transistor is a P-type field effect transistor, the laminated metal is a laminated metal formed by high work function metal and aluminum; when the field effect transistor is an N-type field effect transistor prepared by an electrostatic doping method, the laminated metal is the laminated metal formed by high work function metal and aluminum; when the field effect transistor is an N-type field effect transistor prepared by an undoped method, the laminated metal is a laminated metal formed by low work function metal and aluminum.
The high work function metal is at least one of palladium, gold and platinum, and palladium is preferred; the low work function metal is at least one of scandium, yttrium, erbium and lanthanum, preferably scandium.
In the stack metal, the thickness of aluminum is much greater than the thickness of the high work function/low work function metal. Therefore, the source electrode and the drain electrode can be well ensured to be in good contact with the carbon nano tube in the channel region, the performance of the device is ensured, and the transient characteristic of the device is not influenced.
When the field effect transistor is a P-type field effect transistor or an N-type field effect transistor prepared by an undoped method, the structure of the field effect transistor is a local bottom gate structure or a top gate structure; in the local bottom gate structure, the gate dielectric layer and the gate electrode are positioned on one side of the channel region facing the substrate, and the source electrode and the drain electrode are respectively positioned on two sides of the channel region.
When the field effect transistor is an N-type field effect transistor prepared by an electrostatic doping method, the structure of the field effect transistor is a local bottom gate structure, in the local bottom gate structure, a gate dielectric layer and a gate electrode are positioned on one side of a channel region facing a substrate, and a source electrode and a drain electrode are respectively positioned on two sides of the channel region. The N-type field effect transistor prepared by the electrostatic doping method further comprises an electrostatic doping layer, and the electrostatic doping layer is located on one side of the channel region far away from the substrate. The electrostatically doped layer is in the form of a thin layer of metal and metal oxide in a stack. The thin layer metal is at least one of aluminum, gold, titanium, silver and platinum, preferably aluminum, and the metal oxide is at least one of aluminum oxide, hafnium oxide and zirconium oxide, preferably aluminum oxide.
The technical solution of the present disclosure will be explained in detail below for different types of field effect transistors.
According to a first embodiment of the present disclosure, a carbon nanotube based P-type transient field effect transistor is provided, wherein the P-type transient field effect transistor may employ a top gate structure or a local bottom gate structure.
Fig. 1 shows a schematic diagram of a P-type transient field effect transistor with a top gate structure according to the embodiment of the present disclosure, and it should be noted that other layers/regions (e.g., a source region, a drain region, an insulating layer, etc.) may be included in the field effect transistor according to actual needs.
As shown in fig. 1, the P-type transient field effect transistor may include a substrate 110, a channel region 120, a gate dielectric layer 130, a gate electrode 140, a source electrode 150, and a drain electrode 160.
The substrate 110 may be an environmentally degradable flexible substrate, such as a water soluble substrate or the like. The channel region 120 may be formed over the substrate 110 and its material is a carbon nanotube. The gate dielectric layer 130 may be formed on the channel region 120, and the material thereof may be a metal oxide, and the metal oxide may be at least one of aluminum oxide, hafnium oxide, zirconium oxide, and the like, and is preferably aluminum oxide. The gate electrode 140 may be formed on the gate dielectric layer 130 and a material thereof may be selected from aluminum (Al).
The source electrode 150 and the drain electrode 160 are formed of a stacked metal, which may be a stacked metal of a high work function metal and aluminum. The high work function metal is at least one of palladium (Pd), gold (Au), platinum (Pt), and the like, and palladium is preferable. In the present disclosure, the thickness of aluminum is much greater than that of the high work function metal, so as to ensure good contact between the source/drain electrode and the carbon nanotube in the channel region, ensure the performance of the device, and not affect the transient characteristics of the device.
Correspondingly, the disclosure provides a preparation method of the P-type transient field effect transistor with the top gate structure.
Fig. 2 shows a flow chart of the preparation method S200. Wherein in step S202 a substrate is provided, the substrate being formed of an environmentally degradable material. In step S204, a channel region with carbon nanotubes as a channel material is formed on the substrate. In step S206, a gate dielectric layer made of metal oxide is formed over the channel region. In step S208, a top gate electrode made of aluminum is formed on the gate dielectric layer. In step S210, source and drain electrodes in the form of stacked metal are formed on both sides of the channel region. The specific materials and the like can be described with reference to the device structure, and are not described in detail herein.
Fig. 3 shows a schematic diagram of a P-type transient field effect transistor with a local bottom gate structure according to the embodiment of the present disclosure, and it should be noted that other layers/regions (e.g., a source region, a drain region, an insulating layer, etc.) may be included in the field effect transistor according to actual needs.
As shown in fig. 3, the P-type transient field effect transistor may include a substrate 310, a channel region 320, a gate dielectric layer 330, a gate electrode 340, a source electrode 350, and a drain electrode 360.
Substrate 310 may be an environmentally degradable flexible substrate, such as a water soluble substrate or the like. Recesses may be formed in substrate 310 to accommodate gate dielectric layer 330 and gate electrode 340. Alternatively, the recess may not be formed, and thus the gate dielectric layer 330 and the gate electrode 340 are formed on the substrate 310. The channel region 320 may be formed on the substrate 310 and the gate dielectric layer 330, and the material thereof is a carbon nanotube.
The material of the gate dielectric layer 330 may be a metal oxide, and the metal oxide may be at least one of aluminum oxide, hafnium oxide, zirconium oxide, and the like, and is preferably aluminum oxide. The material of the gate electrode 340 may be selected from aluminum (Al).
The source electrode 350 and the drain electrode 360 are formed of a stacked metal, which may be a stacked metal of a high work function metal and aluminum. The high work function metal is at least one of palladium (Pd), gold (Au), platinum (Pt), and the like, and palladium is preferable. In the present disclosure, the thickness of aluminum is much greater than that of the high work function metal, so as to ensure good contact between the source/drain electrode and the carbon nanotube in the channel region, ensure the performance of the device, and not affect the transient characteristics of the device.
Correspondingly, the disclosure provides a preparation method of the P-type transient field effect transistor with the local bottom gate structure.
Fig. 4 shows a flow chart of a preparation method S400. Wherein in step S402 a substrate is provided, the substrate being formed of an environmentally degradable material. In step S404, a bottom gate electrode made of aluminum is formed on the substrate. In step S406, a gate dielectric layer made of metal oxide is formed over the bottom gate electrode. In step S408, a channel region with carbon nanotubes as a channel material is formed over the gate dielectric layer. In step S410, source and drain electrodes in the form of stacked metal are formed on both sides of the channel region. The specific materials and the like can be described with reference to the device structure, and are not described in detail herein.
In addition, in the case that the gate dielectric layer and the gate electrode are arranged in the substrate groove, the step of forming the groove on the substrate can be further included.
According to a second embodiment of the present disclosure, a carbon nanotube-based N-type transient field effect transistor is provided, wherein the P-type transient field effect transistor may adopt a top gate structure or a local bottom gate structure, and further, the P-type transient field effect transistor is prepared by an undoped method. In the undoped method, selective N-type carrier injection is performed by using low work function metals such as scandium (Sc), yttrium (Y), erbium (Er), lanthanum (La), and the like by adapting to the energy band of the carbon nanotube of the channel material, thereby realizing the N-type of the device.
Fig. 5 shows a schematic diagram of an N-type transient field effect transistor with a top gate structure prepared by an undoped method according to this embodiment of the present disclosure, and it should be noted that other layers/regions (e.g., a source region, a drain region, an insulating layer, etc.) may be included in the field effect transistor according to actual needs.
As shown in fig. 5, the P-type transient field effect transistor may include a substrate 550, a channel region 520, a gate dielectric layer 530, a gate electrode 540, a source electrode 550, and a drain electrode 560.
Substrate 550 can be an environmentally degradable flexible substrate, such as a water soluble substrate or the like. The channel region 520 may be formed over the substrate 550 and its material is a carbon nanotube. A gate dielectric layer 530 may be formed on the channel region 520, and the material of the gate dielectric layer may be a metal oxide, and the metal oxide may be at least one of aluminum oxide, hafnium oxide, zirconium oxide, and the like, and is preferably aluminum oxide. A gate electrode 540 may be formed on the gate dielectric layer 530 and a material thereof may be selected from aluminum (Al).
The source electrode 550 and the drain electrode 560 are formed of a stacked metal, which may be a stacked metal of a low work function metal and aluminum. The low work function metal is at least one of scandium (Sc), yttrium (Y), erbium (Er), lanthanum (La), and the like, and scandium is preferable. In the present disclosure, the thickness of aluminum is much greater than that of the low work function metal, so as to ensure good contact between the source/drain electrode and the carbon nanotube in the channel region, ensure the performance of the device, and not affect the transient characteristics of the device.
Correspondingly, the disclosure provides a preparation method of the N-type transient field effect transistor with the top gate structure, which is prepared by an undoped method.
Fig. 6 shows a flow chart of the preparation method S600. Wherein in step S602 a substrate is provided, the substrate being formed of an environmentally degradable material. In step S604, a channel region with carbon nanotubes as a channel material is formed on the substrate. In step S606, a gate dielectric layer made of metal oxide is formed over the channel region. In step S608, a top gate electrode made of aluminum is formed on the gate dielectric layer. In step S610, source and drain electrodes in the form of stacked metals are formed on both sides of the channel region. The specific materials and the like can be described with reference to the device structure, and are not described in detail herein.
Fig. 7 shows a schematic diagram of an N-type transient field effect transistor with a local bottom gate structure prepared by an undoped method according to this embodiment of the present disclosure, and it should be noted that other layers/regions (e.g., a source region, a drain region, an insulating layer, etc.) may be included in the field effect transistor according to actual needs.
As shown in fig. 7, the P-type transient field effect transistor may include a substrate 710, a channel region 720, a gate dielectric layer 730, a gate electrode 740, a source electrode 750, and a drain electrode 760.
Substrate 710 may be an environmentally degradable flexible substrate, such as a water soluble substrate or the like. A recess may be formed in the substrate 710 to accommodate the gate dielectric layer 730 and the gate electrode 740. Alternatively, the recess may not be formed, such that the gate dielectric layer 730 and the gate electrode 740 are formed over the substrate 710. The channel region 720 may be formed on the substrate 710 and the gate dielectric layer 730, and the material thereof is carbon nanotube.
The material of the gate dielectric layer 730 may be a metal oxide, and the metal oxide may be at least one of aluminum oxide, hafnium oxide, zirconium oxide, and the like, and is preferably aluminum oxide. The material of the gate electrode 740 may be selected from aluminum (Al).
The source electrode 750 and the drain electrode 760 are formed of a stacked metal, which may be a stacked metal of a low work function metal and aluminum. The low work function metal is at least one of scandium (Sc), yttrium (Y), erbium (Er), lanthanum (La), and the like, and scandium is preferable. In the present disclosure, the thickness of aluminum is much greater than that of the low work function metal, so as to ensure good contact between the source/drain electrode and the carbon nanotube in the channel region, ensure the performance of the device, and not affect the transient characteristics of the device.
Correspondingly, the present disclosure provides a method for manufacturing an N-type transient field effect transistor with a local bottom gate structure manufactured by an undoped method.
Fig. 8 shows a flow chart of the preparation method S800. Wherein in step S802, a substrate is provided, the substrate being formed of an environmentally degradable material. In step S804, a bottom gate electrode made of aluminum is formed on the substrate. In step S806, a gate dielectric layer made of metal oxide is formed over the bottom gate electrode. In step S808, a channel region with carbon nanotubes as a channel material is formed over the gate dielectric layer. In step S810, source and drain electrodes in the form of stacked metal are formed on both sides of the channel region. The specific materials and the like can be described with reference to the device structure, and are not described in detail herein.
In addition, in the case that the gate dielectric layer and the gate electrode are arranged in the substrate groove, the step of forming the groove on the substrate can be further included.
Fig. 9 shows a schematic diagram of an N-type transient field effect transistor with a local bottom gate structure prepared by the electrostatic doping method according to the embodiment of the disclosure, and it should be noted that other layers/regions (e.g., a source region, a drain region, an insulating layer, etc.) may be included in the field effect transistor according to actual needs. The electrostatic doping method covers a layer of doping layer material on a channel region of the device, and charges are bound through defects of crystal lattices in the layer of material to form an electrostatic layer, so that an energy band structure of the channel material is adjusted, and the device is converted into an N type.
As shown in fig. 9, the P-type transient field effect transistor may include a substrate 910, a channel region 920, a gate dielectric layer 930, a gate electrode 940, a source electrode 950, a drain electrode 960, and an electrostatically doped layer 970.
The substrate 910 may be an environmentally degradable flexible substrate, such as a water soluble substrate or the like. Recesses may be formed in the substrate 910 to accommodate the gate dielectric layer 930 and the gate electrode 940. Alternatively, no recess may be formed such that the gate dielectric layer 930 and the gate electrode 940 are formed over the substrate 910. The channel region 920 may be formed on the substrate 910 and the gate dielectric layer 930, and the material thereof is carbon nanotube.
The material of the gate dielectric layer 930 may be a metal oxide, and the metal oxide may be at least one of aluminum oxide, hafnium oxide, zirconium oxide, and the like, and is preferably aluminum oxide. The material of the gate electrode 940 may be selected from aluminum (Al).
The source electrode 950 and the drain electrode 960 are formed of a stacked metal, which may be a stacked metal of a high work function metal and aluminum. The high work function metal is at least one of palladium (Pd), gold (Au), platinum (Pt), and the like, and palladium is preferable. In the present disclosure, the thickness of aluminum is much greater than that of the high work function metal, so as to ensure good contact between the source/drain electrode and the carbon nanotube in the channel region, ensure the performance of the device, and not affect the transient characteristics of the device.
An electrostatic doping layer 970 is formed on the upper surface of the channel region 920. The electrostatic doping layer 970 is in the form of a thin layer of metal and metal oxide in the form of a stack. The thin-layer metal may be at least one of aluminum (Al), gold (Au), titanium (Ti), silver (Ag), and platinum (Pt), preferably aluminum, and the metal oxide may be at least one of aluminum oxide, hafnium oxide, and zirconium oxide, preferably aluminum oxide. The thickness of the thin metal layer may be less than or equal to 4nm, for example, about 2nm, and the thickness of the metal oxide may be several tens of nanometers. The metal oxide may be selected from any oxide suitable for Atomic Layer Deposition (ALD) growth.
Correspondingly, the disclosure provides a preparation method of the N-type transient field effect transistor with the local bottom gate structure prepared by the electrostatic doping method.
Fig. 10 shows a flow chart of the preparation method S1000. Wherein in step S1002, a substrate is provided, the substrate being formed of an environmentally degradable material. In step S1004, a bottom gate electrode made of aluminum is formed on a substrate. In step S1006, a gate dielectric layer made of metal oxide is formed over the bottom gate electrode. In step S1008, a channel region with carbon nanotubes as a channel material is formed over the gate dielectric layer.
In step S1010, an electrostatic doping layer is formed on the channel region, the electrostatic doping layer being in the form of a thin layer of metal and metal oxide in a stacked form. The forming of the electrostatically doped layer includes: a thin layer of metal is vapor deposited on the channel layer and a growth technique oxide is atomic layer deposited over the thin layer of metal. For example, metal aluminum can be evaporated over the channel region and then a metal oxide such as aluminum oxide can be grown by atomic layer deposition.
In step S1012, a source electrode and a drain electrode in the form of stacked metal are formed on both sides of the channel region. The specific materials and the like can be described with reference to the device structure, and are not described in detail herein.
In addition, in the case that the gate dielectric layer and the gate electrode are arranged in the substrate groove, the step of forming the groove on the substrate can be further included.
It should be noted that in the method embodiments described in the present disclosure, the steps between the methods are not necessarily the same as the described steps, and those skilled in the art may change the method according to the actual situation.
The transient field effect transistor provided by the disclosure has good source-drain contact performance and excellent performance; the CMOS circuit can be realized, and the CMOS circuit has the characteristics of good compatibility with the traditional chip process, strong noise resistance, low power consumption and the like.
According to further embodiments of the present disclosure, there is also provided an integrated device that may include the various transient field effect transistors described above.
In the description herein, reference to the description of the terms "one embodiment/mode," "some embodiments/modes," "example," "specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment/mode or example is included in at least one embodiment/mode or example of the application. In this specification, the schematic representations of the terms used above are not necessarily intended to be the same embodiment/mode or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments/modes or examples. Furthermore, the various embodiments/aspects or examples and features of the various embodiments/aspects or examples described in this specification can be combined and combined by one skilled in the art without conflicting therewith.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
It will be understood by those skilled in the art that the foregoing embodiments are merely for clarity of illustration of the disclosure and are not intended to limit the scope of the disclosure. Other variations or modifications may occur to those skilled in the art, based on the foregoing disclosure, and are still within the scope of the present disclosure.

Claims (10)

1. A carbon nanotube based transient field effect transistor comprising:
a substrate formed of an environmentally degradable material;
the channel material of the channel region is a carbon nano tube;
the gate dielectric layer is made of metal oxide;
the gate electrode is made of aluminum; and
a source electrode and a drain electrode formed of a stacked metal,
when the field effect transistor is a P-type field effect transistor, the laminated metal is a laminated metal formed by high work function metal and aluminum; when the field effect transistor is an N-type field effect transistor prepared by an electrostatic doping method, the laminated metal is a laminated metal formed by high-work-function metal and aluminum; when the field effect transistor is an N-type field effect transistor prepared by an undoped method, the laminated metal is a laminated metal formed by low-work-function metal and aluminum, wherein in the laminated metal, the thickness of the aluminum is far greater than that of the high-work-function metal/low-work-function metal.
2. The transient field effect transistor of claim 1 wherein said high work function metal is at least one of palladium, gold and platinum, preferably palladium; the low work function metal is at least one of scandium, yttrium, erbium and lanthanum, and scandium is preferable.
3. The transient field effect transistor according to claim 1, wherein the metal oxide is at least one of aluminum oxide, hafnium oxide and zirconium oxide, preferably aluminum oxide.
4. The transient field effect transistor of claim 1, wherein when said field effect transistor is a P-type field effect transistor or an N-type field effect transistor fabricated by an undoped method, the structure of the field effect transistor is a local bottom gate structure or a top gate structure;
in the local bottom gate structure, the gate dielectric layer and the gate electrode are located on one side of the channel region facing the substrate, and the source electrode and the drain electrode are respectively located on two sides of the channel region.
5. The transient field effect transistor of claim 1, wherein when said field effect transistor is an N-type field effect transistor fabricated by an electrostatic doping method, the structure of the field effect transistor is a partial bottom gate structure in which said gate dielectric layer and gate electrode are located on a side of said channel region facing said substrate, and said source electrode and drain electrode are located on both sides of said channel region, respectively.
6. The transistorft of claim 5, wherein the N-type field effect transistor formed by electrostatic doping further comprises an electrostatically doped layer on a side of the channel region remote from the substrate.
7. The transistorfeit field effect transistor of claim 6, wherein the electrostatically doped layer is in the form of a thin layer of metal and metal oxide in a stack.
8. A preparation method of a transient field effect transistor based on a carbon nano tube is characterized by comprising the following steps:
providing a substrate, the substrate being formed of an environmentally degradable material;
forming a channel region with a carbon nanotube as a channel material on the substrate;
forming a gate dielectric layer made of metal oxide on the channel region;
forming a top gate electrode made of aluminum on the gate dielectric layer; and
and forming a source electrode and a drain electrode in the form of stacked metal on both sides of the channel region.
9. A preparation method of a transient field effect transistor based on a carbon nano tube is characterized by comprising the following steps:
providing a substrate, the substrate being formed of an environmentally degradable material;
forming a bottom gate electrode made of aluminum on the substrate;
forming a gate dielectric layer made of metal oxide on the bottom gate electrode;
forming a channel region which takes the carbon nano tube as a channel material on the gate dielectric layer; and
and forming a source electrode and a drain electrode in the form of stacked metal on both sides of the channel region.
10. An integrated device comprising a transient field effect transistor as claimed in any of claims 1 to 7.
CN202110549606.0A 2021-05-20 2021-05-20 CMOS circuit of transient field effect transistor based on carbon nano tube and preparation method Active CN113299832B (en)

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