CN113258535B - Under-voltage turn-off output module, BOOST power supply chip and boosting power supply system - Google Patents

Under-voltage turn-off output module, BOOST power supply chip and boosting power supply system Download PDF

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Publication number
CN113258535B
CN113258535B CN202110768141.8A CN202110768141A CN113258535B CN 113258535 B CN113258535 B CN 113258535B CN 202110768141 A CN202110768141 A CN 202110768141A CN 113258535 B CN113258535 B CN 113258535B
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voltage
module
output
control signal
amplification
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CN113258535A (en
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许锦龙
李瑞平
刘彬
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Shanghai Xinlong Semiconductor Technology Co ltd
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Shanghai Xinlong Semiconductor Technology Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/1213—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for DC-DC converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention provides an under-voltage turn-off output module, a BOOST power supply chip and a boosting power supply system, which relate to the technical field of switching power supplies, and are characterized in that according to the relation between VIN input voltage terminal voltage and a set threshold of starting voltage and a set threshold of shutdown voltage, corresponding control signals are generated through an internal voltage setting module, a voltage amplification module, a driving control signal generation module and an on-off control module, so that when the BOOST power supply chip is in a shutdown state, a PMOS (P-channel metal oxide semiconductor) tube externally connected with a PGATE (PGATE) signal output end is controlled to be turned off; when the BOOST power supply chip is in a starting state, the external PMOS tube of the PGATE signal output end is controlled to be conducted. Therefore, the function of undervoltage turn-off output in the BOOST topological circuit is realized.

Description

Under-voltage turn-off output module, BOOST power supply chip and boosting power supply system
Technical Field
The invention relates to the technical field of switching power supplies, in particular to an under-voltage turn-off output module, a BOOST power supply chip and a boosting power supply system.
Background
For the BOOST topology circuit, even if the power tube does not perform switching action, the output end can be connected with the input end through the energy storage inductor and the freewheeling diode, so that the output end has slightly lower voltage than the input end. That is, even if the BOOST power chip is in the off state, the output terminal does not BOOST, but a voltage slightly lower than the input terminal still exists.
In normal application, when the BOOST power supply chip is powered off, the voltage value existing at the output end of the BOOST topology circuit is not desirable. On the one hand, this results in a certain loss of electrical energy; on the other hand, some applications do not allow this voltage to be present. For example: when the LED lamp is driven, if the set output end voltage is slightly larger than the input voltage, even if the output end of the BOOST topology circuit does not BOOST, the LED lamp at the output end still has a slightly bright phenomenon, which seriously influences the customer experience.
In addition, when the input end is a battery device, if the shutdown voltage and the startup voltage of the BOOST power supply chip are designed to be the same voltage value, after the BOOST power supply chip is shut down, the load of the battery is reduced, the voltage of the battery can be increased, the BOOST power supply chip is restarted, the above processes are repeated, and further the output voltage of the output end is continuously jumped, and even the system is damaged.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides an under-voltage turn-off output module, a BOOST power supply chip and a BOOST power supply system.
In order to achieve the above object, an embodiment of the present invention provides an under-voltage shutdown output module, including: the device comprises a voltage setting module, a voltage amplifying module, a driving control signal generating module and an on-off control module; the input end of the voltage setting module comprises a VCC input voltage end, and the output end of the voltage setting module is connected with the input end of the voltage amplifying module; the voltage setting module detects the RL voltage and the RW voltage and respectively outputs the RL voltage and the RW voltage to the voltage amplifying module; the voltage amplification module generates a first amplification voltage and a second amplification voltage according to the first set amplification factor, wherein the first amplification voltage is obtained by amplifying the RL voltage by the first set amplification factor, and the second amplification voltage is obtained by amplifying the sum of the RL voltage and the RW voltage by the first set amplification factor; the output end of the voltage amplification module is connected with the drive control signal generation module, and the first amplification voltage and the second amplification voltage are respectively output to the drive control signal generation module through the output end of the voltage amplification module; the output end of the drive control signal generation module is connected with the on-off control module, and the drive control signal generation module detects the voltage at the VIN input voltage end and the SD signal at the SD signal input end and outputs a drive control signal to the on-off control module; when the voltage of the VIN input voltage is lower than a set threshold of shutdown voltage or is higher than the set threshold of shutdown voltage from low to low and is lower than the set threshold of startup voltage, the driving control signal is at low level; when the voltage of the VIN input voltage end is higher than a set threshold value of the starting-up voltage or the voltage of the VIN input voltage end is reduced from high to lower than the set threshold value of the shutdown voltage, the driving control signal is consistent with the SD signal of the SD signal input end; the shutdown voltage setting threshold is the product of the first amplification voltage and the second setting amplification factor, and the startup voltage setting threshold is the product of the second amplification voltage and the second setting amplification factor; the on-off control module receives the drive control signal, controls the external PMOS pipe of PGATE signal output end to turn off when the drive control signal is the low level, and controls the external PMOS pipe of PGATE signal output end to switch on when the drive control signal is the high level, thereby opening or closing the current path between system input end and the system output end.
Optionally, the driving control signal generating module compares the voltage to be compared with the first amplified voltage and the second amplified voltage, generates a second control signal and a first control signal according to a comparison result, and generates a third control signal according to the first control signal and the second control signal; the voltage to be compared is VIN input voltage end voltage and is obtained by dividing voltage through internal resistors of the driving control signal generation module; when the voltage to be compared is less than or equal to the first amplification voltage, the first control signal and the third control signal are at a low level, and the second control signal is at a high level; when the voltage to be compared is increased from low to be greater than the first amplification voltage and less than the second amplification voltage, the first control signal, the second control signal and the third control signal are at low level; when the voltage to be compared is reduced from high to be larger than the first amplification voltage and smaller than the second amplification voltage, the first control signal and the second control signal are at low level, and the third control signal is at high level; when the voltage to be compared is greater than or equal to the second amplification voltage, the first control signal and the third control signal are at a high level, and the second control signal is at a low level; the third control signal and the SD signal generate a driving control signal through an AND gate.
Optionally, the voltage setting module includes a current source IS1, a current source IS2, an operational amplifier OP1, and an operational amplifier OP 2; the first end of IS1 and the first end of IS2 are respectively connected with a VCC input voltage end, the second end of IS1 IS connected with a RL voltage setting end, and the second end of IS2 IS connected with a RW voltage setting end; the non-inverting input end of the OP1 IS connected with the second end of the IS1, the inverting input end of the OP1 IS connected with the output end of the OP1, and the output end of the OP1 IS used as the first output end of the voltage setting module to output the RL voltage; the non-inverting input terminal of the OP2 IS connected to the second terminal of the IS2, the inverting input terminal of the OP2 IS connected to the output terminal of the OP2, and the output terminal of the OP2 serves as the second output terminal of the voltage setting module to output the RW voltage.
Optionally, the voltage amplifying module includes an operational amplifier OP3, an operational amplifier OP4, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, and a resistor R9; the resistance values of the resistors satisfy the following relation: r5= R6=2 × R7, R9/R8=4 × R4/R3) + 3; a positive phase input end of the OP3 receives the RL voltage output by the voltage setting module, an inverted phase input end of the OP3 is respectively connected with a first end of R3 and a first end of R4, a second end of R3 is connected with a GND end, a second end of R4 is connected with an output end of the OP3, and an output end of the OP3 serves as a first output end of the voltage amplification module to output a first amplified voltage; the positive phase input end of the OP4 is respectively connected with the second ends of the R5 and the R6, the first end of the R5 receives the RL voltage output by the voltage setting module, the first end of the R6 receives the RW voltage output by the voltage setting module, the first end of the R7 is connected with the second ends of the R5 and the R6, the second end of the R7 is connected with the GND end, the negative phase input end of the OP4 is respectively connected with the first ends of the R8 and the R9, the second end of the R8 is connected with the GND end, the second end of the R9 is connected with the output end of the OP4, and the output end of the OP4 serves as the second output end of the voltage amplifying module to output the second amplified voltage.
Optionally, the first set magnification is R4/R3+ 1.
Optionally, the driving control signal generating module includes a comparator COMP1, a comparator COMP2, an RS flip-flop, an AND gate AND1, a resistor R10, AND a resistor R11; a first end of R10 is connected with a VIN input voltage end, and a second end of R10 is respectively connected with a non-inverting input end of COMP1 and an inverting input end of COMP 2; a first end of R11 is connected with an inverting input end of COMP2, and a second end of R11 is connected with a GND end; an inverting input end of the COMP1 receives the second amplified voltage, and an output end of the COMP1 is connected with an S input end of the RS trigger; a positive phase input end of the COMP2 receives the first amplified voltage, and an output end of the COMP2 is connected with an R input end of the RS trigger; the Q output end of the RS trigger is connected with a first input end of an AND gate AND1, a second input end of an AND gate AND1 is connected with the SD signal input end, AND the output end of the AND gate AND1 is used as the output end of the drive control signal generation module to output a drive control signal.
Optionally, the second set magnification is R10/R11+ 1.
Optionally, the on-off control module includes an NMOS transistor M1, a resistor R12, a resistor R13, and a voltage regulator DZ1, a gate of the M1 is used as an input terminal of the on-off control module to receive a driving control signal, a source of the M1 is connected to the GND terminal, and a drain of the M1 is connected to a second terminal of the R13; a first terminal of R12 is connected to the VIN input voltage terminal, and a second terminal of R12 is connected to the first terminal of R13; the cathode of the DZ1 is connected with the VIN input voltage end, and the anode of the DZ1 is connected with the first end of the R13; the first end of the R13 is connected with the PGATE signal output end to control the conduction or the disconnection of a PMOS tube externally connected with the PGATE signal output end.
The embodiment of the invention provides a BOOST power supply chip, which comprises a voltage stabilizing source and reference voltage source module, an error amplification module, a frequency compensation module, an oscillator and slope compensation module, a power tube driving module, a power tube, an undervoltage turn-off output module, an RL voltage setting end, an RW voltage setting end, a VIN input voltage end, a PGATE signal output end, an SD signal input end, a GND end, an SW power output end and an FB voltage feedback end, wherein the voltage stabilizing source and reference voltage source module is connected with the output end of the power tube; the first end of the voltage stabilizing source and reference voltage source module is connected with a VIN input voltage end, the second end of the voltage stabilizing source and reference voltage source module is connected with a VCC input voltage end to provide an internal power supply voltage VCC for the chip, and the third end of the voltage stabilizing source and reference voltage source module is connected with a VREF signal end to provide an internal reference voltage VREF for the chip; the reverse phase input end of the error amplification module is connected with the FB voltage feedback end, the normal phase input end of the error amplification module is connected with the VREF signal end, and the output end of the error amplification module is respectively connected with the frequency compensation module, the oscillator and the slope compensation module; the first end of the power tube driving module is connected with the oscillator and the slope compensation module and receives PWM signals output by the oscillator and the slope compensation module, and the second end of the power tube driving module is connected with the first end of the power tube and outputs power tube driving signals; the second end of the power tube is connected with the SW power output end, and the third end of the power tube is connected with the GND end.
The embodiment of the invention also provides a BOOST power supply system, which comprises a first setting resistor, a second setting resistor, a PMOS (P-channel metal oxide semiconductor) tube, an energy storage inductor, a Schottky diode and the BOOST power supply chip; the first end of the first setting resistor is connected with the RL voltage setting end, and the second end of the first setting resistor is connected with the GND end; the first end of the second setting resistor is connected with the RW voltage setting end, and the second end of the second setting resistor is connected with the GND end; the grid electrode of the PMOS tube is connected with the PGATE signal output end, the source electrode of the PMOS tube is respectively connected with the power circuit and the VIN input voltage end, and the drain electrode of the PMOS tube is connected with the SW power output end through the energy storage inductor; the positive pole of the Schottky diode is connected with the SW power output end, and the negative pole of the Schottky diode is connected with the output circuit.
In conclusion, the beneficial effects of the invention are as follows:
according to the undervoltage turn-off output module provided by the embodiment of the invention, according to the relationship between the voltage of the VIN input voltage and the set threshold of the starting-up voltage and the set threshold of the shutdown voltage, the internal voltage setting module, the voltage amplification module, the drive control signal generation module and the on-off control module generate corresponding control signals, so that when a BOOST power supply chip is in a shutdown state, a PMOS (P-channel metal oxide semiconductor) tube externally connected with a PGATE (PGATE) signal output end is controlled to be turned off; when the BOOST power supply chip is in a startup state, the external PMOS tube of the PGATE signal output end is controlled to be conducted, so that the function of undervoltage turn-off output in the BOOST topological circuit is realized, and when the BOOST power supply chip is in a shutdown state, the output end has no voltage at all.
The BOOST power supply chip provided by the embodiment of the invention has an under-voltage protection function. When the voltage of the VIN input voltage is lower than the shutdown voltage set threshold of the power supply chip, the power supply chip is in a shutdown state; when the voltage of the VIN input voltage end is higher than the set threshold value of the starting voltage of the power supply chip, the power supply chip is in a starting state; a hysteresis voltage window is set, so that when the voltage of the VIN input voltage is increased from low to higher than a set threshold value of shutdown voltage and lower than a set threshold value of startup voltage, the power supply chip is in a shutdown state, and the output end has no voltage completely; when the voltage of the VIN input voltage is reduced from high to low and is lower than the set threshold of the starting-up voltage and higher than the set threshold of the shutdown voltage, the power chip is in a starting-up state.
According to the BOOST power supply system provided by the embodiment of the invention, the shutdown voltage setting threshold and the hysteresis voltage window are adjusted through the external first setting resistor R1 and the external second setting resistor R2, so that when a BOOST power supply chip is in a shutdown state, a current path between a system input end VIN and a system output end VO is closed; when the BOOST power chip is in a startup state, a current path between a system input end VIN and a system output end VO is opened, and meanwhile, setting of a specific shutdown voltage and a hysteresis voltage window is very convenient.
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a schematic structural diagram of a BOOST power supply system according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a BOOST power supply chip according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an under-voltage shutdown output module according to an embodiment of the present invention;
FIG. 4 is a graph of a critical node voltage waveform in an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail below with reference to specific examples in order to facilitate understanding by those skilled in the art.
Referring to fig. 1, a BOOST power supply system according to an embodiment of the present invention includes a power supply circuit 20, an output circuit 30, and a BOOST under-voltage shutdown output circuit 10. One end of the BOOST under-voltage turn-off output circuit 10 is connected to the power circuit 20, and the other end of the BOOST under-voltage turn-off output circuit 10 is connected to the output circuit 30.
In this embodiment, the power circuit 20 includes an input filter capacitor CIN, which is connected in parallel between the system input VIN and the GND terminal.
The output circuit 30 includes a first feedback resistor RT, a second feedback resistor RB, an output end filter capacitor COUT, and an output capacitor C2, a first end of the first feedback resistor RT is connected to an output end of the BOOST undervoltage turn-off output circuit 10, a second end of the first feedback resistor RT is connected to a first end of the second feedback resistor RB and a FB voltage feedback end of the BOOST power chip, respectively, a second end of the second feedback resistor RB is connected to a GND terminal, and the output end filter capacitor COUT and the output capacitor C2 are connected in parallel between the system output end VO and the GND terminal, respectively.
The BOOST under-voltage shutdown output circuit 10 includes: the power supply comprises an input capacitor C1, a Schottky diode D1, a first setting resistor R1, a second setting resistor R2, an energy storage inductor L1, a PMOS tube M2 and a BOOST power supply chip; the first end of the first setting resistor R1 is connected with the RL voltage setting end of the BOOST power supply chip, and the second end of the first setting resistor R1 is connected with the GND end; the first end of a second setting resistor R2 is connected with the RW voltage setting end of the BOOST power supply chip, and the second end of a second setting resistor R2 is connected with the GND end; the grid electrode of the PMOS tube M2 is connected with the PGATE signal output end of the BOOST power supply chip, the source electrode of the PMOS tube M2 is respectively connected with the power supply circuit 20 and the VIN input voltage end of the BOOST power supply chip through an input capacitor C1, and the drain electrode of the PMOS tube M2 is connected with the SW power output end of the BOOST power supply chip through an energy storage inductor L1; the anode of the Schottky diode D1 is connected with the SW power output end of the BOOST power supply chip, and the cathode of the Schottky diode D1 is connected with the output circuit 30.
In the embodiment of the present invention, the power circuit 20 and the output circuit 30 are only an implementation manner of a BOOST power supply system, and a person skilled in the art may select different power circuits and output circuits as needed, which is not described herein again.
According to the BOOST power supply system, VL and VW are respectively set through the first setting resistor R1 and the second setting resistor R2, wherein VL is a shutdown voltage setting threshold of the BOOST power supply chip, and VW is a hysteresis voltage window of the BOOST power supply chip. When the BOOST power supply chip is in a shutdown state, M2 is turned off, so that a current path between a system input end VIN and a system output end VO is closed; when the BOOST power chip is in the power-on state, M2 is turned on, and a current path between the system input terminal VIN and the system output terminal VO is opened.
The BOOST power supply system of the embodiment of the invention not only realizes the function of under-voltage turn-off output, but also is very convenient to set the specific shutdown voltage and hysteresis voltage window, and has particularly obvious advantages when equipment such as a lithium battery is used for supplying power.
In the embodiment of the invention, the PMOS transistor M2, the first setting resistor R1, and the second setting resistor R2 are disposed outside the BOOST power chip, so that the shutdown voltage setting threshold and the hysteresis voltage window can be adjusted through the external first setting resistor R1 and the external second setting resistor R2, which is simpler and more convenient than the prior art. In other embodiments, the first setting resistor R1 and the second setting resistor R2 may also be integrated inside the BOOST power chip.
In the embodiment of the present invention, referring to fig. 2, the BOOST power supply chip includes a voltage regulator and reference voltage source module, an error amplification module EA, a frequency compensation module, an oscillator and slope compensation module, a power tube driving module, a power tube, an under-voltage turn-off output module, and further includes an RL voltage setting end, an RW voltage setting end, a VIN input voltage end, a PGATE signal output end, an SD signal input end, a GND end, an SW power output end, and an FB voltage feedback end.
And the third end of the voltage stabilizing source and reference voltage source module is connected with a VREF signal end to provide an internal reference voltage VREF for the chip.
And the error amplification module EA is used for amplifying the voltage difference between the internal reference voltage VREF and the voltage of the FB voltage feedback end and processing the voltage difference for driving the power tube. The reverse phase input end of the error amplification module EA is connected with the FB voltage feedback end, the positive phase input end of the error amplification module EA is connected with the VREF signal end, and the output end of the error amplification module EA is respectively connected with the frequency compensation module, the oscillator and the slope compensation module.
The frequency compensation module is used for compensating the output of the error amplification module EA, so that the operation of the BOOST power supply chip is more stable. The oscillator in the oscillator and slope compensation module is used for generating sawtooth wave voltage with a certain slope, and slope compensation is carried out on the sawtooth wave voltage. Meanwhile, the sawtooth wave voltage signal is compared with an output signal of the error amplification module EA to generate a PWM signal.
The first end of the power tube driving module is connected with the oscillator and the slope compensation module and receives PWM signals output by the oscillator and the slope compensation module, and the power tube driving module generates power tube driving signals according to the PWM signals; the second end of the power tube driving module is connected with the first end of the power tube and outputs a power tube driving signal; the second end of the power tube is connected with the SW power output end, and the third end of the power tube is connected with the GND end. The power tube determines the conduction duty ratio between the SW power output end and the GND end according to the driving signal, and further adjusts the output voltage or current to enable the voltage of the FB voltage feedback end to be equal to the internal reference voltage VREF.
Referring to fig. 3, the under-voltage shutdown output module includes a voltage setting module STAGE1, a voltage amplifying module STAGE2, a driving control signal generating module STAGE3, and an on-off control module STAGE 4.
In this embodiment, the input terminal of the voltage setting module includes a VCC input voltage terminal, and the output terminal of the voltage setting module is connected to the input terminal of the voltage amplifying module; the voltage setting module detects the RL voltage and the RW voltage and respectively outputs the RL voltage and the RW voltage to the voltage amplifying module; the RL voltage is the voltage of the current output by the RL voltage setting end at two ends of the RL voltage setting end external resistor, and the RW voltage is the voltage of the output current of the RW voltage setting end at two ends of the RW voltage setting end external resistor.
Specifically, in this embodiment, the voltage setting module includes: a current source IS1, a current source IS2, an operational amplifier OP1, an operational amplifier OP 2; the first end of the IS1 IS connected with a VCC input voltage end, and the second end of the IS1 IS connected with a RL voltage setting end; the first end of the IS2 IS connected with a VCC input voltage end, and the second end of the IS2 IS connected with a RW voltage setting end; the positive phase input end of OP1 IS connected with the second end of IS1, the negative phase input end of OP1 IS connected with the output end of OP1, the output end of OP1 IS used as the first output end of the voltage setting module to output RL voltage, the positive power supply end of OP1 IS connected with the VCC input voltage end, and the negative power supply end of OP1 IS connected with the GND end; the positive input end of OP2 IS connected to the second end of IS2, the negative input end of OP2 IS connected to the output end of OP2, the output end of OP2 IS used as the second output end of the voltage setting module to output RW voltage, the positive power supply end of OP2 IS connected to the VCC input voltage end, and the negative power supply end of OP2 IS connected to GND end.
In this embodiment, the voltage amplification module generates a first amplification voltage and a second amplification voltage according to a first set amplification factor, where the first amplification voltage is a voltage obtained by amplifying the RL voltage by the first set amplification factor, and the second amplification voltage is a voltage obtained by amplifying the sum of the RL voltage and the RW voltage by the first set amplification factor; the output end of the voltage amplification module is connected with the drive control signal generation module, and the first amplification voltage and the second amplification voltage are respectively output to the drive control signal generation module through the output end of the voltage amplification module.
Specifically, in this embodiment, the voltage amplifying module includes an operational amplifier OP3, an operational amplifier OP4, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, and a resistor R9; the resistance values of the resistors satisfy the following relation: r5= R6=2 × R7, R9/R8=4 × R4/R3) + 3; a positive phase input end of an OP3 receives the RL voltage output by the voltage setting module, an inverted phase input end of an OP3 is respectively connected with a first end of R3 and a first end of R4, a second end of R3 is connected with a GND end, a second end of R4 is connected with an output end of OP3, an output end of the OP3 serves as a first output end of the voltage amplification module to output a first amplified voltage, a positive power supply end of the OP3 is connected with a VCC input voltage end, and a negative power supply end of the OP3 is connected with the GND end; the positive phase input end of OP4 is connected to the second ends of R5 and R6, the first end of R5 receives the RL voltage output by the voltage setting module, the first end of R6 receives the RW voltage output by the voltage setting module, the first end of R7 is connected to the second ends of R5 and R6, the second end of R7 is connected to the GND end, the negative phase input end of OP4 is connected to the first ends of R8 and R9, the second end of R8 is connected to the GND end, the second end of R9 is connected to the output end of OP4, the output end of OP4 is used as the second output end of the voltage amplifying module to output the second amplified voltage, the positive power end of OP4 is connected to the VCC input voltage end, and the negative power end of OP4 is connected to the GND end.
In this embodiment, the output end of the driving control signal generating module is connected to the on-off control module, and the driving control signal generating module detects the voltage at the VIN input voltage and the SD signal at the SD signal input end, and outputs a driving control signal to the on-off control module; when the voltage of the VIN input voltage is lower than a set threshold of shutdown voltage or is higher than the set threshold of shutdown voltage from low to low and is lower than the set threshold of startup voltage, the driving control signal is at low level; when the voltage of the VIN input voltage end is higher than a set threshold value of the starting-up voltage or the voltage of the VIN input voltage end is reduced from high to lower than the set threshold value of the shutdown voltage, the driving control signal is consistent with the SD signal of the SD signal input end; the threshold value of the power-off voltage is the product of the first amplification voltage and the second set amplification factor, and the threshold value of the power-on voltage is the product of the second amplification voltage and the second set amplification factor.
Specifically, in this embodiment, the driving control signal generating module includes a comparator COMP1, a comparator COMP2, an RS flip-flop SRFF1, an AND gate AND1, a resistor R10, AND a resistor R11; a first end of R10 is connected with a VIN input voltage end, and a second end of R10 is respectively connected with a non-inverting input end of COMP1 and an inverting input end of COMP 2; a first end of R11 is connected with an inverting input end of COMP2, and a second end of R11 is connected with a GND end; an inverting input end of the COMP1 receives the second amplified voltage and serves as a reference voltage of the COMP1, an output end of the COMP1 is connected with an S input end of the RS trigger, a positive power supply end of the COMP1 is connected with a VCC input voltage end, and a negative power supply end of the COMP1 is connected with a GND end; a positive phase input end of the COMP2 receives the first amplified voltage and serves as a reference voltage of the COMP2, an output end of the COMP2 is connected with an R input end of the RS trigger, a positive power supply end of the COMP2 is connected with a VCC input voltage end, and a negative power supply end of the COMP2 is connected with a GND end; the Q output end of the RS trigger is connected with a first input end of an AND gate AND1, a second input end of an AND gate AND1 is connected with the SD signal input end, AND the output end of the AND gate AND1 is used as the output end of the drive control signal generation module to output a drive control signal.
Specifically, the first set magnification is R4/R3+1, and the second set magnification is R10/R11+ 1. The shutdown voltage setting threshold VL, the hysteresis voltage window VW, and the startup voltage setting threshold VH may be expressed as:
Figure 215649DEST_PATH_IMAGE001
Figure 601631DEST_PATH_IMAGE002
Figure 850210DEST_PATH_IMAGE004
it can be seen from the above equation that after the internal circuit of the under-voltage shutdown output module is designed, VL, VW, and VH can be adjusted by adjusting the resistance values of the external first setting resistor R1 and the second setting resistor R2.
In this embodiment, the on-off control module receives the driving control signal, controls the external PMOS transistor of the PGATE signal output end to turn off when the driving control signal is at a low level, and controls the external PMOS transistor of the PGATE signal output end to turn on when the driving control signal is at a high level, so as to open or close a current path between the system input end and the system output end.
Specifically, in this embodiment, the on-off control module includes an NMOS transistor M1, a resistor R12, a resistor R13, and a voltage regulator DZ1, wherein a gate of the M1 is used as an input terminal of the on-off control module to receive a driving control signal, a source of the M1 is connected to a GND terminal, and a drain of the M1 is connected to a second terminal of the R13; a first terminal of R12 is connected to the VIN input voltage terminal, and a second terminal of R12 is connected to the first terminal of R13; the cathode of the DZ1 is connected with the VIN input voltage end, and the anode of the DZ1 is connected with the first end of the R13; the first end of the R13 is connected with the PGATE signal output end to control the conduction or the disconnection of a PMOS tube externally connected with the PGATE signal output end.
The working principle of the embodiment of the invention is as follows:
referring to fig. 3, the current source IS1 and the current source IS2 are internal current sources in the voltage setting module STAGE1, and the first setting resistor R1 and the second setting resistor R2 are resistors that can be set outside the BOOST power chip. The first setting resistor R1 is used to set the shutdown voltage setting threshold VL, and the second setting resistor R2 is used to set the hysteresis voltage window VW. The relationship between the startup voltage setting threshold VH, the shutdown voltage setting threshold VL, and the hysteresis voltage window VW is:
Figure 714260DEST_PATH_IMAGE005
the current of the current source IS1 flows through the first setting resistor R1 externally connected to the RL voltage setting terminal to generate the RL voltage. The RL voltage is passed through a voltage follower formed by an operational amplifier OP1 to generate V1. V1 is the mapping of VL, and the function of the voltage follower formed by OP1 is impedance transformation, so that the influence of the circuit of the later stage on the stage is prevented.
The current of the current source IS2 flows through the second setting resistor R2 externally connected to the RW voltage setting terminal to generate the RW voltage. The RW voltage is processed by a voltage follower formed by an operational amplifier OP2 to generate V2, V2 is the mapping of VW, and the voltage follower formed by the OP2 is used for impedance transformation to prevent a post-stage circuit from influencing the stage.
The voltage amplifying block STAGE2 generates V3 (second amplified voltage) and V4 (first amplified voltage) based on the V1 (RL voltage) and the V2 (RW voltage) output from the voltage setting block. V3 and V4 are used as reference voltages of the comparator in the later stage.
In the voltage amplifying module STAGE2, the operational amplifier OP4 and R5-R9 form an in-phase adder, and if R5= R6=2 × R7, the output voltage V3 of the OP4 is related to V1 and V2 as follows:
Figure 13786DEST_PATH_IMAGE006
the operational amplifiers OP3, R3 and R4 form a non-inverting amplifier, and the output voltages V4 and V1 of the OP3 have the following relations:
Figure 508352DEST_PATH_IMAGE007
through setting up reasonable resistance value, make:
Figure 244227DEST_PATH_IMAGE008
the expressions of V3 and V4 can be rewritten as follows:
Figure 161236DEST_PATH_IMAGE009
，
Figure 564536DEST_PATH_IMAGE010
wherein A is the first set magnification, equal to R4/R3+ 1.
The driving control signal generation module STAGE3 detects the voltage at the VIN input voltage and the SD signal at the SD signal input terminal, and outputs a driving control signal to the on-off control module STAGE 4. The voltage at the VIN input voltage is divided by resistors R10 and R11 inside the driving control signal generation module STAGE3 to obtain V5, wherein the relationship between the voltage at the V5 and the VIN input voltage, R10 and R11 is as follows:
Figure 230003DEST_PATH_IMAGE011
v5 is used as a voltage to be compared and is respectively input to a non-inverting input terminal of the comparator COMP1 and an inverting input terminal of the comparator COMP 2. V3 (second amplified voltage) is inputted as a reference voltage of COMP1 to the inverting input terminal of COMP1, and the output terminal of COMP1 outputs V6 (first control signal). V4 (first amplified voltage) is inputted as a reference voltage of COMP2 to a non-inverting input terminal of COMP2, and a COMP2 output terminal outputs V7 (second control signal). The relationships between V3-V7 are as follows:
Figure DEST_PATH_IMAGE013A
in the table, "0" indicates a low level and "1" indicates a high level.
Referring to fig. 3, SRFF1 is an RS flip-flop that receives V6 and V7, outputs V8, V6 (the first control signal) to the S input of the RS flip-flop, V7 (the second control signal) to the R input of the RS flip-flop, and outputs V8 (the third control signal) from the RS flip-flop. The relationships between V6, V7, V8 are as follows:
V6 V7 V8
0 0 holding the previous state
0 1 0
1 0 1
"0" indicates a low level and "1" indicates a high level.
The SD signal is also called a shutdown signal and is active low. The SD signal is low level, the BOOST power supply chip is shut down, the SD signal is high level, and the BOOST power supply chip works normally. The SD signal is input from the SD signal input terminal to the brown-out shutdown output block, AND serves as an input signal of an AND gate AND1 together with V8 (third control signal), AND gate AND1 outputs V9 (driving control signal), AND V9 (driving control signal) is high only when the SD signal AND V8 (third control signal) are high simultaneously, otherwise V9 is low.
The on-off control module STAGE4 receives the V9 (driving control signal), and finally drives the PMOS transistor externally connected to the PGATE signal output terminal to turn on or off, thereby turning on or off the current path between the system input terminal and the system output terminal.
When V9 (driving control signal) is at high level, the NMOS transistor M1 is turned on, and the voltage at the VIN input voltage is divided by R12, DZ1, and R13, so that the PMOS transistor M2 is turned on. The DZ1 is used for clamping the voltage between the gate and the source of the PMOS transistor M2, and the M2 is prevented from being damaged due to the fact that the absolute value of the voltage difference between the gate and the source of the M2 is too high. When V9 (driving control signal) is low, M1 is not conductive, the voltage difference between the gate and the source of M2 is 0V, and M2 is not conductive.
Please refer to fig. 4, which is a voltage waveform diagram of a key node according to an embodiment of the present invention, wherein the voltage waveform diagram is divided into 5 parts, which are described as follows according to an arrangement of 1-5:
1. v1 (RL voltage) is a voltage across the first setting resistor R1 set to 0.8V, and V2 (RW voltage) is a voltage across the second setting resistor R2 set to 0.2V. V1 corresponds to a VL map, and V2 corresponds to a VW map.
2. V3 (second amplification voltage) is a mapping of VH, V3 is equal to the sum of V1 and V2 multiplied by a first set amplification factor, 3V in the figure, which is equivalent to 3 times the sum of V1 and V2; v4 (first amplification voltage) is a map of VL, 2.4V, 3 times greater than V1; the voltage V5 (to be compared) is obtained by voltage division of the VIN input voltage, and the maximum value of the VIN input voltage is 5 times of the maximum value of V5 (to be compared).
3. V5 (voltage to be compared) is compared with V3 (second amplified voltage) and V4 (first amplified voltage) respectively to obtain V6 (first control signal) and V7 (second control signal). When V3< V5, V6 is high, V3> V5, V6 is low; when V4> V5, V7 is high, and when V4< V5, V7 is low.
4. The V8 (third control signal) is calculated by V6 (first control signal) and V7 (second control signal). When V6 is high and V7 is low, V8 is high; when V6 is low and V7 is high, V8 is low; when both V6 and V7 are low, V8 maintains the previous level state. SD is a shutdown signal and may be provided externally. In the figure, SD is high before 1500ms, and SD is low after 1500 ms.
5. The relationship between the driving control signal V9, the PMOS transistor drain voltage V10 and the VIN input voltage terminal voltage is shown. Before 1500ms, when the voltage at the VIN input voltage gradually rises from 0V to about 15V (chip on voltage), V9 (driving control signal) starts to change from low level to high level, V10 is equal to the voltage at the VIN input voltage, and M2 is turned on; when the voltage at the VIN input voltage gradually decreases from 20V to about 12V (chip off voltage), V9 changes from high to low, V10 decreases from the voltage at the VIN input voltage to 0V, and M2 turns off. After 1500ms, since the SD signal is low, V9 remains low all the time, resulting in V10 being 0V all the time, and M2 remains off.
The above description is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and embellishments within the scope of the invention may occur to those skilled in the art without departing from the principle of the invention, and are considered to be within the scope of the invention.

Claims (10)

1. An undervoltage shutdown output module, comprising: the device comprises a voltage setting module, a voltage amplifying module, a driving control signal generating module and an on-off control module;
the input end of the voltage setting module comprises a VCC input voltage end, and the output end of the voltage setting module is connected with the input end of the voltage amplifying module; the voltage setting module detects the RL voltage and the RW voltage and respectively outputs the RL voltage and the RW voltage to the voltage amplifying module;
the voltage amplification module generates a first amplification voltage and a second amplification voltage according to the first set amplification factor, wherein the first amplification voltage is obtained by amplifying the RL voltage by the first set amplification factor, and the second amplification voltage is obtained by amplifying the sum of the RL voltage and the RW voltage by the first set amplification factor; the output end of the voltage amplification module is connected with the drive control signal generation module, and the first amplification voltage and the second amplification voltage are respectively output to the drive control signal generation module through the output end of the voltage amplification module;
the output end of the drive control signal generation module is connected with the on-off control module, and the drive control signal generation module detects the voltage at the VIN input voltage end and the SD signal at the SD signal input end and outputs a drive control signal to the on-off control module; when the voltage of the VIN input voltage is lower than a set threshold of shutdown voltage or is higher than the set threshold of shutdown voltage from low to low and is lower than the set threshold of startup voltage, the driving control signal is at low level; when the voltage of the VIN input voltage end is higher than a set threshold value of the starting-up voltage or the voltage of the VIN input voltage end is reduced from high to lower than the set threshold value of the shutdown voltage, the driving control signal is consistent with the SD signal of the SD signal input end; the shutdown voltage setting threshold is the product of the first amplification voltage and the second setting amplification factor, and the startup voltage setting threshold is the product of the second amplification voltage and the second setting amplification factor;
the on-off control module receives the drive control signal, controls the external PMOS pipe of PGATE signal output end to turn off when the drive control signal is the low level, and controls the external PMOS pipe of PGATE signal output end to switch on when the drive control signal is the high level, thereby opening or closing the current path between system input end and the system output end.
2. The under-voltage shutdown output module according to claim 1, wherein the driving control signal generating module compares the voltage to be compared with the first amplified voltage and the second amplified voltage, generates the second control signal and the first control signal according to the comparison result, and generates the third control signal according to the first control signal and the second control signal; the voltage to be compared is VIN input voltage end voltage and is obtained by dividing voltage through internal resistors of the driving control signal generation module; when the voltage to be compared is less than or equal to the first amplification voltage, the first control signal and the third control signal are at a low level, and the second control signal is at a high level; when the voltage to be compared is increased from low to be greater than the first amplification voltage and less than the second amplification voltage, the first control signal, the second control signal and the third control signal are at low level; when the voltage to be compared is reduced from high to be larger than the first amplification voltage and smaller than the second amplification voltage, the first control signal and the second control signal are at low level, and the third control signal is at high level; when the voltage to be compared is greater than or equal to the second amplification voltage, the first control signal and the third control signal are at a high level, and the second control signal is at a low level; the third control signal and the SD signal generate a driving control signal through an AND gate.
3. The under-voltage shutdown output module of claim 1, wherein the voltage setting module comprises a current source IS1, a current source IS2, an operational amplifier OP1, an operational amplifier OP 2; the first end of IS1 and the first end of IS2 are respectively connected with a VCC input voltage end, the second end of IS1 IS connected with a RL voltage setting end, and the second end of IS2 IS connected with a RW voltage setting end; the non-inverting input end of the OP1 IS connected with the second end of the IS1, the inverting input end of the OP1 IS connected with the output end of the OP1, and the output end of the OP1 IS used as the first output end of the voltage setting module to output the RL voltage; the non-inverting input terminal of the OP2 IS connected to the second terminal of the IS2, the inverting input terminal of the OP2 IS connected to the output terminal of the OP2, and the output terminal of the OP2 serves as the second output terminal of the voltage setting module to output the RW voltage.
4. The under-voltage shutdown output module of claim 1, wherein the voltage amplification module comprises an operational amplifier OP3, an operational amplifier OP4, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9; the resistance values of the resistors satisfy the following relation: r5= R6=2 × R7, R9/R8=4 × R4/R3) + 3; a positive phase input end of the OP3 receives the RL voltage output by the voltage setting module, an inverted phase input end of the OP3 is respectively connected with a first end of R3 and a first end of R4, a second end of R3 is connected with a GND end, a second end of R4 is connected with an output end of the OP3, and an output end of the OP3 serves as a first output end of the voltage amplification module to output a first amplified voltage; the positive phase input end of the OP4 is respectively connected with the second ends of the R5 and the R6, the first end of the R5 receives the RL voltage output by the voltage setting module, the first end of the R6 receives the RW voltage output by the voltage setting module, the first end of the R7 is connected with the second ends of the R5 and the R6, the second end of the R7 is connected with the GND end, the negative phase input end of the OP4 is respectively connected with the first ends of the R8 and the R9, the second end of the R8 is connected with the GND end, the second end of the R9 is connected with the output end of the OP4, and the output end of the OP4 serves as the second output end of the voltage amplifying module to output the second amplified voltage.
5. The under-voltage shutdown output module of claim 4, wherein the first set amplification is R4/R3+ 1.
6. The undervoltage shutdown output module according to claim 1, wherein the driving control signal generating module comprises a comparator COMP1, a comparator COMP2, an RS flip-flop, an AND gate AND1, a resistor R10, AND a resistor R11; a first end of R10 is connected with a VIN input voltage end, and a second end of R10 is respectively connected with a non-inverting input end of COMP1 and an inverting input end of COMP 2; a first end of R11 is connected with an inverting input end of COMP2, and a second end of R11 is connected with a GND end; an inverting input end of the COMP1 receives the second amplified voltage, and an output end of the COMP1 is connected with an S input end of the RS trigger; a positive phase input end of the COMP2 receives the first amplified voltage, and an output end of the COMP2 is connected with an R input end of the RS trigger; the Q output end of the RS trigger is connected with a first input end of an AND gate AND1, a second input end of an AND gate AND1 is connected with the SD signal input end, AND the output end of the AND gate AND1 is used as the output end of the drive control signal generation module to output a drive control signal.
7. The under-voltage shutdown output module of claim 6, wherein the second set amplification is R10/R11+ 1.
8. The under-voltage turn-off output module of claim 1, wherein the on-off control module comprises an NMOS transistor M1, a resistor R12, a resistor R13, and a voltage regulator DZ1, wherein a gate of the M1 is used as an input terminal of the on-off control module to receive the driving control signal, a source of the M1 is connected to the GND terminal, and a drain of the M1 is connected to the second terminal of the R13; a first terminal of R12 is connected to the VIN input voltage terminal, and a second terminal of R12 is connected to the first terminal of R13; the cathode of the DZ1 is connected with the VIN input voltage end, and the anode of the DZ1 is connected with the first end of the R13; the first end of the R13 is connected with the PGATE signal output end to control the conduction or the disconnection of a PMOS tube externally connected with the PGATE signal output end.
9. A BOOST power supply chip is characterized by comprising a voltage stabilizing source and reference voltage source module, an error amplification module, a frequency compensation module, an oscillator and slope compensation module, a power tube driving module, a power tube and the undervoltage turn-off output module according to any one of claims 1 to 8, and further comprising an RL voltage setting end, an RW voltage setting end, a VIN input voltage end, a PGATE signal output end, an SD signal input end, a GND end, an SW power output end and an FB voltage feedback end; the first end of the voltage stabilizing source and reference voltage source module is connected with a VIN input voltage end, the second end of the voltage stabilizing source and reference voltage source module is connected with a VCC input voltage end to provide an internal power supply voltage VCC for the chip, and the third end of the voltage stabilizing source and reference voltage source module is connected with a VREF signal end to provide an internal reference voltage VREF for the chip; the reverse phase input end of the error amplification module is connected with the FB voltage feedback end, the normal phase input end of the error amplification module is connected with the VREF signal end, and the output end of the error amplification module is respectively connected with the frequency compensation module, the oscillator and the slope compensation module; the first end of the power tube driving module is connected with the oscillator and the slope compensation module and receives PWM signals output by the oscillator and the slope compensation module, and the second end of the power tube driving module is connected with the first end of the power tube and outputs power tube driving signals; the second end of the power tube is connected with the SW power output end, and the third end of the power tube is connected with the GND end.
10. A BOOST BOOST power supply system is characterized by comprising a first setting resistor, a second setting resistor, a PMOS tube, an energy storage inductor, a Schottky diode and the BOOST power supply chip as claimed in claim 9; the first end of the first setting resistor is connected with the RL voltage setting end, and the second end of the first setting resistor is connected with the GND end; the first end of the second setting resistor is connected with the RW voltage setting end, and the second end of the second setting resistor is connected with the GND end; the grid electrode of the PMOS tube is connected with the PGATE signal output end, the source electrode of the PMOS tube is respectively connected with the power circuit and the VIN input voltage end, and the drain electrode of the PMOS tube is connected with the SW power output end through the energy storage inductor; the positive pole of the Schottky diode is connected with the SW power output end, and the negative pole of the Schottky diode is connected with the output circuit.
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