CN113224169B - 一种折叠栅氧化镓基场效应晶体管 - Google Patents
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Abstract
本发明属于功率半导体技术领域,涉及一种折叠栅氧化镓基场效应晶体管。本发明针对氧化镓材料P型掺杂困难且增强型器件难以兼顾低导通电阻的问题,提出一种兼具高阈值电压和低导通电阻的横向增强型氧化镓场效应晶体管。利用金属与氧化镓的功函数差将鳍型导电沟道夹断,从而实现关断和高耐压,获得低泄漏电流及硬雪崩击穿特性;当栅压高于阈值电压,鳍型导电沟道侧壁形成电子积累层且折叠栅结构增加沟道密度,导通电阻大大降低。本发明的有益效果为,本发明的器件兼具高阈值电压和低导通电阻的优点且易于集成。
Description
技术领域
本发明属于功率半导体技术领域,涉及一种折叠栅氧化镓基场效应晶体管。
背景技术
氧化镓材料具有超宽禁带(Eg=4.5-4.9eV)和高击穿电场(8MV/cm),氧化镓基功率器件的Baliga优值为GaN的4倍、SiC的10倍以及Si的3444倍。因此,氧化镓有望成为高压、大功率、低损耗功率器件的优选材料,满足高功率密度、高转换效率及小型轻量化的电源***需求。
具有误开启自保护功能的增强型器件是电力电子***中的器件首要标配特性,也是器件实现低功率损耗的必要条件。由于氧化镓尚未实现有效的P型掺杂,氧化镓增强型MOSFET器件研制面临挑战。目前,横向增强型氧化镓MOSFET的实现主要是通过凹槽栅结构(参见文献Kelson D.Chabak,et al.,Recessed-Gate Enhancement-Modeβ-Ga2O3 MOSFETs,IEEE Electron Device Letters,vol.39,no.1,pp.67-70,2018),该结构使氧化镓MOSFET的阈值电压达到4V,其基本思想是降低沟道有效载流子浓度,但使导通电阻大幅提高,难以实现低功率损耗的目的。为了在实现增强型的同时改善沟道电阻,有研究者提出具有鳍栅结构的垂直增强型氧化镓MOSFET(Zongyang Hu,et al.,1.6kV Vertical Ga2O3 FinFETsWith Source Connected Field Plates and Normally-off Operation,IEEE ISPSD2019,pp.483-486),通过利用鳍栅两侧MIS(Metal-Insulator-Semiconductor)结构的耗尽作用夹断沟道,实现高达4V的阈值电压,当器件导通时,鳍栅侧壁形成电子积累层,构成低阻通道,有助于实现较低的导通电阻。然而,相较于横向功率器件,纵向功率器件与工艺的兼容性较差,不易于集成。因此,如何同时实现横向增强型氧化镓MOSFET的高阈值电压和低导通电阻成为目前亟待解决的关键问题之一。
发明内容
本发明针对上述存在的问题,提出一种折叠栅氧化镓基场效应晶体管,不但兼具高阈值电压和低导通电阻,而且作为横向器件,易于集成且不大幅增加工艺复杂度。
本发明的技术方案为:
一种折叠栅氧化镓基场效应晶体管,包括衬底层1、位于衬底层1上表面的缓冲层2、位于缓冲层2上表面的外延层3;沿器件横向方向,所述外延层3上部的一端具有源区4,另一端具有漏区5,所述源区4上表面部分覆盖源极金属6,所述漏区5上表面部分覆盖漏极金属7;所述源区4和漏区5之间的外延层3中具有栅区,所述栅区不与源区4和漏区5相接触,其特征在于,沿器件纵向方向,所述栅区由两个或两个以上深度相同且等间距排列的槽型区构成,所述槽型区的槽壁、槽底和槽型区之间的外延层3上表面覆盖有栅介质层9,所述栅介质层9上表面覆盖栅极金属8且栅极金属8填充所述槽型区;所述栅极金属8和源极金属6之间、漏极金属7之间具有钝化介质层10;器件纵向方向是指同时垂直于器件横向方向和器件水平方向的第三维度方向。
进一步的,所述源极金属6顶部向漏极金属7方向延伸,部分覆盖钝化介质层10并终止于栅极金属8和漏极金属7之间的钝化介质层10上表面,且不与栅极金属8和漏极金属7接触。
进一步的,所述栅极金属8顶部向漏极金属7方向延伸且不与漏极金属7相接触,所述栅极金属8的延伸部分和外延层3之间具有钝化介质层10。
进一步的,所述栅区和漏区5之间的外延层3掺杂浓度从靠近栅区一侧到靠近漏区5一侧逐渐增加。
本发明的有益效果为,本发明的器件兼具高阈值电压和低导通电阻的优点。
附图说明
图1是本发明实施例1的结构示意图;
图2是带有辅助线的本发明实施例1的结构示意图;
图3是实施例1中沿A1A2线的截面图;
图4是实施例1中沿B1B2线的截面图;
图5是实施例1中沿C1C2线的截面图;
图6是实施例1中沿D1D2线的截面图;
图7是本发明实施例2的结构示意图;
图8是本发明实施例3的结构示意图;
图9是本发明实施例4的结构示意图。
具体实施方式
下面结合附图和实施例,详细描述本发明的技术方案:
如图中所示的三维坐标系,与本发明中的描述相对应的关系是:本发明中所述的横向方向对应x轴方向,垂直方向对应y轴方向,纵向方向对应z轴方向。
实施例1:
如图1所示,包括衬底层1、位于衬底层1上表面的缓冲层2、位于缓冲层2上表面的外延层3;沿器件横向方向,所述外延层3上部的一端具有源区4,另一端具有漏区5,所述源区4上表面部分覆盖源极金属6,所述漏区5上表面部分覆盖漏极金属7;所述源区4和漏区5之间的外延层3中具有栅区,所述栅区不与源区4和漏区5相接触,其特征在于,沿器件纵向方向,所述栅区由两个或两个以上深度相同且等间距排列的槽型区构成,所述槽型区的槽壁、槽底和槽型区之间的外延层3上表面覆盖有栅介质层9,所述栅介质层9上表面覆盖栅极金属8且栅极金属8填充所述槽型区;所述栅极金属8和源极金属6之间、漏极金属7之间具有钝化介质层10。
本例的工作原理为:
本发明提出的一种折叠栅氧化镓基场效应晶体管,通过形成鳍型沟道区,在鳍两侧构建MIS结构,栅压为0V时,利用金属与氧化镓的功函数差将鳍型导电沟道夹断,从而实现关断和高耐压,获得低泄漏电流及硬雪崩击穿特性;当栅压高于阈值电压,沟道开启并且在侧壁形成电子积累层,构成低阻通道以减小导通电阻;折叠栅结构增加了沟道密度,使得器件沟道电阻减小,导通电阻大大降低。本发明的器件解决了氧化镓无法实现P型掺杂形成传统导电沟道的难题,同时提高了器件栅控能力和跨导,而且MIS结构降低了泄漏电流和关断功耗;通过选择栅极金属,可以调节阈值电压和输出电流能力。沿器件纵向方向可同时形成多个鳍型沟道区单元,便于制作大电流和大功率器件。因此,本发明的器件兼具高阈值电压和低导通电阻的优点且易于集成。
实施例2:
如图7所示,本实施例与实施例1的区别在于,源极金属6顶部向漏极金属7方向延伸,部分覆盖钝化介质层10并终止于栅极金属8和漏极金属7之间的钝化介质层10上表面,且不与栅极金属8和漏极金属7接触,形成源场板,调制电场分布,提高器件击穿电压。
实施例3:
如图8所示,本实施例与实施例1的区别在于,栅极金属8顶部向漏极金属7方向延伸且不与漏极金属7相接触,所述栅极金属8的延伸部分和外延层3之间具有钝化介质层10,形成延伸栅场板。在正向时,延伸栅场板下方的外延层表面形成电子积累层,进一步减小导通电阻;在反向时,延伸栅场板不但调制电场分布以提高器件击穿电压,而且具有辅助耗尽作用,可以增加器件外延层的掺杂浓度从而有助于降低器件的导通电阻。
实施例4:
如图9所示,本实施例与实施例1的区别在于,栅区和漏区5之间的外延层3掺杂浓度从靠近栅区一侧到靠近漏区5一侧逐渐增加。线性变化的掺杂浓度能够调制栅漏之间的电场分布,提高器件的击穿电压。
Claims (4)
1.一种折叠栅氧化镓基场效应晶体管,包括衬底层(1)、位于衬底层(1)上表面的缓冲层(2)、位于缓冲层(2)上表面的外延层(3);沿器件横向方向,所述外延层(3)上部的一端具有源区(4),另一端具有漏区(5),所述源区(4)上表面部分覆盖源极金属(6),所述漏区(5)上表面部分覆盖漏极金属(7);所述源区(4)和漏区(5)之间的外延层(3)中具有栅区,所述栅区不与源区(4)和漏区(5)相接触,其特征在于,沿器件纵向方向,所述栅区由两个或两个以上深度相同且等间距排列的槽型区构成,所述槽型区的槽壁、槽底和槽型区之间的外延层(3)上表面覆盖有栅介质层(9),所述栅介质层(9)上表面覆盖栅极金属(8)且栅极金属(8)填充所述槽型区;所述栅极金属(8)和源极金属(6)之间、漏极金属(7)之间具有钝化介质层(10);
所述槽型区的槽壁、槽底和槽型区之间的外延层(3)、栅介质层(9)和栅极金属(8)共同构成鳍型沟道区,所述鳍型沟道区的外延层(3)、栅介质层(9)和栅极金属(8)在鳍两侧构建MIS结构,在栅压为零时,利用金属与氧化镓半导体的功函数差将鳍型导电沟道夹断,从而实现关断,当栅压高于阈值电压,沟道开启并且在侧壁形成电子积累层,构成低阻通道以减小导通电阻。
2.根据权利要求1所述的一种折叠栅氧化镓基场效应晶体管,其特征在于,所述源极金属(6)顶部向漏极金属(7)方向延伸,部分覆盖钝化介质层(10)并终止于栅极金属(8)和漏极金属(7)之间的钝化介质层(10)上表面,且不与栅极金属(8)和漏极金属(7)接触。
3.根据权利要求1所述的一种折叠栅氧化镓基场效应晶体管,其特征在于,所述栅极金属(8)顶部向漏极金属(7)方向延伸且不与漏极金属(7)相接触,所述栅极金属(8)的延伸部分和外延层(3)之间具有钝化介质层(10)。
4.根据权利要求1所述的一种折叠栅氧化镓基场效应晶体管,其特征在于,所述栅区和漏区(5)之间的外延层(3)掺杂浓度从靠近栅区一侧到靠近漏区(5)一侧逐渐增加。
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