CN113192982A - Array substrate of organic light emitting display device and preparation method thereof - Google Patents
Array substrate of organic light emitting display device and preparation method thereof Download PDFInfo
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- CN113192982A CN113192982A CN202110401379.7A CN202110401379A CN113192982A CN 113192982 A CN113192982 A CN 113192982A CN 202110401379 A CN202110401379 A CN 202110401379A CN 113192982 A CN113192982 A CN 113192982A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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Abstract
The embodiment of the application discloses an array substrate of an organic light-emitting display device and a preparation method thereof. The first metal layer comprises a first metal sub-layer and a second metal sub-layer. The first metal sublayer has stable chemical property, has the characteristics of corrosion resistance of polyimide and reflective metal etching solution and high temperature resistance, and has good conductivity. The surface of the second metal sublayer, which is close to the first insulating layer, has good adhesion, the phenomenon of mutual peeling of the film layers cannot occur, and the electric conductivity is good. Therefore, the first metal layer is used as the bonding metal, and external signals can be transmitted into the array substrate through the second metal layer. And the first metal layer is formed on the first part of the thin film transistor area and the second part of the pad area through a photomask manufacturing process, so that a photomask can be saved, and the effect of reducing the cost is achieved.
Description
Technical Field
The present disclosure relates to the field of display, and particularly, to an array substrate of an organic light emitting display device and a method for manufacturing the same.
Background
At present, in a large-sized organic light emitting display, in order to reduce the wiring impedance, the back plate generally uses copper as the metal wiring. In a top gate thin film transistor, a Light Shielding (LS) layer and a source drain layer, which are far apart from each other in a vertical direction, are generally used as metal wirings for signal transmission, and a gate layer is not used as a wiring.
Among them, in a top-emission large-sized organic light emitting display, the back plate generally employs a laminated film layer of a reflective metal layer and indium tin oxide. The material of the reflective metal layer is generally silver or aluminum, but other reflective metals with higher reflectivity may be used as the material of the reflective metal layer. However, firstly, the copper used for the metal wiring has poor stability, is easily oxidized when exposed to the external environment, and the etching solution for the reflective metal severely corrodes the copper; secondly, the stability of the reflective metal layer is also poor. Therefore, neither the metal trace nor the anode can meet the reliability requirements of the pad area pins.
Therefore, a conventional panel manufacturer generally manufactures a pin layer on the source/drain layer, the pin layer is made of a metal or an oxide resistant to aluminic acid or silver acid, and the pin layer is made of a material with stable chemical properties. However, this adds a mask process, thereby increasing the cost.
Therefore, how to manufacture the lead layer meeting the reliability requirement of the lead in the pad area without increasing the cost is a difficult problem for the existing panel manufacturers to try to overcome.
Disclosure of Invention
The embodiment of the application provides an array substrate of an organic light-emitting display device and a preparation method thereof, which can solve the technical problem that the conventional organic light-emitting display panel cannot manufacture a pin layer meeting the reliability requirement of a pad area pin on the premise of not increasing the cost.
The embodiment of the application provides an array substrate of an organic light emitting display device, which comprises a thin film transistor region and a pad region, wherein the array substrate of the organic light emitting display device comprises:
a substrate layer comprising a first side and a second side disposed opposite one another;
a first insulating layer disposed on the first face;
the first metal layer comprises a first metal sub-layer and a second metal sub-layer, wherein the first metal sub-layer is arranged on one surface, far away from the substrate layer, of the first insulating layer, the second metal sub-layer is arranged on one surface, far away from the substrate layer, of the first metal sub-layer, and the first metal layer is partially positioned in the pad area;
the interlayer insulating layer is arranged on one surface, far away from the substrate layer, of the first metal layer, covers the first metal layer, is provided with a first through hole, and penetrates through the interlayer insulating layer;
the second metal layer is arranged on one surface, far away from the substrate layer, of the interlayer insulating layer and is connected with the first metal layer through the first through hole, and the second metal layer is partially positioned in the pad area;
the second insulating layer is arranged on one surface, far away from the substrate layer, of the second metal layer and covers the second metal layer, a second through hole is formed in the second insulating layer and penetrates through the second insulating layer and the interlayer insulating layer in sequence, and therefore the first metal layer is exposed.
Optionally, in some embodiments of the present application, the first metal layer further includes a third metal sublayer, and the third metal sublayer is disposed between the first metal sublayer and the second metal sublayer.
Optionally, in some embodiments of the present application, the first metal layer further includes an adhesive layer, and the adhesive layer is disposed on a side of the first metal sub-layer close to the first insulating layer.
Optionally, in some embodiments of the present application, the second metal layer includes a fourth metal sublayer and a fifth metal sublayer, the fourth metal sublayer is disposed on the interlayer insulating layer is far away from the one surface of the substrate layer, and the fifth metal sublayer is disposed on the fourth metal sublayer is far away from the one surface of the substrate layer.
Optionally, in some embodiments of the present application, the first insulating layer includes a gate insulating layer and a support layer, the gate insulating layer is located in the thin film transistor region, the support layer is located in the pad region, the gate insulating layer is disposed on the first surface, and the support layer is disposed on the first surface.
Optionally, in some embodiments of the present application, the first metal layer includes a first portion and a second portion that are disposed at an interval, the first portion is located in the thin film transistor region, the second portion is located in the pad region, the first portion is located on a side of the gate insulating layer away from the substrate layer, and the second portion is located on a side of the support layer away from the substrate layer.
Optionally, in some embodiments of the present application, a thickness of the gate insulating layer is equal to a thickness of the support layer, and a thickness of the first portion is equal to a thickness of the second portion.
Optionally, in some embodiments of the present application, the material of the pixel light emitting layer is an organic small molecule light emitting material, and the thickness of the pixel light emitting layer is 20 nm to 50 nm.
Optionally, in some embodiments of the present application, the array substrate of the organic light emitting display device further includes a flat layer, a first retaining wall and a second retaining wall, wherein the flat layer is disposed on the second insulating layer, the first retaining wall is disposed on one side of the substrate layer, the flat layer is away from the one side of the substrate layer, the first retaining wall is close to one end of the second through hole, the one end of the second through hole extends to the second insulating layer, and covers the flat layer, and the second retaining wall is disposed on one side of the substrate layer away from the first retaining wall.
The embodiment of the application provides a preparation method of an array substrate of an organic light-emitting display device, wherein the array substrate of the organic light-emitting display device comprises a thin film transistor area and a pad area, and the preparation method comprises the following steps:
providing a substrate layer, wherein the substrate layer comprises a first side and a second side which are oppositely arranged;
forming a first insulating layer and a first metal layer on the first surface through a photomask, wherein the first metal layer comprises a first metal sub-layer and a second metal sub-layer, the first metal sub-layer is arranged on one surface, far away from the substrate layer, of the first insulating layer, the second metal sub-layer is arranged on one surface, far away from the substrate layer, of the first metal sub-layer, and the first metal layer is partially positioned in the pad area;
forming an interlayer insulating layer on the first metal layer, wherein the interlayer insulating layer covers the first metal layer, and forming a first through hole on the interlayer insulating layer, and the first through hole penetrates through the interlayer insulating layer;
forming a second metal layer on the interlayer insulating layer, wherein the second metal layer is connected with the first metal layer through the first through hole, and the second metal layer is partially positioned in the pad area;
and forming a second insulating layer on the second metal layer, wherein the second insulating layer covers the second metal layer, and a second through hole is formed in the second insulating layer and sequentially penetrates through the second insulating layer and the interlayer insulating layer so as to expose the first metal layer.
Optionally, in some embodiments of the present application, the step of forming the first insulating layer and the first metal layer on the first surface at a time may further include:
forming a first insulating layer on the first surface through an etching process;
and forming a first metal layer on the first insulating layer through an etching process.
In the array substrate of the organic light emitting display device and the preparation method thereof provided by the embodiment of the application, the first metal layer is exposed and comprises a first metal sub-layer and a second metal sub-layer, the first metal sub-layer is connected with the first insulating layer, and the second metal sub-layer is connected with the second metal layer. The first metal sublayer has stable chemical property, the characteristics of corrosion resistance of polyimide and reflective metal etching solution and high temperature resistance, and good conductivity. The surface of the second metal sublayer, which is close to the first insulating layer, has good adhesion, the phenomenon of mutual peeling of the film layers cannot occur, and the electric conductivity is good. Therefore, the first metal layer is used as the bonding metal, and external signals can be transmitted into the array substrate through the second metal layer. The first metal layer is formed on the first part of the thin film transistor area and the second part of the pad area through a photomask manufacturing process, so that a photomask can be saved. Therefore, the second part of the first metal layer is used as the pin layer, so that the reliability requirement of the pin layer can be met, and the cost can be saved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic view of a first structure of an array substrate of an organic light emitting display device provided in an embodiment of the present application.
Fig. 2 is a schematic view of a second structure of an array substrate of an organic light emitting display device according to an embodiment of the present disclosure.
Fig. 3 is a schematic diagram of a third structure of an array substrate of an organic light emitting display device according to an embodiment of the present application.
Fig. 4 is a schematic diagram of a fourth structure of an array substrate of an organic light emitting display device according to an embodiment of the present application.
Fig. 5 is a schematic diagram of a fifth structure of an array substrate of an organic light emitting display device according to an embodiment of the present application.
Fig. 6 is a schematic diagram of a sixth structure of an array substrate of an organic light emitting display device according to an embodiment of the present application.
Fig. 7 is a schematic diagram of a seventh structure of an array substrate of an organic light emitting display device according to an embodiment of the present application.
Fig. 8 is a first flowchart illustrating a method for manufacturing an array substrate of an organic light emitting display device according to an embodiment of the present disclosure.
Fig. 9 is a second flowchart illustrating a method for manufacturing an array substrate of an organic light emitting display device according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "length," "width," "thickness," "upper," "lower," and the like, as used herein, refer to an orientation or positional relationship as shown in the drawings, which is used for convenience in describing the present application and to simplify the description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be taken as limiting the present application. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between.
The embodiment of the application provides an array substrate of an organic light-emitting display device and a preparation method thereof. The following are detailed below. It should be noted that the following description of the embodiments is not intended to limit the preferred order of the embodiments.
Specifically, referring to fig. 1, fig. 1 is a schematic view of a first structure of an array substrate 10 of an organic light emitting display device provided in an embodiment of the present application, where the array substrate 10 of the organic light emitting display device provided in the embodiment of the present application includes a thin film transistor region 10a and a pad region 10b, and the array substrate 10 of the organic light emitting display device includes a substrate layer 101, a first insulating layer 102, a first metal layer 103, an interlayer insulating layer 104, a second metal layer 105, and a second insulating layer 106.
The substrate layer 101 includes a first side 101a and a second side 101b, which are oppositely disposed. The first insulating layer 102 is disposed on the first face 101 a. The first metal layer 103 includes a first metal sublayer 1031 and a second metal sublayer 1032. The first metal sublayer 1031 is disposed on a side of the first insulating layer 102 away from the substrate layer 101, the second metal sublayer 1032 is disposed on a side of the first metal sublayer 1031 away from the substrate layer 101, and the first metal layer 103 is partially located in the pad region 10 b.
The interlayer insulating layer 104 is disposed on a surface of the first metal layer 103 away from the substrate layer 101, and covers the first metal layer 103, and a first through hole 104a is disposed on the interlayer insulating layer 104, and the first through hole 104a penetrates through the interlayer insulating layer 104. The second metal layer 105 is disposed on a surface of the interlayer insulating layer 104 away from the substrate layer 101, and is connected to the first metal layer 103 through the first via hole 104a, and the second metal layer 105 is partially located in the pad region 10 b. The second insulating layer 106 is disposed on a surface of the second metal layer 105 away from the substrate layer 101, and covers the second metal layer 105, a second through hole 106a is disposed on the second insulating layer 106, and the second through hole 106a sequentially penetrates through the second insulating layer 106 and the interlayer insulating layer 104, so as to expose the first metal layer 103.
In one embodiment, the material of the first metal sublayer 1031 is molybdenum-titanium alloy or titanium, and the material of the second metal sublayer 1032 is molybdenum-titanium alloy or titanium. The specific materials of the first metal sublayer 1031 and the second metal sublayer 1032 are determined by the specific process requirements of the array substrate 10 of the organic light emitting display device.
Among them, molybdenum has a melting point of 2996 degrees and a boiling point of 5325 to 5525 degrees, and thus has excellent heat resistance. Second, the molybdenum has a half-discarded state of electrons in the five 4d orbitals in the second outer layer and in the 5s orbit in the outermost layer, and therefore, it is very difficult to discard seven or eight electrons from the molybdenum. Therefore, molybdenum has relatively stable chemical properties and has the characteristics of corrosion resistance to polyimide and reflective metal etching solutions. Thirdly, the resistivity of molybdenum is 5.17 x 10 under the environment of 0 degree-10Ohm cm; the resistivity of the molybdenum is 24.6 multiplied by 10 under the environment of 800 DEG C-10Ohm (a)Centimeters; the resistivity of the molybdenum is 72 multiplied by 10 under the environment of 2400 DEG-10Ohm cm; thus, molybdenum has good conductivity. Fourthly, the molybdenum has good adhesion. The molybdenum-titanium alloy is an alloy formed by adding a small amount of titanium element into molybdenum. The properties of molybdenum-titanium alloys are similar to those of molybdenum. Therefore, the molybdenum-titanium alloy also has good heat resistance, polyimide resistance, corrosion resistance to reflective metal etching solution, conductivity and adhesion.
It should be noted that, since the second metal sub-layer 1032 is exposed in the external environment, the second metal layer 105 is formed by an etching process after the second metal sub-layer 1032 is formed. Therefore, the second metal sub-layer 1032 is required to have characteristics of corrosion resistance against polyimide and reflective metal etching solutions and good heat resistance. The first metal sublayer 1031 is in contact with the first insulating layer 102, because the first metal sublayer 1031 needs to have good adhesion to prevent the films from peeling off from each other. In addition, the first metal layer 103 is used for transmitting an external signal to the inside of the array substrate 10 of the organic light emitting display device through the second metal layer 105, and thus the first metal sub-layer 1031 and the second metal sub-layer 1032 need to have good conductivity.
The molybdenum-titanium alloy and the molybdenum have good heat resistance, polyimide resistance, corrosion resistance of reflective metal etching solution, conductivity and adhesion. Therefore, the material of the first metal sublayer 1031 may be molybdenum-titanium alloy or titanium, and the material of the second metal sublayer 1032 may also be molybdenum-titanium alloy or titanium.
In one embodiment, the thickness of the first metal sublayer 1031 is 100 to 600 angstroms, and specifically, the thickness of the first metal sublayer 1031 is 100, 150, 200, 280, 360, 480 or 600 angstroms, where the specific thickness of the first metal sublayer 1031 is set by specific process requirements of the array substrate 10.
In one embodiment, the thickness of the second metal sub-layer 1032 is 100 to 600 angstroms, and specifically, the thickness of the first metal sub-layer 1031 is 100, 150, 200, 280, 360, 480 or 600 angstroms, where the specific thickness of the second metal sub-layer 1032 is set by specific process requirements of the array substrate 10.
Wherein, in one embodiment, the material of the substrate layer 101 is glass.
Among other things, it should be noted that the substrate layer 101 needs to function as a support. Therefore, the substrate layer 101 needs to be made of a material having a relatively high hardness.
In one embodiment, the material of the first insulating layer 102 is silicon oxide, and specifically, the material of the first insulating layer 102 is SiO or SiO2. The specific material of the first insulating layer 102 is set by the specific process requirements of the array substrate 10 of the organic light emitting display device.
In one embodiment, the thickness of the first insulating layer 102 is 1000 a to 4000 a, and specifically, the thickness of the first insulating layer 102 is 1000 a, 1200 a, 1400 a, 1800 a, 2200 a, 2600 a, 3300 a, or 4000 a, where the specific thickness of the first insulating layer 102 is set by specific process requirements of the array substrate 10.
It should be noted that the first insulating layer 102 located in the pad region 10b may serve to pad up the first metal layer 103 located in the pad region 10b, so as to facilitate the first metal layer 103 located in the pad region 10b to access an external signal. In addition, the first insulating layer 102 may also function as an insulator.
In one embodiment, the material of the interlayer insulating layer 104 is silicon oxide, and specifically, the material of the interlayer insulating layer 104 is SiO or SiO2. The specific material of the interlayer insulating layer 104 is set by the specific process requirements of the array substrate 10 of the organic light emitting display device.
In one embodiment, the thickness of the interlayer insulating layer 104 is 2000 to 6000 angstroms, and specifically, the thickness of the interlayer insulating layer 104 is 2000 angstroms, 2500 angstroms, 3000 angstroms, 3600 angstroms, 4200 angstroms, 5000 angstroms or 6000 angstroms, wherein the specific thickness of the interlayer insulating layer 104 is set by specific process requirements of the array substrate 10.
Wherein, in one embodiment, the material of the second insulating layer 106 is silicon oxide or silicon nitride, specifically,the material of the second insulating layer 106 is SiO, SiO2Or Si3N4. Wherein, the specific material of the second insulating layer 106 is set by the specific process requirements of the array substrate 10 of the organic light emitting display device. The second insulating layer 106 may be a single-layer structure film or a multilayer structure film.
In one embodiment, the thickness of the second insulating layer 106 is 1000 a to 5000 a, and specifically, the thickness of the second insulating layer 106 is 1000 a, 1500 a, 2000 a, 2600 a, 3200 a, 4000 a or 5000 a, where the specific thickness of the second insulating layer 106 is set by specific process requirements of the array substrate 10.
Specifically, referring to fig. 2, fig. 2 is a second schematic structural diagram of an array substrate 10 of an organic light emitting display device according to an embodiment of the present disclosure, where the difference between the array substrate 10 of the organic light emitting display device provided in fig. 2 and the organic light emitting display device provided in fig. 1 is: the first insulating layer 102 includes a gate insulating layer 102a and a support layer 102b disposed at intervals. The gate insulating layer 102a is positioned in the thin film transistor region 10a, the support layer 102b is positioned in the pad region 10b, the gate insulating layer 102a is disposed on the first surface 101a, and the support layer 102b is disposed on the first surface 101 a. The first metal layer 103 includes a first portion 103a and a second portion 103b disposed at an interval. The first portion 103a is located in the thin film transistor region 10a, the second portion 103b is located in the pad region 10b, the first portion 103a is located on a side of the gate insulating layer 102a away from the substrate layer 101, and the second portion 103b is located on a side of the support layer 102b away from the substrate layer 101.
Wherein the thickness of the gate insulating layer 102a is equal to the thickness of the support layer 102b, and the thickness of the first portion 103a is equal to the thickness of the second portion 103 b.
Note that the first portion 103a of the first metal layer 103 is a gate layer of the array substrate 10 of the organic light emitting display device. Since the material and thickness of the first portion 103a and the second portion 103b are consistent, the first portion 103a and the second portion 103b of the first metal layer 103 can be formed simultaneously by a single masking process. Thereby saving a mask. The second portion 103b of the first metal layer 103 can also meet the reliability requirement of the lead layer, and can be used as a bonding metal to connect an external signal into the array substrate 10 of the organic light emitting display device through the second metal layer 105. Therefore, the technical problem that the conventional organic light-emitting display panel cannot manufacture a pin layer meeting the requirement of the reliability of the pins in the pad area on the premise of not increasing the cost can be solved.
It should be noted that the supporting layer 102b may function to elevate the second portion 103b, which is beneficial for the second portion 103b to access an external signal. In addition, the first insulating layer 102 may also function as an insulator.
Specifically, referring to fig. 3, fig. 3 is a schematic diagram of a third structure of an array substrate 10 of an organic light emitting display device according to an embodiment of the present disclosure, where the difference between the array substrate 10 of the organic light emitting display device provided in fig. 3 and the organic light emitting display device provided in fig. 2 is: the first metal layer 103 further comprises a third metal sublayer 1033, the third metal sublayer 1033 being between the first metal sublayer 1031 and the second metal sublayer 1032.
Note that, the first metal layer 103 needs to transmit an external signal to the inside of the array substrate 10 of the organic light emitting display device through the second metal layer 105. Therefore, it is necessary to have good conductivity. Since the third metal layer 1033 is located between the first metal sublayer 1031 and the second metal sublayer 1032, it is not necessary to have the characteristics of corrosion resistance to polyimide and reflective metal etching solutions and high temperature resistance. Therefore, a metal with better conductivity can be selected as the material of the third metal sublayer 1033. Thereby improving the conductivity of the first metal layer 103.
In one embodiment, the material of the third metal sub-layer 1033 is aluminum. Of course, other materials with better conductivity may be used for the third metal sublayer 1033.
In one embodiment, the thickness of the third metal sublayer 1033 is 3000 angstroms to 8000 angstroms, and specifically, the thickness of the third metal sublayer 1033 is 3000 angstroms, 3500 angstroms, 4000 angstroms, 5000 angstroms, 6000 angstroms, 7000 angstroms, or 8000 angstroms, where the specific thickness of the third metal sublayer 1033 is set by specific process requirements of the array substrate 10.
Specifically, referring to fig. 4, fig. 4 is a fourth schematic structural diagram of an array substrate 10 of an organic light emitting display device provided in the embodiment of the present application, and the difference between the array substrate 10 of the organic light emitting display device provided in fig. 4 and the organic light emitting display device provided in fig. 3 is that: the first metal layer 103 further includes an adhesive layer 1034, and the adhesive layer 1034 is disposed on a side of the first metal sublayer 1031 close to the first insulating layer 102.
Here, the adhesive layer 1034 is in contact with the first insulating layer 102. An adhesive layer 1034 with better adhesiveness is used as a film layer in contact with the first insulating layer 102. The effect of preventing the mutual stripping phenomenon between the film layers can be better achieved.
Specifically, referring to fig. 5, fig. 5 is a schematic diagram of a fifth structure of an array substrate 10 of an organic light emitting display device according to an embodiment of the present disclosure, where the difference between the array substrate 10 of the organic light emitting display device provided in fig. 5 and the organic light emitting display device provided in fig. 2 is: the second metal layer 105 includes a fourth metal sublayer 1051 and a fifth metal sublayer 1052, where the fourth metal sublayer 1051 is disposed on a side of the interlayer insulating layer 104 away from the substrate layer 101, and the fifth metal sublayer 1052 is disposed on a side of the fourth metal sublayer 1051 away from the substrate layer 101.
The fourth metal sublayer 1051 is made of molybdenum-titanium alloy, and the fourth metal sublayer 1051 is made of copper.
In one embodiment, the thickness of the fourth metal sublayer 1051 is 100 angstroms to 500 angstroms, specifically, the thickness of the fourth metal sublayer 1051 is 100 angstroms, 150 angstroms, 200 angstroms, 260 angstroms, 320 angstroms, 410 angstroms or 500 angstroms, where the specific thickness of the fourth metal sublayer 1051 is set by specific process requirements of the array substrate 10.
In one embodiment, the thickness of the fifth metal sub-layer 1052 is 3000 angstroms to 8000 angstroms, and specifically, the thickness of the fifth metal sub-layer 1052 is 3000 angstroms, 3500 angstroms, 4000 angstroms, 5000 angstroms, 6000 angstroms, 7000 angstroms or 8000 angstroms, where the specific thickness of the fifth metal sub-layer 1052 is set by specific process requirements of the array substrate 10.
Specifically, referring to fig. 6, fig. 6 is a sixth schematic structural diagram of an array substrate 10 of an organic light emitting display device according to an embodiment of the present disclosure, where the difference between the array substrate 10 of the organic light emitting display device provided in fig. 6 and the organic light emitting display device provided in fig. 2 is: the array substrate 10 of the organic light emitting display device further includes a planarization layer 107, a first barrier wall 108, and a second barrier wall 109. A planar layer 107 is provided on a side of the second insulating layer 106 remote from the substrate layer 101. The first retaining wall 108 is disposed on a surface of the flat layer 107 away from the substrate layer 101, and an end of the first retaining wall 108 close to the second through hole 106a extends onto the second insulating layer 106 and covers the flat layer 107. Second retaining walls 109 are disposed on a side of first retaining walls 108 remote from substrate layer 101.
The material of the planarization layer 107 is a photoresist-based organic photoresist material or an acrylic-based organic photoresist material.
In one embodiment, the thickness of the planarization layer 107 is 1.5 micrometers to 5 micrometers, and specifically, the thickness of the planarization layer 107 is 1.5 micrometers, 1.8 micrometers, 2.1 micrometers, 2.5 micrometers, 3 micrometers, 4 micrometers, or 5 micrometers, where the specific thickness of the planarization layer 107 is set by specific process requirements of the array substrate 10.
The material of the first retaining wall 108 is a photoresist-based hydrophilic organic photoresist material. The material of the second retaining wall 109 is a hydrophobic organic photoresist material.
In one embodiment, the thickness of the first retaining wall 108 is 0.4 to 1 micron, and specifically, the thickness of the first retaining wall 108 is 0.4 micron, 0.45 micron, 0.5 micron, 0.6 micron, 0.7 micron, 0.85 micron, or 1 micron, where the specific thickness of the first retaining wall 108 is set by specific process requirements of the array substrate 10.
In one embodiment, the thickness of the second retaining wall 109 is 0.5 to 1.5 micrometers, and specifically, the thickness of the second retaining wall 109 is 0.5 micrometers, 0.6 micrometers, 0.7 micrometers, 0.9 micrometers, 1.1 micrometers, 1.35 micrometers, or 1.5 micrometers, where the specific thickness of the second retaining wall 109 is set by specific process requirements of the array substrate 10.
Note that, the organic light-emitting layer is formed by an evaporation process. Therefore, the first retaining wall 108 is hydrophilic and the second retaining wall 109 is hydrophobic.
Specifically, referring to fig. 7, fig. 7 is a seventh schematic structural diagram of an array substrate 10 of an organic light emitting display device according to an embodiment of the present disclosure, where the difference between the array substrate 10 of the organic light emitting display device provided in fig. 7 and the organic light emitting display device provided in fig. 2 is: the array substrate 10 of the organic light emitting display device further includes a light-shielding layer 110, a buffer layer 111, a semiconductor layer 112, and an organic light emitting layer 113.
Here, the light-shielding layer 110 and the buffer layer 111 are provided between the underlayer 101 and the interlayer insulating layer 104. The light-shielding layer 110 is disposed on the first surface 101a, and the light-shielding layer 110 is located in the thin film transistor region 10 a. The buffer layer 111 is disposed on a surface of the light-shielding layer 110 away from the underlayer 101, and covers the light-shielding layer 110. The semiconductor layer 112 is disposed on a surface of the buffer layer 111 away from the substrate layer 101, the semiconductor layer 112 is located in the thin film transistor region 10a, and the gate insulating layer 102a is located on a surface of the semiconductor layer 112 away from the substrate layer 101.
The second metal layer 105 includes a third portion 105a, a fourth portion 105b, and a fifth portion 105c that are spaced apart. The third and fourth portions 105a and 105b are located in the thin film transistor region 10a, and the fifth portion 105c is located in the pad region 10 b. The interlayer insulating layer 104 is provided with third through holes 104b, fourth through holes 104c and fifth through holes 104d which are arranged at intervals, the third through holes 104b and the fourth through holes 104c penetrate through the interlayer insulating layer 104, and the fifth through holes 104d sequentially penetrate through the interlayer insulating layer 104 and the buffer layer 111. The third portion 105a of the second metal layer 105 is connected to one end of the semiconductor layer 112 through the third through hole 104b, one end of the fourth portion 105b of the second metal layer 105 is connected to the other end of the semiconductor layer 112 through the fourth through hole 104c, the other end of the fourth portion 105b of the second metal layer 105 is connected to the light-shielding layer 110 through the fifth through hole 104d, and the fifth portion 105c of the second metal layer 105 is connected to the first metal layer 103 through the first through hole 104 a.
An organic light-emitting layer 113 is disposed on a side of the planarization layer 107 remote from the substrate layer 101. The planarization layer 107 is provided with a sixth via hole 107a, and the sixth via hole 107a penetrates the planarization layer 107 and the second insulating layer 106 in this order. The organic light emitting layer 113 is connected to the fourth portion 105b of the second metal layer 105 through the sixth via 107 a. The second wall 109 is provided with a seventh through hole 109a, and the seventh through hole 109a is located in the thin film transistor region 10 a. The seventh through hole 109a sequentially includes the second bank 109 and the first bank 108 to expose the organic light emitting layer 113.
The light shielding layer 110 includes a first light shielding sublayer and a second light shielding sublayer, which are stacked, the first light shielding sublayer is disposed on the first surface 101a, and the second light shielding sublayer is disposed on a surface of the first light shielding sublayer away from the substrate layer 101.
The first shading sublayer is made of molybdenum-titanium alloy, and the second shading sublayer is made of copper.
In one embodiment, the thickness of the first light-shielding sublayer is 100 to 500 angstroms, and specifically, the thickness of the first light-shielding sublayer is 100 angstroms, 150 angstroms, 200 angstroms, 260 angstroms, 320 angstroms, 410 angstroms or 500 angstroms, where the specific thickness of the first light-shielding sublayer is set by specific process requirements of the array substrate 10.
In one embodiment, the thickness of the second light-shielding sublayer is 4000 a to 8000 a, and specifically, the thickness of the second light-shielding sublayer is 4000 a, 4500 a, 5000 a, 5700 a, 6400 a, 7200 a, or 8000 a, where the specific thickness of the second light-shielding sublayer is set by specific process requirements of the array substrate 10.
In one embodiment, the material of the buffer layer 111 is silicon oxide or silicon nitride, and specifically, the material of the second insulating layer 106 is SiO, SiO2Or Si3N4. The specific material of the buffer layer 111 is set by the specific process requirements of the array substrate 10 of the organic light emitting display device. The buffer layer 111 may be a single-layer structure film or a multilayer structure film.
In one embodiment, the thickness of the buffer layer 111 is 2000 to 5000 angstroms, and specifically, the thickness of the buffer layer 111 is 2000, 2500, 3000, 3600, 4200 or 5000 angstroms, where the specific thickness of the buffer layer 111 is set by the specific process requirements of the array substrate 10.
In the array substrate of the organic light-emitting display device, the first metal sublayer is stable in chemical property, has the characteristics of being resistant to corrosion of polyimide and reflective metal etching liquid and high temperature resistance, and is good in conductivity. The surface of the second metal sublayer, which is close to the first insulating layer, has good adhesion, the phenomenon of mutual peeling of the film layers cannot occur, and the electric conductivity is good. Therefore, the first metal layer is used as the bonding metal, and external signals can be transmitted into the array substrate through the second metal layer. The first metal layer is formed on the first part of the thin film transistor area and the second part of the pad area through a photomask manufacturing process, so that a photomask can be saved. Therefore, the second part of the first metal layer is used as the pin layer, so that the reliability requirement of the pin layer can be met, and the cost can be saved.
Specifically, referring to fig. 8, fig. 8 is a first flowchart illustrating a method for manufacturing an array substrate of an organic light emitting display device according to an embodiment of the present disclosure. The preparation method of the array substrate of the organic light-emitting display device provided by the embodiment of the application comprises the following steps:
201. a substrate layer is provided that includes oppositely disposed first and second sides.
202. And forming a first insulating layer and a first metal layer on the first surface through a one-time etching process, wherein the first metal layer comprises a first metal sub-layer and a second metal sub-layer, the first metal sub-layer is arranged on one surface, far away from the substrate layer, of the first insulating layer, the second metal sub-layer is arranged on one surface, far away from the substrate layer, of the first metal sub-layer, and the first metal layer is partially located in the pad area.
It should be noted that, by adjusting the etching process parameters, the first metal layer and the first insulating layer can be formed by one etching process.
It should be noted that, the etching process parameters need to be adjusted to increase the etching selectivity of the first metal sublayer, thereby preventing the second metal sublayer from being etched.
Note that, the etching process used for forming the first metal layer and the first insulating layer is a dry etching process.
203. Forming an interlayer insulating layer on the first metal layer, wherein the interlayer insulating layer covers the first metal layer, and forming a first through hole on the interlayer insulating layer, wherein the first through hole penetrates through the interlayer insulating layer.
204. And forming a second metal layer on the interlayer insulating layer, wherein the second metal layer is connected with the first metal layer through the first through hole, and the second metal layer is partially positioned in the pad area.
205. And forming a second insulating layer on the second metal layer, wherein the second insulating layer covers the second metal layer, and a second through hole is formed in the second insulating layer and sequentially penetrates through the second insulating layer and the interlayer insulating layer so as to expose the first metal layer.
Note that, the etching process used for forming the second insulating layer is a wet etching process.
Specifically, referring to fig. 9, fig. 9 is a second flowchart illustrating a method for manufacturing an array substrate of an organic light emitting display device according to an embodiment of the present disclosure. The preparation method of the array substrate of the organic light-emitting display device provided by the embodiment of the application comprises the following steps:
301. a substrate layer is provided that includes oppositely disposed first and second sides.
302. And forming a first insulating layer on the first surface through an etching process.
303. And forming a first metal layer on the first insulating layer through an etching process, wherein the first metal layer comprises a first metal sublayer and a second metal sublayer, the first metal sublayer is arranged on one surface, far away from the substrate layer, of the first insulating layer, the second metal sublayer is arranged on one surface, far away from the substrate layer, of the first metal sublayer, and the first metal layer is partially positioned in the pad area.
304. Forming an interlayer insulating layer on the first metal layer, wherein the interlayer insulating layer covers the first metal layer, and forming a first through hole on the interlayer insulating layer, wherein the first through hole penetrates through the interlayer insulating layer.
305. And forming a second metal layer on the interlayer insulating layer, wherein the second metal layer is connected with the first metal layer through the first through hole, and the second metal layer is partially positioned in the pad area.
306. And forming a second insulating layer on the second metal layer, wherein the second insulating layer covers the second metal layer, and a second through hole is formed in the second insulating layer and sequentially penetrates through the second insulating layer and the interlayer insulating layer so as to expose the first metal layer.
In the preparation method of the array substrate of the organic light-emitting display device, the first metal sublayer is stable in chemical property, has the characteristics of corrosion resistance of polyimide and reflective metal etching solution and high temperature resistance, and is good in conductivity. The surface of the second metal sublayer, which is close to the first insulating layer, has good adhesion, the phenomenon of mutual peeling of the film layers cannot occur, and the electric conductivity is good. Therefore, the first metal layer is used as the bonding metal, and external signals can be transmitted into the array substrate through the second metal layer. The first metal layer is formed on the first part of the thin film transistor area and the second part of the pad area through a photomask manufacturing process, so that a photomask can be saved. Therefore, the second part of the first metal layer is used as the pin layer, so that the reliability requirement of the pin layer can be met, and the cost can be saved.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The array substrate of the organic light emitting display device and the method for manufacturing the same provided by the embodiments of the present application are described in detail above, and the principles and embodiments of the present application are explained in the present application by applying specific examples, and the description of the embodiments above is only used to help understanding the technical solutions and the core ideas of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (11)
1. An array substrate of an organic light emitting display device, comprising a thin film transistor region and a pad region, the array substrate of the organic light emitting display device comprising:
a substrate layer comprising a first side and a second side disposed opposite one another;
a first insulating layer disposed on the first face;
the first metal layer comprises a first metal sub-layer and a second metal sub-layer, wherein the first metal sub-layer is arranged on one surface, far away from the substrate layer, of the first insulating layer, the second metal sub-layer is arranged on one surface, far away from the substrate layer, of the first metal sub-layer, and the first metal layer is partially positioned in the pad area;
the interlayer insulating layer is arranged on one surface, far away from the substrate layer, of the first metal layer, covers the first metal layer, is provided with a first through hole, and penetrates through the interlayer insulating layer;
the second metal layer is arranged on one surface, far away from the substrate layer, of the interlayer insulating layer and is connected with the first metal layer through the first through hole, and the second metal layer is partially positioned in the pad area;
the second insulating layer is arranged on one surface, far away from the substrate layer, of the second metal layer and covers the second metal layer, a second through hole is formed in the second insulating layer and penetrates through the second insulating layer and the interlayer insulating layer in sequence, and therefore the first metal layer is exposed.
2. The array substrate of an organic light emitting display device according to claim 1, wherein the first metal layer further comprises a third metal sublayer disposed between the first metal sublayer and the second metal sublayer.
3. The array substrate of an organic light emitting display device according to claim 2, wherein the first metal layer further comprises an adhesive layer disposed on a side of the first metal sub-layer adjacent to the first insulating layer.
4. The array substrate of the organic light-emitting display device according to claim 2, wherein the second metal layer comprises a fourth metal sub-layer and a fifth metal sub-layer, the fourth metal sub-layer is disposed on a surface of the interlayer insulating layer away from the substrate layer, and the fifth metal sub-layer is disposed on a surface of the fourth metal sub-layer away from the substrate layer.
5. The array substrate of an organic light emitting display device according to claim 2, wherein the first insulating layer comprises a gate insulating layer and a support layer, the gate insulating layer is disposed in the thin film transistor region, the support layer is disposed in the pad region, the gate insulating layer is disposed on the first surface, and the support layer is disposed on the first surface.
6. The array substrate of the organic light emitting display device according to claim 5, wherein the first metal layer comprises a first portion and a second portion, the first portion and the second portion are spaced apart, the first portion is located in the thin film transistor region, the second portion is located in the pad region, the first portion is located on a side of the gate insulating layer away from the substrate layer, and the second portion is located on a side of the support layer away from the substrate layer.
7. The array substrate of an organic light emitting display device according to claim 6, wherein a thickness of the gate insulating layer is equal to a thickness of the support layer, and a thickness of the first portion is equal to a thickness of the second portion.
8. The array substrate of the organic light emitting display device as claimed in claim 2, further comprising a flat layer, a first retaining wall and a second retaining wall, wherein the flat layer is disposed on a surface of the second insulating layer away from the substrate layer, the first retaining wall is disposed on a surface of the flat layer away from the substrate layer, one end of the first retaining wall close to the second through hole extends to the second insulating layer and covers the flat layer, and the second retaining wall is disposed on a surface of the first retaining wall away from the substrate layer.
9. The array substrate of an organic light emitting display device according to claim 4, wherein the first metal sub-layer is made of molybdenum-titanium alloy or titanium, the second metal sub-layer is made of molybdenum-titanium alloy or titanium, the third metal sub-layer is made of copper or aluminum, the fourth metal sub-layer is made of molybdenum-titanium alloy, and the fifth metal sub-layer is made of copper.
10. A preparation method of an array substrate of an organic light emitting display device, the array substrate of the organic light emitting display device comprising a thin film transistor region and a pad region, the preparation method comprising:
providing a substrate layer, wherein the substrate layer comprises a first side and a second side which are oppositely arranged;
forming a first insulating layer and a first metal layer on the first face through a one-time etching process, wherein the first metal layer comprises a first metal sub-layer and a second metal sub-layer, the first metal sub-layer is arranged on one face, far away from the substrate layer, of the first insulating layer, the second metal sub-layer is arranged on one face, far away from the substrate layer, of the first metal sub-layer, and the first metal layer is partially located in the pad area;
forming an interlayer insulating layer on the first metal layer, wherein the interlayer insulating layer covers the first metal layer, and forming a first through hole on the interlayer insulating layer, and the first through hole penetrates through the interlayer insulating layer;
forming a second metal layer on the interlayer insulating layer, wherein the second metal layer is connected with the first metal layer through the first through hole, and the second metal layer is partially positioned in the pad area;
and forming a second insulating layer on the second metal layer, wherein the second insulating layer covers the second metal layer, and a second through hole is formed in the second insulating layer and sequentially penetrates through the second insulating layer and the interlayer insulating layer so as to expose the first metal layer.
11. The method for manufacturing an array substrate of an organic light emitting display device according to claim 10, wherein the step of forming the first insulating layer and the first metal layer on the first surface through one etching process further comprises:
forming a first insulating layer on the first surface through an etching process;
and forming a first metal layer on the first insulating layer through an etching process.
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