CN113156839A - Electronic gear of servo system - Google Patents
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- CN113156839A CN113156839A CN202010075193.2A CN202010075193A CN113156839A CN 113156839 A CN113156839 A CN 113156839A CN 202010075193 A CN202010075193 A CN 202010075193A CN 113156839 A CN113156839 A CN 113156839A
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- G—PHYSICS
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
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Abstract
The invention discloses an electronic gear of a servo system, which comprises a pulse processing circuit module, a frequency division circuit module and an orthogonal sequence generation module; the pulse processing circuit module is used for receiving an encoder feedback signal fed back by the servo motor, wherein the encoder feedback signal is an increment pulse signal or an absolute value encoding signal, generating a direction signal and a first pulse signal, sending the first pulse signal to the frequency division circuit module, and sending the direction signal to the orthogonal sequence generation module; the frequency division circuit module is used for receiving the first pulse signal, dividing the frequency of the first pulse signal to generate a second pulse signal and sending the second pulse signal to the orthogonal sequence generation module; and the orthogonal sequence generation module is used for receiving the direction signal and the second pulse signal and generating an orthogonal pulse signal according to the signals. The electronic gear can be suitable for different encoder feedback signals, and adaptability is improved.
Description
Technical Field
The invention relates to the technical field of machine tool driving, in particular to an electronic gear of a servo system.
Background
The gear is an important basic part of the numerical control machine tool and has important influence on the machining efficiency and precision of the machine tool. The servo system electronic gear plays an important role in the processing quality and efficiency of the numerical control machine tool, the servo system electronic gear is used as a core technology of the high-performance numerical control machine tool, the control precision of the servo system electronic gear directly determines the performance of the numerical control machine tool, and the electronic gear which is high in efficiency, high in precision and adaptive has important application significance. However, the electronic gear of the existing servo system can only process encoder signals in a single form, and the general performance is not good.
Disclosure of Invention
The invention provides an electronic gear of a servo system, which can process different types of encoder signals and improve the adaptability of the electronic gear.
The technical means adopted by the invention are as follows:
a servo system electronic gear comprises a pulse processing circuit module, a frequency division circuit module and an orthogonal sequence generation module;
the pulse processing circuit module is used for receiving an encoder feedback signal fed back by the servo motor, wherein the encoder feedback signal is an increment pulse signal or an absolute value encoding signal, generating a direction signal and a first pulse signal, sending the first pulse signal to the frequency division circuit module, and sending the direction signal to the orthogonal sequence generation module;
the frequency division circuit module is used for receiving the first pulse signal, dividing the frequency of the first pulse signal to generate a second pulse signal and sending the second pulse signal to the orthogonal sequence generation module;
and the orthogonal sequence generation module is used for receiving the direction signal and the second pulse signal and generating an orthogonal pulse signal according to the signals.
Furthermore, the pulse processing circuit module comprises a signal interface module, an increment pulse signal processing module and an absolute value coding signal processing module;
the signal interface module comprises an increment encoder interface used for receiving the increment pulse signal and transmitting the increment pulse signal to the increment pulse signal processing module and an absolute value encoder interface used for receiving the absolute value encoding signal and transmitting the absolute value encoding signal to the absolute value encoding signal processing module;
the incremental pulse signal processing module is used for receiving and processing the incremental pulse signal to generate the direction signal and the first pulse signal;
and the absolute value coding signal processing module is used for receiving the absolute value pulse signal and processing the absolute value pulse signal to generate the direction signal and the first pulse signal.
Furthermore, the frequency division circuit module comprises a pulse signal interface, a transmission ratio signal interface and a frequency division processing module;
the pulse signal interface is used for receiving the first pulse signal and sending the first pulse signal to the frequency division processing module;
the transmission ratio signal interface is used for setting the transmission ratio of the electronic gear and sending the transmission ratio to the frequency division processing module;
the frequency division processing module is used for receiving the first pulse signal and the transmission ratio, performing frequency division processing on the first pulse signal to generate a second pulse signal, and sending the second pulse signal to the orthogonal sequence generating module.
Further, the orthogonal sequence generation module comprises a direction signal interface and a signal sequence generation module;
the direction signal interface is used for receiving the direction signal and transmitting the direction signal to the signal sequence generation module;
and the signal sequence generating module is used for receiving the direction signal and the second pulse signal and generating an orthogonal pulse signal according to the direction signal and the second pulse signal.
Compared with the prior art, the servo system electronic gear has the advantages that the pulse processing circuit module is arranged, so that the pulse processing circuit module can receive and process different types of encoder signals and generate orthogonal pulse signals, and the application range of the electronic gear is enlarged.
Drawings
FIG. 1 is a block diagram of an electronic gear application structure of a servo system disclosed by the invention;
FIG. 2 is a schematic diagram of a basic electronic gear module of the servo system disclosed in the present invention;
FIG. 3 is a block diagram of an electronic gear module of the servo system disclosed in the present invention;
FIG. 4 is a diagram of quadrature pulse signals;
FIG. 5 is a timing diagram of an incremental encoder pulse processing module.
In the figure: 1. the device comprises a pulse processing circuit module 2, a frequency division circuit module 3 and an orthogonal pulse generating module.
Detailed Description
As shown in fig. 1, the feedback of the servo motor encoder acting on the transmission mechanism can enter a servo system through an encoder interface 1 or an encoder interface 2, and if the fed encoder signal is in an orthogonal increment type, the feedback enters an FPGA module through a differential-to-single-ended circuit module; if the fed back coding signal is in an absolute value mode, the coding signal enters the FPGA module through the RS485 circuit module, and the FPGA module realizes the electronic gear function of the servo system disclosed by the invention; the numerical control system can set servo system parameters such as: the function of the encoder 1/2, encoder sampling period, encoder resolution, electronic gear ratio, etc.; the encoder signal after the hardware circuit processing enters into the servo system electronic gear module which takes the FPGA chip as the base body and is realized by adopting VHDL hardware programming language, generates orthogonal sequence pulse signal, passes through the single-ended to differential circuit module, enters into the encoder 1 or the encoder 2 (which encoder is used by the output of the orthogonal sequence pulse signal can be set by a numerical control system or servo debugging software), and then is transmitted to a numerical control system or other servo drivers for cooperative processing, so that the numerical control system knows the specific position of a processing tool, and the other servo drivers can make position instruction on the signal to realize the cooperative processing function.
Specifically, as shown in fig. 2 and fig. 3, the electronic gear of the servo system disclosed in the present invention includes a pulse processing circuit module, a frequency dividing circuit module, and an orthogonal sequence generating module;
the pulse processing circuit module 1 is used for receiving an encoder feedback signal fed back by the servo motor, wherein the encoder feedback signal is an incremental pulse signal or an absolute value encoding signal, generating a direction signal and a first pulse signal, sending the first pulse signal to the frequency division circuit module, and sending the direction signal to the orthogonal sequence generation module;
the frequency division circuit module 2 is used for receiving the first pulse signal, dividing the frequency of the first pulse signal to generate a second pulse signal and sending the second pulse signal to the orthogonal sequence generation module;
and the orthogonal sequence generation module 3 is used for receiving the direction signal and the second pulse signal and generating an orthogonal pulse signal according to the signals.
Specifically, in this embodiment, the pulse processing circuit module includes a signal interface module, an incremental pulse signal processing module, and an absolute value coding signal processing module;
the signal interface module comprises an increment encoder interface used for receiving the increment pulse signal and transmitting the increment pulse signal to the increment pulse signal processing module and an absolute value encoder interface used for receiving the absolute value encoding signal and transmitting the absolute value encoding signal to the absolute value encoding signal processing module;
specifically, the incremental encoder interface is a quadrature square wave a and square wave B pulse signal (as shown in fig. 4). The absolute encoder interface communicates the clock signal CLK and the encoder communication transmission signal Data for the encoder. In this embodiment, the encoder interface 1/2 may each support an incremental pulse signal and an absolute value encoded signal.
The incremental pulse signal processing module is used for receiving and processing the incremental pulse signal to generate the direction signal and the first pulse signal;
in this embodiment, the processing procedure of the incremental pulse signal processing module is as follows: the incremental pulse signal processing module receives the pulse A and the pulse B sent by the incremental encoder through an incremental encoder interface, and the processing process of the incremental pulse signal processing module comprises the following steps:
step 1: the FPGA collects pulse A and pulse B signals at the rising edge of a 100MHz clock, the two signals are latched in a register mode, signal synchronization is achieved, and a pulse signal A1 and a pulse signal B1 are generated.
Step 2: the rising edge of a 100MHz clock triggers and samples a Pulse signal A1 and a Pulse signal B1 generated in the previous step, if the rising edge or the falling edge occurs in the two signals, a Pulse signal Pulse4 with 100MHz clock width is generated, the Pulse signal Pulse4 is 4 times of the original orthogonal Pulse signal A/B, and the Pulse signal Pulse4 is a first Pulse signal; simultaneously comparing the sampled pulse signal A1 with the pulse signal B1, and if the phase of the pulse signal A1 leads 90 degrees relative to the phase of the pulse signal B1, outputting a direction dir signal value of 1 (the direction signal output is 1); when the phase of the pulse signal a1 lags behind the phase of the pulse signal B1 by 90 °, the output direction Dir signal value becomes 0 (direction signal output becomes 0), and as shown in fig. 5, a and B are output signals, a1 and B1 are signals after synchronous latching, a direction signal output by Dir, and a pulse signal output by plus.
And the absolute value coding signal processing module is used for receiving the absolute value pulse signal and processing the absolute value pulse signal to generate the direction signal and the first pulse signal.
The absolute value coding signal processing module comprises the following processing procedures: the absolute value coding signal processing module processes the received absolute value pulse signal through an absolute value coder interface, and the processing process comprises the following steps:
step 1: the numerical control system sets a coder position signal sampling period SmpTime and an absolute value coder Resolution through bus communication or servo debugging software through a debugging serial port; the sampling period SmpTime is based on the system 100MHz clock period of the FPGA, and if the sampling period SmpTime is 100, the sampling period SmpTime represents 100 system clock periods.
Step 2: calculating the expected output pulse number delta PosData in one sampling period SmpTime at the T momentTThe calculation formula is (1):
△PosDataT＝|PosDataT-PosDataT-1| (1)
wherein: PosDataTFor this sampling of absolute value encoder position data,
PosDataT-1absolute value encoder position data for the last sample;
and step 3: calculating a pulse accumulation comparison value delta Pluse by a formula (2);
△Pluse＝SmpTime/△PosDataT (2)；
and 4, accumulating 1 for the plus _ num at the rising edge of the 100MHz system clock of the FPGA every time, and if the accumulated value is plus _ num > delta plus, subtracting delta plus from the accumulated value plus _ num, and outputting a pulse plus signal with the width of the 100MHz system clock by the absolute value coding signal processing module.
And 5: comparing the absolute value encoder position values in two sampling periods to determine if PosDataT>PosDataT-1，
If the output direction signal dir value of the pulse processing module is 1 (namely, indicating that the motor is positively transmitting), PosDataT<PosDataT-1The pulse processing module outputs a direction signal dir with a value of 0 (i.e. indicating the motor is reversely rotating).
To illustrate the application, assume an encoder sampling period of 62.5us and a servo motor maximum speed of 6000 rpm. The sampling period SmpTime is 6250, the corresponding encoder line number is 100M × 60/6000 ═ 1M, and 2^19 ^ 524288, so that the highest encoder bit number which can be supported at the rotation speed is 19 bits. If the number of lines of the encoder which needs to be supported is increased, the maximum rotating speed of the motor needs to be correspondingly reduced.
The frequency division circuit module comprises a pulse signal interface, a transmission ratio signal interface and a frequency division processing module; the pulse signal interface is used for receiving the first pulse signal and sending the first pulse signal to the frequency division processing module; the transmission ratio signal interface is used for setting the transmission ratio of the electronic gear and sending the transmission ratio to the frequency division processing module; the frequency division processing module is used for receiving the first pulse signal and the transmission ratio, performing frequency division processing on the first pulse signal to generate a second pulse signal, and sending the second pulse signal to the orthogonal sequence generating module.
Specifically, the pulse signal interface receives a first pulse signal output by the pulse circuit processing module and transmits the first pulse signal to the frequency division processing module, and the transmission ratio signal interface transmits an electronic gear transmission ratio N/M (wherein, a pulse frequency division ratio numerator N and a pulse frequency division ratio denominator M, wherein N, M is a positive integer) set by a numerical control system or servo debugging software to the frequency division processing module.
The process of the frequency division processing module dividing the frequency of the first pulse signal is as follows,
step 1: and setting a pulse frequency division ratio numerator N and a pulse frequency division ratio denominator M by a numerical control system or servo debugging software, wherein N, M is a positive integer.
Step 2: the frequency division processing module acquires a first pulse signal at the rising edge of a system 100MHz clock, and if the first pulse signal has the rising edge, the frequency division pulse number Div _ num is accumulated by M, wherein M is the denominator of the pulse frequency division ratio; if the accumulated value is divided into the number of pulses Div _ num > and the pulse division ratio numerator N, the frequency division module outputs a pulse with the system clock width of 100MHz, the accumulated value Div _ num subtracts N, and when the rising edge of the input pulse Pluse appears next time, Div _ num accumulates the pulse division ratio denominator M again, so that the frequency division module outputs a second pulse signal with the division ratio K equal to N/M. As in the example of the frequency division process in table 1, the input pulse is 8, and the second pulse signal output with the frequency division ratio K being 8/3 is realized.
TABLE 1 example of the procedure at electronic Gear ratio 8/3
| Pulse input | Accumulated divided pulse number Div _ num | Frequency divided pulse output |
| 1 | 3 | 0 |
| 2 | 6 | 0 |
| 3 | 9-8 | 1 |
| 4 | 4 | 0 |
| 5 | 7 | 0 |
| 6 | 10-8 | 1 |
| 7 | 5 | 0 |
| 8 | 8-8 | 1 |
Further, the orthogonal sequence generation module comprises a direction signal interface and a signal sequence generation module;
the direction signal interface is used for receiving the direction signal and transmitting the direction signal to the signal sequence generation module; and the signal sequence generating module is used for receiving the direction signal and the second pulse signal and generating an orthogonal pulse signal according to the direction signal and the second pulse signal.
Specifically, the direction signal interface receives the direction signal and transmits the direction signal to the signal sequence generation module; the signal sequence generation module receives the direction signal and the second pulse signal and generates an orthogonal pulse signal according to the direction signal and the second pulse signal, and the signal sequence generation module has the following processing procedures:
step 1, collecting an input direction signal dir at the rising edge of a 100MHz system clock, and determining a generated orthogonal pulse sequence according to the value of the direction signal dir.
Step 2: if the value of the direction signal dir is 1, the system samples the input second pulse signal with a clock of 100MHz, the second pulse signal edge signal triggers the signal change of the trigger output pulse a and the trigger output pulse B, and the states are switched according to the cycle sequence of 10 → 11 → 01 → 00.
And step 3: if the value of the direction signal dir is 0, the system samples the input pulse signal second pulse signal with a clock of 100MHz, and the rising edge signal of the second pulse signal triggers the signal change of the trigger output pulse A and the trigger output pulse B, and the states are switched according to the cycle sequence of 00 → 01 → 11 → 10. And then generates an orthogonal pulse sequence form and sends the orthogonal pulse sequence form to a numerical control system or other servo drivers. For example, the servo system electronic gear can generate the actual moving position of the lead screw guide rail according to the received servo motor encoder signal and the set frequency division coefficient, and sends the actual moving position of the lead screw guide rail to a numerical control system or other servo drivers in the form of orthogonal pulses, and the numerical control system can know the moving position of the lead screw, so that the servo drivers can realize the double-drive function of the gantry machine tool.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.
Claims (4)
1. A servo electronic gear, comprising: the device comprises a pulse processing circuit module, a frequency division circuit module and an orthogonal sequence generation module;
the pulse processing circuit module is used for receiving an encoder feedback signal fed back by the servo motor, wherein the encoder feedback signal is an increment pulse signal or an absolute value encoding signal, generating a direction signal and a first pulse signal, sending the first pulse signal to the frequency division circuit module, and sending the direction signal to the orthogonal sequence generation module;
the frequency division circuit module is used for receiving the first pulse signal, dividing the frequency of the first pulse signal to generate a second pulse signal and sending the second pulse signal to the orthogonal sequence generation module;
and the orthogonal sequence generation module is used for receiving the direction signal and the second pulse signal and generating an orthogonal pulse signal according to the signals.
2. The servo electronic gear of claim 1, wherein: the pulse processing circuit module comprises a signal interface module, an increment pulse signal processing module and an absolute value coding signal processing module;
the signal interface module comprises an increment encoder interface used for receiving the increment pulse signal and transmitting the increment pulse signal to the increment pulse signal processing module and an absolute value encoder interface used for receiving the absolute value encoding signal and transmitting the absolute value encoding signal to the absolute value encoding signal processing module;
the incremental pulse signal processing module is used for receiving and processing the incremental pulse signal to generate the direction signal and the first pulse signal;
and the absolute value coding signal processing module is used for receiving the absolute value pulse signal and processing the absolute value pulse signal to generate the direction signal and the first pulse signal.
3. The servo electronic gear of claim 1, wherein: the frequency division circuit module comprises a pulse signal interface, a transmission ratio signal interface and a frequency division processing module;
the pulse signal interface is used for receiving the first pulse signal and sending the first pulse signal to the frequency division processing module;
the transmission ratio signal interface is used for setting the transmission ratio of the electronic gear and sending the transmission ratio to the frequency division processing module;
the frequency division processing module is used for receiving the first pulse signal and the transmission ratio, performing frequency division processing on the first pulse signal to generate a second pulse signal, and sending the second pulse signal to the orthogonal sequence generating module.
4. The servo electronic gear of claim 2, wherein: the orthogonal sequence generation module comprises a direction signal interface and a signal sequence generation module;
the direction signal interface is used for receiving the direction signal and transmitting the direction signal to the signal sequence generation module;
and the signal sequence generating module is used for receiving the direction signal and the second pulse signal and generating an orthogonal pulse signal according to the direction signal and the second pulse signal.
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| CN115864914A (en) * | 2023-02-17 | 2023-03-28 | 广州匠芯创科技有限公司 | Method, system, device and storage medium for frequency division output of arbitrary orthogonal pulse |
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