CN113091774A - Sine and cosine coding method based on absolute value encoder - Google Patents
Sine and cosine coding method based on absolute value encoder Download PDFInfo
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Abstract
The invention discloses a sine and cosine coding method based on an absolute value encoder, which comprises the following steps of S1: the absolute value encoder generates first signal data and transmits the first signal data to the main control chip; step S2: the absolute value encoder generates second signal data and transmits the second signal data to the main control chip to output an output signal including an a signal and a B signal. The sine and cosine coding method based on the absolute value encoder disclosed by the invention is operated by the absolute value encoder, C, D, R signals can be generated according to single-circle absolute value information, and a special C, D, R code channel and static grating alignment of a photocell are not required on a code disc.
Description
Technical Field
The invention belongs to the technical field of sine and cosine coding, and particularly relates to a sine and cosine coding method based on an absolute value encoder.
Background
With the development of automation technology, various position detection sensors are widely applied to position detection of motor control systems of numerical control machines, robots, elevators and the like, such as photoelectric pulse encoders, rotary transformers, sine and cosine encoders and the like.
Compared with sine and cosine encoders, the method has the unique advantage of improving the dynamic characteristics of the system. By subdividing sine and cosine signals, much higher resolution than the position information of a single pulse signal can be obtained, and the total resolution can be more than 18 bits. Such as ERN1387 by Heidenhain.
Particularly, the sine and cosine encoder can be used on an elevator control system to subdivide sine and cosine signals, so that the elevator can obtain position and speed information in real time no matter in the high-speed or low-speed process, the system has good control performance, and the carrying quality effect is better.
The sine-cosine rotary encoder outputs A, B, C, D, R (zero index, also called Z signal) signals so that the motor driver can use these signals to calculate the running position of the motor in real time and obtain position information. The A, B signal may typically be sub-divided interpolated to obtain higher resolution incremental angle information. C. D is a sine and cosine signal of one period per circle, is an absolute position signal which is relatively rough for A, B, and is used for resolving the C, D signal, so that absolute position information with a certain resolution in a single circle can be obtained, and current electric angle information can be obtained after the motor is powered on. The R signal (or Z signal) is a zero signal per turn, which facilitates rapid zero reference for A, B incremental signal counts during motion.
The A, B, C, D, R signal output by the traditional sine and cosine encoder is generated by carving corresponding code channels on corresponding code discs and matching with corresponding photocell chips. The static grating on the photocell and each track of the code wheel (i.e., the moving grating) must be properly aligned to ensure a reliable output of A, B, C, D, R, especially the R signal. Because the number of the R signal code channels is small and narrow, the corresponding light receiving area on the photocell is also narrow, and under the condition that the code channels and the light receiving area are not well matched, the amplitude of the R signal is seriously reduced and even lost when the encoder works at high temperature and high speed.
C. The D signal is generated by a light transmitting area which changes according to sine on the code disc, and when the photoelectric cell is actually assembled and adjusted, the light transmitting area needs to be aligned and matched with the static grating on the photoelectric cell. Under the change of temperature and rotating speed, the amplitude and bias of the C, D signal will also have certain drift under the influence of the temperature drift and frequency response characteristic of the electric signal of the photocell. In addition, once pollution occurs on C, D track in production and use, the angle calculation will have larger deviation, which affects the angle identification during power-on, and even causes the runaway fault.
The analog signal output by the sine and cosine encoder has strict requirements on amplitude, phase and offset, so that the traditional encoder needs to be externally connected to an oscilloscope for observation and adjustment during assembly and debugging. Because the number of signal paths is large, the quality requirement is high, the production efficiency is low, the outflow of defective products is easy to occur, and the use of a terminal user is influenced.
Disclosure of Invention
The invention mainly aims to provide a sine and cosine coding method based on an absolute value encoder, which is operated by the absolute value encoder, C, D, R signals can be generated according to single-turn absolute value information, a code disc does not need to be aligned with a special C, D, R code channel and a static grating of a photocell, the complex process of adjusting multi-path analog signals by using an oscilloscope is changed into the process of producing the absolute value encoder, and the absolute value encoder is provided with an intelligent control chip (such as a singlechip, a DSP, an FPGA and the like), so that the production process is mature, the automatic production can be conveniently carried out, and the signal amplitude and the bias can meet the signal quality requirement and be reliably output under the conditions of full temperature and working conditions.
The present invention provides a sine and cosine encoding method based on absolute value encoder, wherein the amplitude and offset of the output signal of the sine and cosine encoder are required, the amplitude adjustment and offset adjustment are performed on the output signal through an amplitude adjustment variable gain circuit and an offset adjustment variable offset circuit, and the phase difference of the a/B signal can be adjusted if necessary.
The main control chip monitors the precise code signal corresponding to the precise code channel, judges whether the current precise code signal has distortion and lost abnormal conditions, and outputs alarm information independently if the current precise code signal has distortion and lost abnormal conditions so that the main control chip can adjust in time.
In order to achieve the above object, the present invention provides a sine and cosine encoding method based on absolute value encoder, comprising the following steps:
step S1: an absolute value encoder (optical, magnetic, inductive and the like) generates first signal data and transmits the first signal data to the main control chip;
step S2: the absolute value encoder generates second signal data and transmits the second signal data to the main control chip to output an output signal including an A signal and a B signal;
step S3: the absolute position information of the single turn of the absolute encoder at this time is calculated by combining the first signal data and the second signal data, and the C signal, the D signal, and the R signal are constructed from the absolute position information of the single turn (including the simultaneous generation of the C signal, the D signal, and the R signal (defined as a first signal), the generation of only the C signal or the D signal or the R signal (defined as a second signal), and the generation of only the C signal + D signal or the C signal + R signal or the D signal + R signal (defined as a third signal)).
As a further preferable embodiment of the above technical means, step S1 is specifically implemented as the following steps:
step S1.1: the coarse code signal (corresponding to the first signal data and possibly after passing through the differential amplifier circuit) output by the coarse code channel is input into a main control chip (an ARM chip, for example, an ADC acquisition terminal) by the absolute value encoder to form an input coarse code signal.
As a further preferable embodiment of the above technical means, step S2 is specifically implemented as the following steps:
step S2.1: an absolute value encoder outputs a precise code signal (corresponding to second signal data) through a precise code channel, and the precise code signal is sequentially input into an ADC acquisition end of a main control chip (ARM chip) after passing through an amplitude adjustment variable gain circuit, a bias adjustment variable bias circuit and a second-stage fixed gain amplification circuit so as to form an input precise code signal;
step S2.2: simultaneously inputting an analog signal into a comparator input end (compare) of the main control chip and generating a square wave signal (used for feedback adjustment of amplitude and bias in the later period);
step S2.3: counting scribed lines of the fine code channel through an encoder interface mode of a main control chip, and setting a preset count value (assuming that the fine code channel is a 2048 scribed line, one circle of 2048 whole pulses and 8192 after quadruple frequency);
step S2.4: the main control chip monitors the fine code signal, compares the fine code signal with the amplitude, the phase and the offset of a target, generates an adjusting signal according to the comparison deviation and outputs the adjusting signal to the signal processing unit for adjustment.
As a further preferable embodiment of the above technical means, step S3 is specifically implemented as the following steps:
step S3.1: the single-turn absolute position information of the absolute encoder at the moment is calculated by combining the input coarse code signal and the input fine code signal;
step S3.2: the main control chip outputs a C signal and a D signal according to a certain time interval or position variation;
step S3.3: when the count value of a full-circle timer of the fine code signal corresponding to the fine code channel is a preset count value, the main control chip outputs an R signal.
As a further preferred embodiment of the above technical solution, step S3.2 is specifically implemented as the following steps:
step S3.2.1: the main control chip outputs single-circle absolute position information obtained by sampling and resolving corresponding time in a built-in DA (digital-to-analog) or PWM (pulse-width modulation) wave form according to a certain time interval or position variation, so that a first C signal (C-sin) and a first D signal (D-cos) are output;
step S3.2.2: the first C signal is subjected to differential amplification and filtering to form a second C signal (C-sin-and C-sin +, so that the anti-interference performance of transmission is improved);
step S3.2.3: the first D signal is differentially amplified and filtered to form a second D signal (D-cos-and D-cos +, which is used for improving the anti-interference performance of transmission).
As a further preferred embodiment of the above technical solution, step S3.3 is specifically implemented as the following steps:
step S3.3.1: when the count value of a whole-circle timer of a fine code signal corresponding to the fine code channel is a preset count value and the absolute value position is in a zero area at the moment, outputting a first R signal (the time width can be required to be one scribing pulse counting time of the fine code channel, and the specific time width is related to the rotating speed of a code disc);
step S3.3.2: the first R signal is differentially amplified and filtered to form a second R signal (R-and R + for improving the anti-interference performance of transmission).
As a further preferable technical solution of the above technical solution, the amplitude adjustment and the bias adjustment are performed on the output signal (on the basis of the second signal and the third signal) by the amplitude adjustment variable gain circuit and the bias adjustment variable bias circuit;
the main control chip collects sin signals and cos signals of the fine code channel, compares the sin signals and the cos signals with a target signal, and outputs an adjustment value so as to adjust the amplification factor of an operational amplifier (which can also be realized by a digital potentiometer or a DA device) of the amplitude adjustment variable gain circuit;
meanwhile, the main control chip calculates an offset value through the acquired signal, compares the offset value with a target offset, and outputs an adjustment value to adjust the offset;
the offset-adjusted signal passes through a differential amplification circuit to output an output signal including A signals (A sin-and A sin +) and B signals (B cos-and Bcos +).
As a further preferable technical solution of the above technical solution, the main control chip monitors the precise code signal corresponding to the precise code channel (based on the first signal, the second signal, and the third signal), determines whether the current precise code signal has distortion and a lost abnormal condition, and outputs alarm information separately if the current precise code signal has distortion and a lost abnormal condition (so that the main control chip can adjust in time).
Drawings
Fig. 1 is a schematic diagram of a sine and cosine encoding method based on an absolute value encoder according to the present invention.
Fig. 2 is a schematic diagram of a sine and cosine coding method based on an absolute value encoder according to the present invention.
Fig. 3 is a diagram illustrating A, B, C, D, R signals output by a conventional sin-cos encoder.
Detailed Description
The following description is presented to disclose the invention so as to enable any person skilled in the art to practice the invention. The preferred embodiments in the following description are given by way of example only, and other obvious variations will occur to those skilled in the art. The basic principles of the invention, as defined in the following description, may be applied to other embodiments, variations, modifications, equivalents, and other technical solutions without departing from the spirit and scope of the invention.
In the preferred embodiment of the present invention, those skilled in the art should note that the absolute value encoder, the timer, the ARM, and the like, which are involved in the present invention, can be regarded as the prior art.
PREFERRED EMBODIMENTS
The invention provides a sine and cosine coding method based on an absolute value encoder, which comprises the following steps:
step S1: an absolute value encoder (optical, magnetic, inductive and the like) generates first signal data and transmits the first signal data to the main control chip;
step S2: the absolute value encoder generates second signal data and transmits the second signal data to the main control chip to output an output signal including an A signal and a B signal;
step S3: the absolute position information of the single turn of the absolute encoder at this time is calculated by combining the first signal data and the second signal data, and the C signal, the D signal, and the R signal are constructed from the absolute position information of the single turn (including the simultaneous generation of the C signal, the D signal, and the R signal (defined as a first signal), the generation of only the C signal or the D signal or the R signal (defined as a second signal), and the generation of only the C signal + D signal or the C signal + R signal or the D signal + R signal (defined as a third signal)).
The preferred embodiment is implemented using absolute value photovoltaic cells. The absolute value photocell static grating consists of a coarse code area and a fine code area, and the corresponding code disc also has a coarse code channel and a fine code channel. The fine code channel is a main subdivision code channel, and the scribed lines are dense and can be used as an A \ B signal output. Meanwhile, single-turn absolute value position information can be synthesized by using the coarse code channel, C, D, R signals can be constructed by using the single-turn absolute value position information, and the signals are subjected to differential conversion, power amplification and then output to the outside. The method can ensure C, D, R signal amplitude and bias output stability.
Because the A/B signal is generated by the fine code channel, and the signal of the fine code channel is collected by the main control chip, the amplitude and the offset of the A/B signal can be monitored in real time in the main control chip, and compared with the theoretical amplitude and the theoretical offset, the corrected value of the A/B signal is output, and the high-quality output of the A/B signal is ensured.
Specifically, step S1 is implemented as the following steps:
step S1.1: the coarse code signal (corresponding to the first signal data and possibly after passing through the differential amplifier circuit) output by the coarse code channel is input into a main control chip (an ARM chip, for example, an ADC acquisition terminal) by the absolute value encoder to form an input coarse code signal.
More specifically, step S2 is specifically implemented as the following steps:
step S2.1: an absolute value encoder outputs a precise code signal (corresponding to second signal data) through a precise code channel, and the precise code signal is sequentially input into an ADC acquisition end of a main control chip (ARM chip) after passing through an amplitude adjustment variable gain circuit, a bias adjustment variable bias circuit and a second-stage fixed gain amplification circuit so as to form an input precise code signal;
step S2.2: simultaneously inputting an analog signal into a comparator input end (compare) of the main control chip and generating a square wave signal (used for feedback adjustment of amplitude and bias in the later period);
step S2.3: counting scribed lines of the fine code channel through an encoder interface mode of a main control chip, and setting a preset count value (assuming that the fine code channel is a 2048 scribed line, one circle of 2048 whole pulses and 8192 after quadruple frequency);
step S2.4: the main control chip monitors the fine code signal, compares the fine code signal with the amplitude, the phase and the offset of a target, generates an adjusting signal according to the comparison deviation and outputs the adjusting signal to the signal processing unit for adjustment.
Further, step S3 is specifically implemented as the following steps:
step S3.1: the single-turn absolute position information of the absolute encoder at the moment is calculated by combining the input coarse code signal and the input fine code signal;
step S3.2: the main control chip outputs a C signal and a D signal according to a certain time interval or position variation;
step S3.3: when the count value of a full-circle timer of the fine code signal corresponding to the fine code channel is a preset count value, the main control chip outputs an R signal.
Further, step S3.2 is embodied as the following steps:
step S3.2.1: the main control chip outputs single-circle absolute position information obtained by sampling and resolving corresponding time in a built-in DA (digital-to-analog) or PWM (pulse-width modulation) wave form according to a certain time interval or position variation, so that a first C signal (C-sin) and a first D signal (D-cos) are output;
step S3.2.2: the first C signal is subjected to differential amplification and filtering to form a second C signal (C-sin-and C-sin +, so that the anti-interference performance of transmission is improved);
step S3.2.3: the first D signal is differentially amplified and filtered to form a second D signal (D-cos-and D-cos +, which is used for improving the anti-interference performance of transmission).
Preferably, step S3.3 is embodied as the following steps:
step S3.3.1: when the count value of a whole-circle timer of a fine code signal corresponding to the fine code channel is a preset count value and the absolute value position is in a zero area at the moment, outputting a first R signal (the time width can be required to be one scribing pulse counting time of the fine code channel, and the specific time width is related to the rotating speed of a code disc);
step S3.3.2: the first R signal is differentially amplified and filtered to form a second R signal (R-and R + for improving the anti-interference performance of transmission).
Preferably, the output signal is subjected to amplitude adjustment and bias adjustment (on the basis of the second signal and the third signal) through an amplitude adjustment variable gain circuit and a bias adjustment variable bias circuit;
the main control chip collects sin signals and cos signals of the fine code channel, compares the sin signals and the cos signals with a target signal, and outputs an adjustment value so as to adjust the amplification factor of an operational amplifier (which can also be realized by a digital potentiometer or a DA device) of the amplitude adjustment variable gain circuit;
meanwhile, the main control chip calculates an offset value through the acquired signal, compares the offset value with a target offset, and outputs an adjustment value to adjust the offset;
the offset-adjusted signal passes through a differential amplification circuit to output an output signal including A signals (A sin-and A sin +) and B signals (B cos-and Bcos +).
Preferably, the main control chip monitors the precise code signal corresponding to the precise code channel (based on the first signal, the second signal and the third signal), judges whether the current precise code signal has distortion and lost abnormal conditions, and outputs alarm information separately if the current precise code signal has distortion and lost abnormal conditions (so that the main control chip can be adjusted in time).
As shown in FIG. 2, in the method for realizing sine and cosine coding by an absolute value photocell, a coarse code signal in the figure is sent to an ADC (analog to digital converter) acquisition port of an ARM (advanced RISC machine) chip after being amplified, and is resolved in a single-circle absolute position together with a signal of a fine code channel.
The signal of the fine code channel is amplified by the second stage of fixed gain through the variable gain circuit and the bias adjusting circuit and then is also sent to an ADC acquisition port of the ARM chip, and the analog signal is also sent to an input end of a comparator (also can be an external comparator) arranged in the ARM chip to be rectified into a square wave signal. And counting scribed lines of the fine code channel by an Encode interface mode built in the ARM chip, wherein if the fine code channel is a 2048 scribed line, one circle of the fine code channel is 2048 whole pulses, and the number of the whole pulses is 8192 after quadruple frequency.
The combination of the coarse code and the fine code can solve the single-turn absolute position information of the encoder at the moment. The ARM chip outputs single-circle absolute position information obtained by sampling and resolving corresponding time in a built-in DA (digital-analog) or PWM (pulse-width modulation) wave mode according to a certain time interval or position variation, so that C, D signals can be generated. In order to improve the anti-interference performance of transmission, the C, D signal is converted from a single end into a differential signal and is subjected to power amplification, and then the differential signal can be output externally.
When the count value of a full-circle timer of the fine code track signal is 8192 and the absolute value position is in the zero area, the R signal is output, and the time width is one scribed line pulse counting time of the fine code track (specifically related to the rotating speed of the code disc). And similarly, the R signal is subjected to power amplification and converted into a differential signal, and the differential signal is transmitted to the outside.
Usually, the amplitude and bias of the output signal of the sine and cosine encoder have requirements, so a variable gain circuit is designed in the scheme example, the variable gain circuit can be realized by a program control operational amplifier such as an AD603, and ARM acquires a precise code channel SIN and COS signals to compare with a target signal, then outputs an adjustment value, and adjusts the amplification factor of the AD 603. The variable gain circuit can also be realized by a digital potentiometer or a DA device, and the amplification factor is also adjusted by ARM. Meanwhile, the ARM chip calculates an offset value through the collected signals, compares the offset value with a target offset, outputs an adjustment value, adjusts the offset, converts the signal output after adjustment into a differential signal, amplifies the power and outputs the signal.
In addition, the ARM chip monitors the main code channel signal in real time, so that the abnormal conditions of whether the current precise code channel signal is distorted, lost and the like can be judged, and an alarm can be output independently, so that the controller can be adjusted in time.
It should be noted that the technical features of the absolute value encoder, the timer, the ARM, and the like, which are referred to in the present patent application, should be regarded as the prior art, and the specific structure, the operation principle, the control manner and the spatial arrangement manner that may be referred to in the present patent application are conventional in the art, and should not be regarded as the invention point of the present patent, and the present patent is not further specifically described in detail.
It will be apparent to those skilled in the art that modifications and equivalents may be made in the embodiments and/or portions thereof without departing from the spirit and scope of the present invention.
Claims (8)
1. A sine and cosine coding method based on an absolute value encoder is characterized by comprising the following steps:
step S1: the absolute value encoder generates first signal data and transmits the first signal data to the main control chip;
step S2: the absolute value encoder generates second signal data and transmits the second signal data to the main control chip to output an output signal including an A signal and a B signal;
step S3: and combining the first signal data and the second signal data, solving the single-turn absolute position information of the absolute encoder at the moment, and constructing a C signal, a D signal and an R signal according to the single-turn absolute position information.
2. The sine-cosine encoding method of claim 1, wherein the step S1 is implemented as the following steps:
step S1.1: the absolute value encoder inputs the coarse code signal output by the coarse code channel into the main control chip to form an input coarse code signal.
3. The sine-cosine encoding method of claim 2, wherein the step S2 is implemented as the following steps:
step S2.1: the precise code signal output by the absolute value encoder through the precise code channel sequentially passes through the amplitude adjustment variable gain circuit, the bias adjustment variable bias circuit and the second-stage fixed gain amplification circuit and then is input to the ADC acquisition end of the main control chip to form an input precise code signal;
step S2.2: meanwhile, inputting the analog signal into the input end of a comparator of the main control chip and generating a square wave signal;
step S2.3: counting scribed lines of the fine code channel through an encoder interface mode of a main control chip, and setting a preset count value;
step S2.4: the main control chip monitors the fine code signal, compares the fine code signal with the amplitude, the phase and the offset of a target, generates an adjusting signal according to the comparison deviation and outputs the adjusting signal to the signal processing unit for adjustment.
4. The sine-cosine encoding method of claim 3, wherein the step S3 is implemented as the following steps:
step S3.1: the single-turn absolute position information of the absolute encoder at the moment is calculated by combining the input coarse code signal and the input fine code signal;
step S3.2: the main control chip outputs a C signal and a D signal according to a certain time interval or position variation;
step S3.3: when the count value of a full-circle timer of the fine code signal corresponding to the fine code channel is a preset count value, the main control chip outputs an R signal.
5. The sine-cosine encoding method based on absolute value encoder as claimed in claim 4, wherein the step S3.2 is implemented as the following steps:
step S3.2.1: the main control chip outputs single-circle absolute position information obtained by sampling and resolving corresponding time in a built-in DA (digital-to-analog) or PWM (pulse-width modulation) wave form according to a certain time interval or position variation, so that a first C signal and a first D signal are output;
step S3.2.2: the first C signal is subjected to differential amplification and filtering to form a second C signal;
step S3.2.3: the first D signal is subjected to differential amplification and filtering to form a second D signal.
6. The sine-cosine encoding method based on absolute value encoder as claimed in claim 4, wherein the step S3.3 is implemented as the following steps:
step S3.3.1: when the count value of a complete-circle timer of a fine code signal corresponding to the fine code channel is a preset count value, and the absolute value position is in a zero area at the moment, outputting a first R signal;
step S3.3.2: the first R signal is differentially amplified and filtered to form a second R signal.
7. The sine and cosine coding method based on the absolute value encoder as claimed in claim 3, wherein the amplitude adjustment and the bias adjustment are performed on the output signal by an amplitude adjustment variable gain circuit and a bias adjustment variable bias circuit;
the main control chip collects sin signals and cos signals of the fine code channel, compares the sin signals and the cos signals with a target signal, and outputs an adjustment value so as to adjust the amplification factor of an operational amplifier of the amplitude adjustment variable gain circuit;
meanwhile, the main control chip calculates an offset value through the acquired signal, compares the offset value with a target offset, and outputs an adjustment value to adjust the offset;
the offset-adjusted signal passes through a differential amplification circuit to output an output signal including an a signal and a B signal.
8. The sine and cosine coding method based on the absolute value encoder as claimed in claim 3, wherein the main control chip monitors the precise code signal corresponding to the precise code channel, determines whether the current precise code signal has distortion and lost abnormal conditions, and outputs alarm information separately if the current precise code signal has distortion and lost abnormal conditions.
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