CN113064648B - Link equalization vernier coefficient configuration system, method and medium - Google Patents

Link equalization vernier coefficient configuration system, method and medium Download PDF

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CN113064648B
CN113064648B CN202110324904.XA CN202110324904A CN113064648B CN 113064648 B CN113064648 B CN 113064648B CN 202110324904 A CN202110324904 A CN 202110324904A CN 113064648 B CN113064648 B CN 113064648B
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coefficient
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CN113064648A (en
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高玉亚
芦飞
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Shandong Yingxin Computer Technology Co Ltd
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Shandong Yingxin Computer Technology Co Ltd
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    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
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Abstract

The invention discloses a link balance vernier coefficient configuration system, which comprises: the system comprises an initialization configuration module, a starting information processing module, a default request processing module and a flexible adaptation module; the initialization configuration module is used for configuring the link control module; the starting information processing module is used for acquiring starting data of the BIOS and sending a first signal to the flexible adaptation module; the default request processing module is used for detecting a BIOS default configuration request in the BIOS and executing default value recovery operation or sending a second signal to the flexible adaptation module; the flexible adaptation module is used for detecting the acquisition condition of the first signal and the second signal, acquiring the adaptation information of the BIOS according to the acquisition condition, and controlling the link control module to modify the link balance vernier coefficient of the BIOS; the method can realize the automatic flexible configuration of the link balance vernier coefficient under different application scenes, saves the labor cost and improves the coefficient configuration efficiency.

Description

System, method and medium for configuring link balance vernier coefficient
Technical Field
The invention relates to the technical field of BIOS design, in particular to a link balance vernier coefficient configuration system, method and medium.
Background
In the process of research and development of a server, the quality of a DMI (direct media interface) link signal needs to be optimized, the existing optimization method is that a sending end is set in a balanced mode, and when the sending end is set in a balanced mode, coefficients of a DMI TxEQ Cursor (link balanced vernier) need to be configured and adjusted.
Due to the file environment of a Basic Input Output System (BIOS) where the DMI TxEQ Cursor coefficient is located, the coefficient cannot be configured differently according to the actual model, and the conventional coefficient configuration method is manually adjusted by a BIOS engineer; therefore, each time the machine type is replaced, a BIOS engineer is required to repeatedly and manually check and adjust the machine type; the manual modification has more uncertain factors, cannot adapt to different BIOS system application conditions, has extremely low whole working efficiency, and simultaneously has poorer reusability of the continuously modified BIOS source codes.
Disclosure of Invention
The invention mainly solves the problems of low efficiency and poor applicability of the existing DMI TxEQ Cursor coefficient configuration method.
In order to solve the technical problems, the invention adopts a technical scheme that: a link equalization vernier coefficient configuration system is provided, which comprises: the system comprises an initialization configuration module, a starting information processing module, a default request processing module and a flexible adaptation module;
the initialization configuration module is used for configuring a link control module in the BIOS;
the starting information processing module is used for acquiring starting data of the BIOS and sending a first signal to the flexible adaptation module according to the starting data;
the default request processing module is used for detecting whether a BIOS default configuration request exists in the BIOS; if the default value exists, the default request processing module executes default value recovery operation; if not, the default request processing module sends a second signal to the flexible adaptation module;
the flexible adaptation module is used for detecting the acquisition condition of the first signal and the second signal and acquiring the adaptation information of the BIOS according to the acquisition condition, and the flexible adaptation module controls the link control module to modify the link balance vernier coefficient of the BIOS according to the adaptation information.
As an improved scheme, the starting information processing module comprises a starting data acquisition module and a mark information processing module;
the starting data acquisition module is used for setting a flag bit initial value and acquiring first flag bit information of the BIOS; the starting data acquisition module acquires the starting data according to the initial value of the zone bit and the first zone bit information;
the mark information processing module is used for identifying the characteristic data of the starting data; if the characteristic data is that the BIOS is started for the first time, the flag information processing module modifies the first flag bit information and sends the first signal to the flexible configuration module; if the characteristic data is that the BIOS is not started for the first time, the sign information processing module acquires configuration parameters corresponding to the link balance vernier coefficient in the BIOS.
As an improved scheme, the starting data acquisition module comprises a flag bit information comparison module and a starting data generation module;
the flag bit information comparison module is used for comparing whether the first flag bit information is matched with the initial value of the flag bit; if the flag bit information is matched with the starting data, the flag bit information comparison module sends a first flag signal to the starting data generation module; if not, the flag bit information comparison module sends a second flag signal to the starting data generation module;
the starting data generating module is used for generating the characteristic data as starting data for the first starting of the BIOS according to the first mark signal; and the starting data generation module generates the characteristic data as the starting data of the BIOS which is not started for the first time according to the second mark signal.
As an improved scheme, the default request processing module comprises a request detection module and a recovery operation execution module;
the request detection module is used for setting controller types and detecting whether controller trigger operations corresponding to the controller types exist in the BIOS; if yes, the request detection module judges that the BIOS default configuration request exists in the BIOS and sends a first recovery signal to the recovery operation execution module; if the BIOS default configuration request does not exist, the request detection module judges that the BIOS default configuration request does not exist in the BIOS and sends a second recovery signal to the recovery operation execution module;
the recovery operation execution module is configured to execute the default value recovery operation according to the first recovery signal, and the recovery operation execution module sends the second signal to the flexible adaptation module according to the second recovery signal.
As an improvement, the default value recovery operation includes:
and the recovery operation execution module acquires a default value of the link balance vernier coefficient and modifies the link balance vernier coefficient according to the default value.
As an improved solution, the flexible adaptation module comprises: the adaptive information acquisition module comprises an acquisition condition judgment module, an adaptive information acquisition module and a coefficient modification module;
the acquisition condition judging module is used for receiving the first signal and the second signal and generating the acquisition condition; the acquisition condition judging module identifies the acquisition condition, and if the acquisition condition is that the first signal and the second signal are both successfully acquired, the acquisition condition judging module sends a first acquisition signal to the adaptation information acquiring module;
the adaptation information acquisition module is used for executing information acquisition operation according to the first acquisition signal to obtain the adaptation information;
the coefficient modification module is used for controlling the link control module to execute signal detection operation according to the adaptation information to obtain signal feedback frequency, and the coefficient modification module modifies the link balance vernier coefficient according to the signal feedback frequency.
As an improvement, the information obtaining operation includes:
the adaptation information acquisition module acquires hardware information of a mainboard where the BIOS is located and identifies mainboard identification information in the hardware information, and the adaptation information acquisition module sets the mainboard identification information as the adaptation information.
As an improvement, the signal detection operation includes:
the coefficient modification module controls the link control module to send a link detection signal corresponding to the adaptation information to the mainboard;
the coefficient modification module acquires a feedback signal of the mainboard for the link detection signal through the link control module;
and the coefficient modification module calculates the frequency of the feedback signal to obtain the signal feedback frequency.
The invention also provides a link balance vernier coefficient configuration method, which comprises the following steps:
configuring a link control module in the BIOS;
acquiring starting data of the BIOS, and generating a first signal according to the starting data;
detecting whether a BIOS default configuration request exists in the BIOS; if so, executing default value recovery operation; if not, generating a second signal;
and detecting the generation conditions of the first signal and the second signal, acquiring the adaptation information of the BIOS according to the generation conditions, and controlling the link control module to modify the link balance vernier coefficient of the BIOS according to the adaptation information.
The present invention also provides a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the link equalization vernier coefficient configuration method.
The beneficial effects of the invention are:
1. the link balance vernier coefficient configuration system can realize automatic flexible configuration of the DMI TxEQ Cursor coefficients under different application scenes through the mutual matching of the initial configuration module, the start information processing module, the default request processing module and the flexible adaptation module, greatly save labor cost, enlarge the application range of DMI TxEQ Cursor coefficient configuration, greatly improve the DMI TxEQ Cursor coefficient configuration efficiency, and further improve the processing efficiency of DMI link signal quality optimization in the process of server research and development.
2. The link equalization vernier coefficient configuration method can realize flexible automatic configuration of the DMI TxEQ Cursor coefficients in different application scenes, greatly save labor cost, expand the application range of DMI TxEQ Cursor coefficient configuration, greatly improve the DMI TxEQ Cursor coefficient configuration efficiency, and further improve the processing efficiency of DMI link signal quality tuning in the process of server research and development.
3. The computer-readable storage medium can realize the cooperation of the initial configuration guiding module, the information processing starting module, the default request processing module and the flexible adapting module, further realize the automatic flexible configuration of the DMI TxEQ Cursor coefficients in different application scenes, greatly save the labor cost, expand the application range of the DMI TxEQ Cursor coefficient configuration, greatly improve the DMI TxEQ Cursor coefficient configuration efficiency, improve the processing efficiency of DMI link signal quality optimization in the process of server research and development, and effectively improve the operability of the link balance vernier coefficient configuration method.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is an architecture diagram of a link balance vernier coefficient configuration system according to embodiment 1 of the present invention;
fig. 2 is a schematic diagram of a specific architecture of a startup information processing module according to embodiment 1 of the present invention;
fig. 3 is a schematic diagram of a specific architecture of a startup data obtaining module according to embodiment 1 of the present invention;
fig. 4 is a schematic diagram illustrating a specific architecture of a default request processing module according to embodiment 1 of the present invention;
fig. 5 is a schematic diagram of a specific architecture of a flexible adaptation module according to embodiment 1 of the present invention;
fig. 6 is a flowchart of a link equalization vernier coefficient configuration method according to embodiment 2 of the present invention;
fig. 7 is a schematic flowchart of a link equalization vernier coefficient configuration method according to embodiment 2 of the present invention.
Detailed Description
The following detailed description of the preferred embodiments of the present invention, taken in conjunction with the accompanying drawings, will make the advantages and features of the invention easier to understand by those skilled in the art, and thus will clearly and clearly define the scope of the invention.
In the description of the present invention, it should be noted that the described embodiments of the present invention are a part of the embodiments of the present invention, and not all embodiments; all other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless explicitly specified or limited otherwise, the terms "link control module", "startup data", "BIOS default configuration request", "default value recovery operation", "adaptation information", "link equalization vernier coefficient", "flag bit information", "feature data", "flag bit initial value", "recovery signal", "signal feedback frequency", and "link detection signal" should be understood in a broad sense. The specific meanings of the above terms in the present invention can be understood in a specific case to those of ordinary skill in the art.
In the description of the present invention, it is to be noted that:
DMI, direct media interface;
a PCD that is an electrical controller interface;
BoardID is mainboard identification information;
boot _ Flag, which is a start Flag;
HFR, which is BIOS source code data layer file;
DMI _ Configuration, which is a link controller;
DMI TxEQ Cursor, which is the link equalization vernier coefficient;
BIOS Load Default, which is the Default value for BIOS loading;
a BIOS (Basic Input Output System) which is a Basic Input Output System;
NVRAM (Non-Volatile Random Access Memory), which is a Non-Volatile Random Access Memory.
Example 1
The present embodiment provides a link equalization vernier coefficient configuration system, as shown in fig. 1 to 5, including: the system comprises an initial configuration module, a starting information processing module, a default request processing module and a flexible adaptation module;
in the application scenario of the embodiment, when the quality of a DMI link signal is adjusted and optimized, the DMI TxEQ curror coefficients under different application scenarios are configured; the DMI TxEQ Cursor coefficient allows a user to adjust and configure options in an HFR file of a BIOS source code, and the property of the HFR file is limited, and usually, it is difficult for a BIOS engineer to manually configure the DMI TxEQ Cursor coefficient, and only frequent setting is performed, which causes low BIOS source code reuse rate and is not flexibly applicable to different scenes, and the system described in this embodiment solves the drawbacks of the prior art:
the initial Configuration module is used for acquiring a data layer address of a source code of the BIOS, and adding a DMI _ Configuration module (namely a link control module) in the data layer address of the source code of the BIOS; the module is used for flexibly configuring DMI TxEQ Cursor coefficients of different models;
specifically, the addition of the DMI _ Configuration module needs to follow a design principle of a single module responsibility, and meanwhile, the portability and flexibility of codes in the DMI _ Configuration module are ensured, so that the design benefit can improve the processing efficiency of adjusting and optimizing the signal quality of the DMI link, and improve the adaptability and reusability of BIOS source codes.
The starting information processing module comprises a starting data acquisition module and a mark information processing module;
specifically, the startup data obtaining module is configured to obtain startup data of a current BIOS, and set corresponding BIOS flag bit information (i.e., first flag bit information) according to the startup data;
specifically, a data acquisition module is started to set an initial value of a zone bit and acquire the information of the BIOS zone bit; the starting data acquisition module acquires the starting data according to the initial value of the zone bit and the information of the BIOS zone bit;
specifically, the BIOS flag bit information in this embodiment is: a Boot _ Flag bit in the NVRAM; the initial value of the flag bit is 0; a data obtaining module is started to judge whether the Boot _ Flag bit is 0 or not;
specifically, the starting data acquisition module comprises a flag bit information comparison module and a starting data generation module; the Flag bit information comparison module judges whether the Boot _ Flag is 0, if yes, the Boot data generation module generates Boot data of the current BIOS, and the Boot data includes the characteristic data: when the current BIOS is started for the first time (i.e. the BIOS is started for the first time), the Flag information processing module sets the Flag bit of the Boot _ Flag to 1 and sends a first signal to the flexible configuration module; if not, the starting data generation module generates the starting data of the current BIOS, and the starting data comprises the characteristic data: the current BIOS is not started for the first time (namely the BIOS is not started for the first time), at the moment, the mark information processing module reads a set value (namely a configuration parameter) in a setting item corresponding to the DMI TxEQ Cursor coefficient in an NVRAM where the BIOS is located, and modifies the DMI TxEQ Cursor coefficient according to the set value;
specifically, when the BIOS starting data are identified, the current BIOS is not started for the first time, so that the DMI TxEQ Cursor coefficient does not need to be set, and the set value which is set before is directly obtained;
specifically, whether the current BIOS is started for the first time or not can be automatically detected by starting the information processing module, and corresponding DMI TxEQ Cursor coefficient configuration operation is adopted, so that the applicability of a configuration system of the DMI TxEQ Cursor coefficient is stronger, and the problem that in the prior art, the adjustment efficiency of the quality of a DMI link signal is extremely low when the coefficient is repeatedly adjusted under the condition that the BIOS is not started in a manual mode is solved.
The default request processing module comprises a request detection module and a recovery operation execution module;
specifically, in this embodiment, the request detection module is a BIOS Tse module, the request detection module sets a Default value of the DMI TxEQ curser coefficient, and detects whether a BIOS Load Default event (i.e., a BIOS Default configuration request) exists, and if so, the recovery operation execution module modifies the DMI TxEQ curser coefficient into the Default value; if not, sending a second signal to the flexible adaptation module;
specifically, the request detection module sets a default value of the DMI TxEQ Cursor coefficient, stores the default value into an NVRAM of a main board carried by the current BIOS, detects whether a controller trigger action exists in the current BIOS, and sends a first recovery signal to the recovery operation execution module if the controller trigger action exists; and the recovery operation execution module acquires a default value stored in the NVRAM after receiving the first recovery signal, and modifies the DMI TxEQ Cursor coefficient to the default value.
Specifically, in this embodiment, the controller triggering operation is a triggering action of an F9 key, where the request detection module needs to set a category of the controller, the category includes but is not limited to F9 key triggering, and may also be other controllers, and when the request detection module detects a triggering operation corresponding to the category of the controller set by the request detection module, the request detection module sends a first recovery signal to the recovery operation execution module;
specifically, the coefficient configuration operation is realized when the BIOS needs to set default values through the default request processing module, the application range of the system is further expanded, and the DMI link signal quality adjustment efficiency and the practicability are improved.
The flexible adaptation module comprises an acquisition condition judgment module, an adaptation information acquisition module and a coefficient modification module;
the flexible adaptation module is used for detecting the acquisition condition of the first signal and the second signal, acquiring adaptation information corresponding to the current BIOS according to the acquisition condition, and setting a corresponding DMI TxEQ Cursor coefficient according to the adaptation information;
specifically, in this embodiment, the adaptation information is BoardID; the acquisition condition judgment module is used for receiving the first signal and the second signal sent by the module, when the first signal and the second signal are both received, the acquisition condition judgment module judges that the current BIOS has no other condition to be met, only the DMI TxEQ Cursor coefficient needs to be adjusted according to the adaptation information, and at the moment, the acquisition condition judgment module sends a first acquisition signal to the adaptation information acquisition module; when any one of the first signal and the second signal is received, the obtaining condition judging module judges that the current BIOS has other condition interference, and does not adjust the DMI TxEQ Cursor coefficient according to the adaptation information;
specifically, after receiving the first acquisition signal, the adaptation information acquisition module configures a PCD interface, and the adaptation information acquisition module reads hardware information of a mainboard carried by a current BIOS through the PCD interface, identifies the hardware information, further obtains a BoardID corresponding to the current BIOS, and sends the BoardID to the coefficient modification module;
specifically, the coefficient modification module sends a DMI link detection signal corresponding to the BoardID to the current mainboard; after the DMI link detection signal is sent, a coefficient modification module acquires a feedback signal of the main board for the DMI link detection signal, and calculates the frequency of the feedback signal to obtain a signal feedback frequency; the coefficient modification module sets a corresponding DMI TxEQ Cursor coefficient according to the signal feedback frequency;
specifically, adjustment of the DMI TxEQ Cursor coefficients of various machine types under the normal condition can be achieved through the flexible adaptation module, risks caused by repeated modification of the coefficients due to human factors are reduced, and the working efficiency of adjusting and optimizing the quality of DMI link signals is improved to a certain extent.
Example 2
The present embodiment provides a link equalization vernier coefficient configuration method, as shown in fig. 6 and 7, including the following steps:
s100, acquiring a data layer address of a source code of the BIOS, and adding a DMI _ Configuration module in the data layer address of the source code of the BIOS;
s200, setting an initial value of a zone bit, and acquiring the BIOS zone bit information; acquiring the starting data according to the zone bit initial value and the BIOS zone bit information; when the start data includes the characteristic data: when the current BIOS is started for the first time, modifying the BIOS zone bit information and generating a first signal; when the start data includes the characteristic data: when the current BIOS is not started for the first time, reading a set value in a setting item corresponding to the DMI TxEQ Cursor coefficient in an NVRAM where the BIOS is located, and modifying the DMI TxEQ Cursor coefficient according to the set value;
s300, setting a default value of the DMI TxEQ Cursor coefficient, detecting whether a BIOS default configuration request exists, and modifying the DMI TxEQ Cursor coefficient into the default value if the BIOS default configuration request exists; if not, generating a second signal;
specifically, a default value of the DMI TxEQ Cursor coefficient is set, the default value is stored in an NVRAM of a main board on which the current BIOS is loaded, whether a controller trigger action exists in the current BIOS is detected, if yes, the default value stored in the NVRAM is obtained, and the DMI TxEQ Cursor coefficient is modified to the default value.
S400, detecting the generation conditions of the first signal and the second signal, acquiring adaptation information corresponding to the current BIOS according to the generation conditions, and setting a corresponding DMI TxEQ Cursor coefficient according to the adaptation information;
specifically, in this embodiment, the adaptation information is BoardID; when the first signal and the second signal are generated, judging that the current BIOS has no other condition to be met, only adjusting the DMI TxEQ Cursor coefficient according to adaptation information, configuring a PCD interface, reading hardware information of a mainboard carried by the current BIOS through the PCD interface, identifying the hardware information, further obtaining BoardID corresponding to the current BIOS, and sending a DMI link detection signal corresponding to the BoardID to the current mainboard; after the DMI link detection signal is sent, acquiring a feedback signal of the main board for the DMI link detection signal, and calculating the frequency of the feedback signal to obtain a signal feedback frequency; setting a corresponding DMI TxEQ Cursor coefficient according to the signal feedback frequency;
when any one of the first signal and the second signal is received, the current BIOS is judged to have other interference, and the DMI TxEQ Cursor coefficient is not adjusted according to the adaptation information.
Based on the same inventive concept as the link equalization vernier coefficient configuration method in the foregoing embodiments, an embodiment of the present specification further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the link equalization vernier coefficient configuration method are implemented.
Different from the prior art, the link balance vernier coefficient configuration system, the link balance vernier coefficient configuration method and the link balance vernier coefficient configuration medium can be matched with each other through modules in the system, so that automatic DMI TxEQ Cursor coefficients can be flexibly configured in different application scenes, the labor cost is greatly saved, the application range of DMI TxEQ Cursor coefficient configuration is expanded, an effective design idea is provided for the system through the method, the configuration efficiency of the DMI TxEQ Cursor coefficients is greatly improved, and the processing efficiency of DMI link signal quality optimization in the research and development process of a server is improved.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps of implementing the above embodiments may be implemented by hardware, and a program that can be implemented by the hardware and can be instructed by the program to be executed by the relevant hardware may be stored in a computer readable storage medium, where the storage medium may be a read-only memory, a magnetic or optical disk, and the like.
The above description is only an embodiment of the present invention, and is not intended to limit the scope of the present invention, and all equivalent structures or equivalent processes performed by the present invention or directly or indirectly applied to other related technical fields are included in the scope of the present invention.

Claims (10)

1. A link equalization vernier coefficient configuration system, comprising: the system comprises an initialization configuration module, a starting information processing module, a default request processing module and a flexible adaptation module;
the initialization configuration module is used for configuring a link control module in the BIOS;
the starting information processing module is used for acquiring starting data of the BIOS and sending a first signal to the flexible adaptation module according to the starting data;
the default request processing module is used for detecting whether a BIOS default configuration request exists in the BIOS; if the default value exists, the default request processing module executes default value recovery operation; if not, the default request processing module sends a second signal to the flexible adaptation module;
the flexible adaptation module is used for detecting the acquisition condition of the first signal and the second signal and acquiring the adaptation information of the BIOS according to the acquisition condition, and the flexible adaptation module controls the link control module to modify the link balance vernier coefficient of the BIOS according to the adaptation information.
2. The link equalization vernier coefficient configuration system of claim 1 wherein: the starting information processing module comprises a starting data acquisition module and a mark information processing module;
the starting data acquisition module is used for setting a flag bit initial value and acquiring first flag bit information of the BIOS; the starting data acquisition module acquires the starting data according to the initial value of the zone bit and the first zone bit information;
the mark information processing module is used for identifying the characteristic data of the starting data; if the characteristic data is that the BIOS is started for the first time, the flag information processing module modifies the first flag bit information and sends the first signal to the flexible adaptation module; if the characteristic data is that the BIOS is not started for the first time, the sign information processing module acquires configuration parameters corresponding to the link balance vernier coefficient in the BIOS.
3. The link equalization vernier coefficient configuration system of claim 2 wherein: the starting data acquisition module comprises a flag bit information comparison module and a starting data generation module;
the flag bit information comparison module is used for comparing whether the first flag bit information is matched with the initial value of the flag bit; if the flag bit information is matched with the starting data, the flag bit information comparison module sends a first flag signal to the starting data generation module; if not, the flag bit information comparison module sends a second flag signal to the starting data generation module;
the starting data generating module is used for generating the characteristic data as starting data for starting the BIOS for the first time according to the first mark signal; and the starting data generation module generates the characteristic data as the starting data of the BIOS which is not started for the first time according to the second mark signal.
4. The link equalization vernier coefficient configuration system according to claim 1 or 2, wherein: the default request processing module comprises a request detection module and a recovery operation execution module;
the request detection module is used for setting controller types and detecting whether controller trigger operations corresponding to the controller types exist in the BIOS; if yes, the request detection module judges that the BIOS default configuration request exists in the BIOS and sends a first recovery signal to the recovery operation execution module; if the BIOS default configuration request does not exist, the request detection module judges that the BIOS default configuration request does not exist in the BIOS and sends a second recovery signal to the recovery operation execution module;
the recovery operation execution module is configured to execute the default value recovery operation according to the first recovery signal, and the recovery operation execution module sends the second signal to the flexible adaptation module according to the second recovery signal.
5. The link equalization vernier coefficient configuration system of claim 4, wherein: the default recovery operation includes:
and the recovery operation execution module acquires a default value of the link balance vernier coefficient and modifies the link balance vernier coefficient according to the default value.
6. The link equalization vernier coefficient configuration system of claim 1, 2 or 5 wherein: the flexible adaptation module comprises: the adaptive information acquisition module comprises an acquisition condition judgment module, an adaptive information acquisition module and a coefficient modification module;
the acquisition condition judging module is used for receiving the first signal and the second signal and generating the acquisition condition; the acquisition condition judging module identifies the acquisition condition, and if the acquisition condition is that the first signal and the second signal are both successfully acquired, the acquisition condition judging module sends a first acquisition signal to the adaptation information acquiring module;
the adaptation information acquisition module is used for executing information acquisition operation according to the first acquisition signal to obtain the adaptation information;
the coefficient modification module is used for controlling the link control module to execute signal detection operation according to the adaptation information to obtain signal feedback frequency, and the coefficient modification module modifies the link balance vernier coefficient according to the signal feedback frequency.
7. The link equalization vernier coefficient configuration system of claim 6 wherein: the information acquisition operation includes:
the adaptation information acquisition module acquires hardware information of a mainboard where the BIOS is located and identifies mainboard identification information in the hardware information, and the adaptation information acquisition module sets the mainboard identification information as the adaptation information.
8. The link equalization vernier coefficient configuration system of claim 7, wherein: the signal detection operation includes:
the coefficient modification module controls the link control module to send a link detection signal corresponding to the adaptation information to the mainboard;
the coefficient modification module acquires a feedback signal of the mainboard for the link detection signal through the link control module;
and the coefficient modification module calculates the frequency of the feedback signal to obtain the signal feedback frequency.
9. A link equalization vernier coefficient configuration method is characterized by comprising the following steps:
configuring a link control module in the BIOS;
acquiring starting data of the BIOS, and generating a first signal according to the starting data;
detecting whether a BIOS default configuration request exists in the BIOS; if so, executing default value recovery operation; if not, generating a second signal;
and detecting the generation conditions of the first signal and the second signal, acquiring the adaptation information of the BIOS according to the generation conditions, and controlling the link control module to modify the link balance vernier coefficient of the BIOS according to the adaptation information.
10. A computer-readable storage medium, having stored thereon a computer program which, when executed by a processor, performs the steps of the link equalization vernier coefficient configuration method of claim 9.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109376103A (en) * 2018-06-19 2019-02-22 华为技术有限公司 Method, chip and the communication system of fast uniform
CN109800022A (en) * 2019-01-25 2019-05-24 郑州云海信息技术有限公司 A kind of method, system, terminal and the storage medium of automation comparison BIOS information difference

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108984216B (en) * 2018-07-06 2021-08-13 郑州云海信息技术有限公司 Method and device for automatically entering and configuring BIOS
CN109582505B (en) * 2018-12-06 2022-05-27 广东浪潮大数据研究有限公司 BIOS option default value recovery system, method and device
CN111158769A (en) * 2019-12-29 2020-05-15 苏州浪潮智能科技有限公司 Method and device for checking and modifying BIOS (basic input output System) options
CN112463150B (en) * 2020-10-16 2023-06-13 苏州浪潮智能科技有限公司 Font and background color adjusting method, device, equipment and readable medium

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109376103A (en) * 2018-06-19 2019-02-22 华为技术有限公司 Method, chip and the communication system of fast uniform
CN109800022A (en) * 2019-01-25 2019-05-24 郑州云海信息技术有限公司 A kind of method, system, terminal and the storage medium of automation comparison BIOS information difference

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