CN112992964B - Light emitting diode structure and manufacturing method thereof - Google Patents
Light emitting diode structure and manufacturing method thereof Download PDFInfo
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Abstract
The application discloses a light emitting diode structure and a manufacturing method thereof. The light emitting diode structure includes a substrate and a plurality of LED units formed on the substrate. Each LED unit includes: a bonding layer formed on the substrate; a first doping type semiconductor layer formed on the bonding layer; a second doping type semiconductor layer formed on the first doping type semiconductor layer; a passivation layer formed on the second doping type semiconductor layer and a portion of the first doping type semiconductor layer; and an electrode layer formed on a portion of the passivation layer and in contact with the second doping type semiconductor layer. The plurality of LED units includes a first LED unit and a second LED unit adjacent to the first LED unit. The first doping type semiconductor layer of the first LED unit horizontally extends to the first doping type semiconductor layer of the second LED unit adjacent to the first LED unit, and the first LED unit and the second LED unit are independently operable LED units.
Description
Cross Reference to Related Applications
U.S. provisional patent application No. 63/007,829 entitled "semiconductor array and monolithic integration method (Semiconductor Array and Method of Monolithic Integration)" filed on month 4 and 9 of 2020, and U.S. formal patent application No. 17/162,515 entitled "light emitting diode structure and method of manufacturing the same (LIGHT EMITTING DIODE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME)" filed on month 29 of 2021, the disclosures of which are incorporated herein by reference in their entirety, are claimed.
Technical Field
The present application relates to a Light Emitting Diode (LED) structure and a method of manufacturing the same, and more particularly, to an LED structure having a plurality of individually operable LED units while sharing a doping layer, and a method of manufacturing the same.
Background
In recent years, LEDs have become popular in lighting applications. As a light source, LEDs have many advantages including higher light efficiency, lower power consumption, longer lifetime, smaller size, and faster switching speed.
Micro LED displays have a micro LED (micro-LEDs) array of multiple single pixel elements. The pixels may be tiny illuminated areas on the display screen and the image may be composed of a number of pixels. In other words, the pixels may be small discrete elements that together form an image on the display. The pixels are typically arranged in a two-dimensional (2D) matrix and are represented using dots, squares, rectangles or other shapes. The pixels may be the basic units of a display or a digital image and have geometric coordinates.
When manufacturing micro LEDs, a process such as dry etching or wet etching is often used to electrically isolate individual micro LEDs. To create a plurality of fully isolated functional micro LED pixels, the conventional process typically etches away the continuous functional epitaxial layer completely. However, when transferring conventional micro LED pixels onto a substrate (such as a driving circuit substrate) or after transfer, the fully isolated functional micro LED pixels may be easily peeled off from the substrate due to the weak adhesion of the micro LED pixels. This problem becomes more serious as micro LED pixels become smaller. Furthermore, during conventional etching to isolate micro LED pixels, the sidewalls of the micro LED pixels may be damaged and affect the optical and electrical properties of the LED structure.
Embodiments of the present application address the above-described problems by providing an LED structure having a plurality of individually operable LED units while sharing a doped layer or a bonding layer, and a method of manufacturing the same.
Disclosure of Invention
Embodiments of an LED structure and a method of forming the LED structure are disclosed.
In one embodiment, an LED structure is disclosed. The LED structure includes a substrate and a plurality of LED units formed on the substrate. Each LED unit includes: a bonding layer formed on the substrate; a first doping type semiconductor layer formed on the bonding layer; a second doping type semiconductor layer formed on the first doping type semiconductor layer; a passivation layer formed on the second doping type semiconductor layer and a portion of the first doping type semiconductor layer; and an electrode layer formed on a portion of the passivation layer and in contact with the second doping type semiconductor layer. The plurality of LED units includes a first LED unit and a second LED unit adjacent to the first LED unit. The first doped semiconductor layer of the first LED unit extends horizontally and is physically connected to the first doped semiconductor layer of the second LED unit adjacent to the first LED unit, and the first LED unit and the second LED unit are individually operable LED units.
In another embodiment, an LED structure is disclosed. The LED structure includes a substrate and a plurality of LED units formed on the substrate. Each LED unit includes: a p-n diode layer formed on the substrate; a passivation layer formed on the p-n diode layer; and an electrode layer formed on the passivation layer and in contact with the p-n diode layer. The plurality of LED units includes a first LED unit and a second LED unit adjacent to the first LED unit. The first LED unit and the second LED unit have a common anode, and the first LED unit and the second LED unit are individually operable LED units.
In a further embodiment, a method for manufacturing an LED structure is disclosed, comprising:
forming a semiconductor layer on a first substrate, the semiconductor layer including a first doping type semiconductor layer and a second doping type semiconductor layer;
performing a first etching operation to remove a portion of the second doping type semiconductor layer and expose a portion of the first doping type semiconductor layer;
performing a second etching operation to remove a portion of the first doping type semiconductor layer and expose a portion of the first substrate having the pixel circuit contacts;
forming a passivation layer on the second doping type semiconductor layer and on the exposed first doping type semiconductor layer;
performing a third etching operation to form a first opening on the passivation layer on the second doping type semiconductor layer and a second opening on the passivation layer on the first substrate having the pixel circuit contact;
an electrode layer is formed on the passivation layer covering the first opening and contacting the second doping type semiconductor layer and covering the second opening and contacting the second doping type semiconductor layer.
Drawings
The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present application and, together with the description, further serve to explain the present application and to enable a person skilled in the pertinent art to make and use the present application.
Fig. 1 shows a top view of an illustrative LED structure according to some embodiments of the present application.
Fig. 2 shows a cross-sectional view of an illustrative LED structure in accordance with some embodiments of the present application.
Fig. 3 shows another cross-sectional view of an illustrative LED structure in accordance with some embodiments of the present application.
Fig. 4 shows another top view of an illustrative LED structure in accordance with some embodiments of the present application.
Fig. 5 shows a top view of another illustrative LED structure according to some embodiments of the present application.
Fig. 6A-6H show cross-sectional views of an illustrative LED structure at various stages of the manufacturing process, according to some embodiments of the present application.
Fig. 7 is a flowchart of an illustrative method for fabricating an LED structure according to some embodiments of the present application.
Embodiments of the present application will be described below with reference to the accompanying drawings.
Detailed Description
Although specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. Accordingly, other configurations and arrangements may be used without departing from the scope of the present application. Moreover, the present application may also be employed in a variety of other applications. The functional and structural features described in this application may be combined, adapted and modified in various ways not specifically shown in the drawings to each other so that such combinations, adaptations and modifications are within the scope of the present application.
Generally, the terms may be understood, at least in part, by the usage of the context. For example, the term "one or more" as used herein, depending at least in part on the context, may be used to describe any element, structure, or feature in the singular or may be used to describe a combination of elements, structures, or features in the plural. Similarly, terms such as "a," "an," or "the" may also be construed to convey a singular usage or a plural usage, depending at least in part on the context. In addition, the term "based on …" may be understood as not necessarily intended to convey an exclusive set of factors, but rather may instead allow for additional factors to be present that are not necessarily explicitly described, depending at least in part on the context.
It should be readily understood that the meanings of "on …", "on …" and "on …" in this application should be interpreted in the broadest sense such that "on …" means not only "directly on something" but also "on something" including intermediate components or layers present therebetween, and "on something" or "on something" means not only "on something" or "on something" but also "on something" without intermediate components or layers present therebetween.
Further, spatially relative terms such as "under …," "below …," "lower," "above …," "upper," and the like may be used herein for ease of description to describe one element or component's relationship to another element or component as illustrated in the figures. In addition to the orientations depicted in the drawings, the spatially relative terms are intended to encompass different orientations of the device in use or operation. The device may be otherwise oriented (rotated 90. Or in other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The term "layer" as used herein refers to a portion of material that includes regions having a certain thickness. The layers may extend over the entire underlying or overlying structure, or may have a degree less than the extent of the underlying or overlying structure. Furthermore, the layer may be a region of homogeneous or heterogeneous continuous structure having a thickness less than the thickness of the continuous structure. For example, the layer may be located between the top and bottom surfaces of the continuous structure or between any pair of horizontal planes therebetween. The layers may extend horizontally, vertically and/or along a tapered surface. The substrate may be a layer, may include one or more layers therein, and/or may have one or more layers thereon, and/or thereon. One layer may comprise multiple layers. For example, the semiconductor layer may include one or more doped or undoped semiconductor layers, and may have the same or different materials.
The term "substrate" as used herein refers to a material to which subsequent layers of material are added. The substrate itself may be patterned. The material added to the top of the substrate may be patterned or may remain unpatterned. In addition, the substrate may include a variety of semiconductor materials such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, and the like. Alternatively, the substrate may be made of a non-conductive material, such as glass, plastic, or sapphire wafer. Further alternatively, the substrate may have a semiconductor device or a circuit formed therein.
The term "micro" LED, "micro" p-n diode, or "micro" device, as used herein, refers to the descriptive dimensions of certain devices or structures according to embodiments of the present application. The term "micro" device or structure as used herein is intended to mean a scale of 0.1 to 100 μm. However, it should be appreciated that embodiments of the present application are not necessarily limited thereto, and that certain aspects of the embodiments may be applicable to larger and possibly smaller dimensional scales.
Embodiments of the present application describe LED structures or micro LED structures and a method for manufacturing the same. To fabricate a micro LED display, an epitaxial layer is bonded to a receiving substrate. The receiving substrate may be, for example, but not limited to, a display substrate including a CMOS backplate or TFT glass substrate. The epitaxial layer is then formed with an array of micro LEDs on a receiving substrate. When the micro LED is formed on the receiving substrate, since the adhesion of the fine functional pixels on the receiving substrate is weak and proportional to the pixel size, the plurality of fine functional pixels may be peeled off from the receiving substrate, thereby causing a display failure (failed pixels) during the manufacturing process. To solve the above problems, the present application introduces a solution in which the functional epitaxial layer is partially patterned/etched and allows to preserve thin continuous functional layers and bonding layers to avoid potential functional pixel lift-off. In addition, the fabrication methods described herein may further reduce sidewall physical damage to the functional pixel, reduce damage to the quantum well structure as the light emitting region of the LED, and improve the optical and electrical properties of the functional pixel.
Fig. 1 shows a top view of an illustrative LED structure 100 according to some embodiments of the present application, and fig. 2 shows a cross-sectional view of the illustrative LED structure 100 along line A-A' according to some embodiments of the present application. For better explanation of the present application, a top view of the LED structure 100 in fig. 1 and a cross-sectional view of the LED structure 100 in fig. 2 will be described together. The LED structure 100 includes a first substrate 102 and a plurality of LED units 116 (e.g., LED units 116-1, 116-2, 116-3, and 116-4 as shown in fig. 2). The LED unit 116 is bonded on the first substrate 102 through the bonding layer 104. In some embodiments, the first substrate 102 may include a semiconductor material, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide. In some embodiments, the first substrate 102 may be made of a non-conductive material, such as glass, plastic, or sapphire wafer. In some embodiments, the first substrate 102 may have a driving circuit formed therein, and the first substrate 102 may be a CMOS back plate or a TFT glass substrate. The driving circuit supplies an electrical signal to the LED unit 116 to control brightness. In some embodiments, the driving circuit may comprise an active matrix driving circuit, wherein each individual LED unit 116 corresponds to an independent driver. In some embodiments, the driving circuit may include a passive matrix driving circuit in which a plurality of LED units 116 are arranged in an array and connected to data lines and scan lines driven by the driving circuit.
The bonding layer 104 is a layer of adhesive material formed on the first substrate 102 to bond the first substrate 102 and the LED unit 116. In some embodiments, the bonding layer 104 may include a conductive material, such as a metal or metal alloy. In some embodiments, the bonding layer 104 may include Au, sn, in, cu or Ti. In some embodiments, the bonding layer 104 may include a non-conductive material, such as Polyimide (PI), polydimethylsiloxane (PDMS). In some implementations, the bonding layer 104 can include a photoresist, such as SU-8 photoresist. In some embodiments, the bonding layer 104 may be Hydrogen Silsesquioxane (HSQ) or divinyl siloxane-bis-benzocyclobutene (DVS-BCB). It is understood that the description of the material of the bonding layer 104 is merely exemplary and not limiting, and that one skilled in the art may make variations as desired, all of which are within the scope of the present application.
Referring to fig. 2, each LED unit 116 includes a portion of the bonding layer 104, the first doped semiconductor layer 106, and the second doped semiconductor layer 108. A first doping type semiconductor layer 106 is formed on the bonding layer 104. In some embodiments, the first doped semiconductor layer 106 and the second doped semiconductor layer 108 may include one or more layers based on II-VI materials (such as ZnSe or ZnO) or III-V nitride materials (such as GaN, alN, inN, inGaN, gaP, alInGaP, alGaAs and alloys thereof).
In some embodiments, the first doped semiconductor layer 106 may be a p-type semiconductor layer that extends across multiple LED units 116 (e.g., four LED units 116 as shown in fig. 2) and forms a common anode for the LED units 116. For example, the first doped semiconductor layer 106 of LED unit 116-2 extends to its neighboring LED units 116-1 and 116-3, and similarly, the first doped semiconductor layer 106 of LED unit 116-3 extends to its neighboring LED units 116-2 and 116-4. In some embodiments, the first doping type semiconductor layer 106 extending across the LED unit may be relatively thin. In some embodiments, the thickness of the first doped semiconductor layer 106 may be between about 0.05 μm and about 1 μm. In some other embodiments, the thickness of the first doped semiconductor layer 106 may be between about 0.05 μm and about 0.7 μm. In some alternative embodiments, the thickness of the first doped semiconductor layer 106 may be between about 0.05 μm and about 0.5 μm. By having a continuous thin layer of the first doping type semiconductor on each LED unit, the bonding area between the substrate 102 and the plurality of LED units 116 is not limited to the area under the second doping type semiconductor layer 108, but extends to the area between each LED unit. In other words, by having a thin layer of the continuous first doping type semiconductor 106, the area of the bonding layer 104 increases. Thus, the bonding strength between the substrate 102 and the plurality of LED units 116 is enhanced, and the risk of peeling of the LED structure 100 may be reduced.
In some embodiments, the first doped semiconductor layer 106 may be p-type GaN. In some embodiments, the first doping type semiconductor layer 106 may be formed by doping magnesium (Mg) in GaN. In some embodiments, the first doped semiconductor layer 106 may be p-type InGaN. In some embodiments, the first doped semiconductor layer 106 may be p-type AlInGaP. Each LED unit 116 has an anode and a cathode connected to a driving circuit, for example, formed in the substrate 102 (the driving circuit is not explicitly shown in the figure). For example, each LED unit 116 has an anode connected to a constant voltage source and has a cathode connected to the source/drain of the driving circuit. In other words, by forming a continuous first-doped semiconductor 106 across each LED unit 116, the plurality of LED units 116 have a common anode formed by the first-doped semiconductor layer 106 and the bonding layer 104.
In some embodiments, the second doped semiconductor layer 108 may be an n-type semiconductor layer and form the cathode of each LED unit 116. In some embodiments, the second doped semiconductor layer 108 may be n-type GaN. In some embodiments, the second doped semiconductor layer 108 may be n-type InGaN. In some implementations, the second doped semiconductor layer 108 can be n-type AlInGaP. The second doped semiconductor layers 108 of different LED units 116 are electrically isolated so that each LED unit 116 may have a cathode of a different voltage level than the other units. As a result of the disclosed embodiments, a plurality of individually operable LED units 116 are formed, with their first doped semiconductor layers 106 extending horizontally across adjacent LED units, and with their second doped semiconductor layers 108 electrically isolated between adjacent LED units.
Each LED unit 116 further includes a Multiple Quantum Well (MQW) layer 110 formed between the first and second doped semiconductor layers 106 and 108. The MQW layer 110 is the active region of the LED unit 116. In some embodiments, the thickness of the first doped semiconductor layer 106 and the second doped semiconductor layer 108 may be between about 0.3 μm and about 5 μm. In some other embodiments, the thickness of the first doped semiconductor layer 106, the MQW layer 110, and the second doped semiconductor layer 108 may be between about 0.4 μm and about 4 μm. In some alternative embodiments, the thickness of the first doped semiconductor layer 106, the MQW layer 110, and the second doped semiconductor layer 108 may be between about 0.5 μm and about 3 μm.
As shown in fig. 2, a passivation layer 112 is formed on a portion of the second and first doped semiconductor layers 108 and 106. Passivation layer 112 may be used to protect and isolate LED units 116. In some embodiments, the passivation layer 112 may include SiO 2 、Al 2 O 3 SiN or other suitable material. In some embodiments, passivation layer 112 may comprise polyimide, SU-8 photoresist, or other photopatternable polymer. An electrode layer 114 is formed on a portion of the passivation layer 112, and the electrode layer 114 is electrically connected to the second doping type semiconductor layer 108 through an opening on the passivation layer 112. In some embodiments, the electrode layer 114 may be a conductive material, such as Indium Tin Oxide (ITO), cr, ti, pt, au, al, cu, ge, or Ni.
Fig. 3 shows another cross-sectional view of an illustrative LED structure 100 along line B-B' in accordance with some embodiments of the present application. The first substrate 102 has a driving circuit formed therein for driving the LED unit 116. The contact 118 of the driving circuit is exposed between the two LED units 116, and the contact 118 is electrically connected with the second doping type semiconductor layer 108 through the electrode layer 114. In other words, the electrical connection of the second doping type semiconductor layer 108 and the contact 118 of the driving circuit is completed by the electrode layer 114. As described above, the second doping type semiconductor layer 108 forms the cathode of each LED unit 116, and thus the contact 118 supplies the driving voltage to the cathode of each LED unit 116 from the driving circuit to the second doping type semiconductor layer 108 through the electrode layer 114.
Fig. 4 illustrates another top view of an LED structure 100 according to some embodiments of the present application. In fig. 4, the layers below the electrode layer 114 and the passivation layer 112 are shown with dashed lines for explanation purposes. In fig. 4, LED structure 100 includes 16 LED units 116. Each LED unit 116 includes a p-n diode layer formed of the first and second doped semiconductor layers 106 and 108 and the multiple quantum well 110. A passivation layer 112 is formed on the p-n diode, and an electrode layer 114 is formed on the passivation layer 112.
An opening 120 is formed on the passivation layer 112 exposing the second doped semiconductor layer 108, and an opening 122 is formed on the passivation layer 112 exposing the contact 118. An electrode layer 114 is formed on a portion of the passivation layer 112 covering the opening 120 and the opening 122, and thus, the electrode layer 114 is electrically connected with the second doping type semiconductor layer 108 and the contact 118. As illustratively shown in fig. 4, an opening 120 is located at the center of each LED unit 116, and an opening 122 is located at the gap of adjacent LED units 116. It should be appreciated that the locations and designs (such as shapes and sizes) of the openings 120, 122, and the electrode layer 114 may deviate from the example shown in fig. 4 based on requirements, and are not limited thereto.
In fig. 4, LED structure 100 includes 16 LED units 116, and each LED unit 116 may operate independently. The first doped semiconductor layer 106 is located below the second doped semiconductor layer 108 and the passivation layer 112, and the first doped semiconductor layer 106 is a common anode of the 16 LED units 116. According to the present application, a plurality of LED units are said to be "independently operable" when the first doped semiconductor layers 106 of these LED units (e.g., 16 LED units 16) are electrically connected not only during the manufacturing process of forming the LED structure 100 but also after the manufacturing process, and each LED unit can be independently driven by a different driving circuit.
Fig. 5 illustrates a top view of another LED structure 500 according to some embodiments of the present application. In the top view in fig. 5, the shape of the second doped semiconductor layer 108 is circular, which is different from the shape of the second doped semiconductor layer 108 in the top view of the LED structure 100 shown in fig. 4. It should be appreciated that in some embodiments, the location and shape of the second-doped semiconductor layer 108 in the top view may vary according to various designs or applications, and the shape of the second-doped semiconductor layer 108 or the LED unit 116 in the top view is not limited thereto. In some embodiments, the location and shape of the openings 120, 122, electrode layer 114, or contacts 118 in the top view may also vary according to various designs and applications, and is not limited thereto.
Fig. 6A-6H show cross-sectional views of an illustrative LED structure 100 during a manufacturing process according to some embodiments of the present application, and fig. 7 is a flowchart of an illustrative method 700 for manufacturing an LED structure 100 according to some embodiments of the present application. For better explanation of the present application, flowcharts in fig. 6A to 6H and fig. 7 will be described together. In fig. 6A, a driving circuit is formed in the first substrate 102, and the driving circuit includes contacts 118. For example, the drive circuitry may include CMOS devices fabricated on silicon wafers, and some wafer level packaging layers or fan-out structures are stacked on the CMOS devices to form contacts 118. For another example, the drive circuitry may include TFTs fabricated on a glass substrate, and some wafer level packaging layers or fan-out structures are stacked on the TFTs to form contacts 118. The semiconductor layer is formed on the second substrate 124 and includes the first doping type semiconductor layer 106, the second doping type semiconductor layer 108, and the MQW layer 110.
In some embodiments, the first substrate 102 or the second substrate 124 may include a semiconductor material, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide. In some embodiments, the first substrate 102 or the second substrate 124 may be made of a non-conductive material, such as glass, plastic, or sapphire wafer. In some embodiments, the first substrate 102 may have a driving circuit formed therein, and the first substrate 102 may include a CMOS back plate or a TFT glass substrate. In some embodiments, the first doped semiconductor layer 106 and the second doped semiconductor layer 108 may include one or more layers based on II-VI materials (such as ZnSe or ZnO) or III-V nitride materials (such as GaN, alN, inN, inGaN, gaP, alInGaP, alGaAs and alloys thereof). In some embodiments, the first doped semiconductor layer 106 may include a p-type semiconductor layer and the second doped semiconductor layer 108 may include an n-type semiconductor layer.
In fig. 6B, a bonding layer 104 is formed on the first substrate 102. In some embodiments, the bonding layer 104 may include a conductive material, such as a metal or metal alloy. In some embodiments, the bonding layer 104 may include Au, sn, in, cu or Ti. In some embodiments, the bonding layer 104 may include a non-conductive material, such as Polyimide (PI), polydimethylsiloxane (PDMS). In some implementations, the bonding layer 104 can include a photoresist, such as SU-8 photoresist. In some embodiments, the bonding layer 104 may be Hydrogen Silsesquioxane (HSQ) or divinyl siloxane-bis-benzocyclobutene (DVS-BCB). In some embodiments, the conductive layer 126 may form a common electrode covering the first doping type semiconductor layer 106. In some embodiments, the conductive layer 126 may form an ohmic contact on the first doped semiconductor layer 106. In some embodiments, the conductive layer 126 and the bonding layer 104 may be collectively referred to as a layer in a later operation.
Referring to fig. 6C and operation 702 of fig. 7, the second substrate 124 and the semiconductor layers including the first doped semiconductor layer 106, the second doped semiconductor layer 108, and the MQW layer 110 are flipped over and bonded to the first substrate 102 through the bonding layer 104 and the conductive layer 126. Then, the second substrate 124 may be removed from the semiconductor layer. Fig. 6C shows the bonding layer 104 between the first substrate 102 and the first doping type semiconductor layer 106. However, in some embodiments, the bonding layer 104 may include one or more layers to bond the first substrate 102 and the first doped semiconductor layer 106. For example, the bonding layer 104 may comprise a single conductive or non-conductive layer. For another example, the bonding layer 104 may include an adhesive material and a conductive or non-conductive layer. In some embodiments, after operation 702, the bonding layer 104 and the conductive layer 126 may be collectively referred to as a layer. It should be understood that the description of the material of the bonding layer 104 is merely illustrative and not limiting, and that one skilled in the art may vary as desired, all of which are within the scope of the present application.
In fig. 6D, a thinning operation may be performed on the second doping type semiconductor layer 108 to remove a portion of the second doping type semiconductor layer 108. In some embodiments, the thinning operation may include a dry etching or wet etching operation. In some embodiments, the thinning operation may include a Chemical Mechanical Polishing (CMP) operation. In some embodiments, the thickness of the first doped semiconductor layer 106, the MQW layer 110, and the second doped semiconductor layer 108 may be between about 0.3 μm and about 5 μm. In some other embodiments, the thickness of the first doped semiconductor layer 106, the MQW layer 110, and the second doped semiconductor layer 108 may be between about 0.4 μm and about 4 μm. In some alternative embodiments, the thickness of the first doped semiconductor layer 106, the MQW layer 110, and the second doped semiconductor layer 108 may be between about 0.5 μm and about 3 μm.
Referring to fig. 6E and operation 704 of fig. 7, a first etching operation may be performed to remove a portion of the second doped semiconductor layer 108 and expose a portion of the first doped semiconductor layer 106. A portion of the first doping type semiconductor layer 106 is exposed until the first doping type semiconductor layer 106 of a predefined thickness remains on the first substrate 102. In some embodiments, the remaining first-doped semiconductor layer 106 extends horizontally across a plurality of LED units 116 (such as the four LED units 116 shown in fig. 6E) in the LED structure 100. In some embodiments, the predefined thickness of the first doped semiconductor layer 106 may be between about 0.05 μm and about 1 μm. In some embodiments, the predefined thickness of the first doped semiconductor layer 106 may be between about 0.05 μm and about 0.7 μm. In some alternative embodiments, the predefined thickness of the first doped semiconductor layer 106 may be between about 0.05 μm and about 0.5 μm. Following operation 704, the second doping type semiconductor layer 108 and the MQW layer 110 of each LED unit 116 may be electrically separated, and the first doping type semiconductor layers 106 of adjacent LED units 116 (such as LED units 116-1, 116-2, 116-3, and 116-4) may be electrically connected.
In some embodiments, during operation 704, a first etching operation may be performed to remove a portion of the second doped semiconductor layer 108 and expose a portion of the MQW layer 110. A portion of the MQW layer 110 is exposed until the first-doped semiconductor layer 106 and the MQW layer 110 of a predefined thickness remain on the first substrate 102. In some embodiments, the remaining first-doped semiconductor layer 106 and MQW layer 110 extend horizontally across a plurality of LED units 116 (such as the four LED units 116 shown in fig. 6E) in the LED structure 100. In some embodiments, the predefined thickness of the first doping type semiconductor layer 106 and the MQW layer 110 may be between about 0.05 μm and about 1 μm. In some embodiments, the predefined thickness of the first doping type semiconductor layer 106 and the MQW layer 110 may be between about 0.05 μm and about 0.7 μm. In some alternative embodiments, the predefined thickness of the first doping type semiconductor layer 106 and the MQW layer 110 may be between about 0.05 μm and about 0.5 μm. After operation 704, the second doped semiconductor layer 108 of each LED unit 116 may be electrically separated, and the first doped semiconductor layer 106 and the MQW layer 110 of adjacent LED units 116 (such as LED units 116-1, 116-2, 116-3, and 116-4) may be electrically connected.
Referring to fig. 6F, a second etching operation may be performed to remove a portion of the first doped semiconductor layer 106 and expose the contacts 118. The second etching operation may be a dry etching or a wet etching operation. In the dry etching operation or the wet etching operation, a hard mask (e.g., photoresist) may be formed on a portion of the second doping type semiconductor layer 108 and the first doping type semiconductor layer 106 through a photolithography process. Then, the uncovered portion of the first doping type semiconductor layer 106 is removed by a dry etching plasma or a wet etching solution to expose the contact 118.
Referring to fig. 6G and operation 706 of fig. 7, a passivation layer 112 is formed on the second doped semiconductor layer 108, the exposed first doped semiconductor layer 106, and the exposed contacts 118. In some implementations, the passivation layer 112 may include SiO 2 、Al 2 O 3 SiN or other suitable material for isolation and protection. In some embodiments, passivation layer 112 may comprise polyimide, SU-8 photoresist, or other photopatternable polymer. In operation 708 of fig. 7, as shown in fig. 6G, openings 120 and 122 are formed. The opening 120 exposes a portion of the second doped semiconductor layer 108, and the opening 122 exposes the contact 118. In some embodiments, operation 708 may be performed by a third etching operation to remove a portion of passivation layer 112 and form openings 120 and 122. In some further embodiments, the provided passivation layer 112 is formed by a photosensitive material (e.g., polyimide, SU-8 photoresist, or other photo-patternable polymer), and operation 708 may be performed by a photolithographic operation to pattern the passivation layer 112 and expose the openings 120 and 122.
Referring to fig. 6H and operation 710 of fig. 7, an electrode layer 114 is formed on the passivation layer 112 covering the openings 120 and 122. Accordingly, the electrode layer 114 electrically connects the second doping type semiconductor layer 108 and the contact 118, and forms an electrical path to connect the LED unit with the driving circuit in the substrate 102. The driving circuit may control the voltage and current levels of the second doping type semiconductor layer 108 through the contact 118 and the electrode layer 114. In some embodiments, the electrode layer 114 may include a conductive material, such as Indium Tin Oxide (ITO), cr, ti, pt, au, al, cu, ge, ni, or the like.
An LED structure and a method for fabricating the same are provided in which functional epitaxial layers, such as first doped semiconductor layer 106 and second doped semiconductor layer 108, are partially patterned/etched to allow a thin continuous functional layer (such as first doped semiconductor layer 106) to remain free of potential delamination. In addition, the present application provides another option to leave the MQW layer on the first doped semiconductor layer 106. In addition, the fabrication methods introduced in the present application may further reduce physical damage to the sidewalls of the functional pixels (such as LED units 116), reduce damage to the quantum well structure as the light emitting region of the LED, and improve the optical and electrical characteristics of the functional pixels.
According to an aspect of the present application, an LED structure is disclosed. The LED structure includes a substrate and a plurality of LED units formed on the substrate. Each LED unit includes a bonding layer formed on a substrate, a first doping type semiconductor layer formed on the bonding layer, a second doping type semiconductor layer formed on the first doping type semiconductor layer, a passivation layer formed on the second doping type semiconductor layer and a portion of the first doping type semiconductor layer; and an electrode layer formed on a portion of the passivation layer and in contact with the second doping type semiconductor layer. The plurality of LED units includes a first LED unit and a second LED unit adjacent to the first LED unit. The first doping type semiconductor layer of the first LED unit horizontally extends to the first doping type semiconductor layer of the second LED unit adjacent to the first LED unit, and the first LED unit and the second LED unit are independently operable LED units.
In some embodiments, the second doped semiconductor layer of the first LED unit is electrically isolated from the second doped semiconductor layer of the second LED unit. In some embodiments, each LED unit further includes a Multiple Quantum Well (MQW) layer formed between the first and second doped semiconductor layers.
In some embodiments, the first doped semiconductor layer is a p-type semiconductor layer and is a common anode of the first LED unit and the second LED unit. In some embodiments, the second doped semiconductor layer is an n-type semiconductor layer and is the cathode of the first LED unit and the second LED unit.
In some embodiments, the substrate includes a driving circuit to drive the plurality of LED units. In some embodiments, the electrode layer of each LED unit is connected to the driving circuit through an opening on the first doping type semiconductor layer.
According to another aspect of the present application, an LED structure is disclosed. The LED structure includes a substrate and a plurality of LED units formed on the substrate. Each LED unit includes a p-n diode layer formed on the substrate, a passivation layer formed on the p-n diode layer, and an electrode layer formed on the passivation layer and in contact with the p-n diode layer. The plurality of LED units includes a first LED unit and a second LED unit adjacent to the first LED unit. The first LED unit and the second LED unit have a common anode, and the first LED unit and the second LED unit are individually operable LED units.
In some embodiments, the p-n diode layer includes a p-doped layer, an n-doped layer, and a Multiple Quantum Well (MQW) layer formed between the p-doped layer and the n-doped layer. In some embodiments, the p-doped layer is a common anode of the first LED unit and the second LED unit. In some embodiments, the n-doped layers of the first LED unit and the second LED unit are electrically isolated.
In some embodiments, each LED unit further includes a bonding layer formed between the substrate and the p-n diode layer. In some embodiments, the substrate includes a driving circuit to drive the plurality of LED units. In some embodiments, the electrode layer of each LED unit is connected to the driving circuit through an opening on the p-n diode layer.
According to a further aspect of the present application, a method for manufacturing an LED structure is disclosed. A semiconductor layer is formed on a first substrate. The semiconductor layer includes a first doping type semiconductor layer and a second doping type semiconductor layer. A first etching operation is performed to remove a portion of the second doped semiconductor layer and expose a portion of the first doped semiconductor layer. A passivation layer is formed on the second doped semiconductor layer and the exposed first doped semiconductor layer. A first opening is formed on the passivation layer. An electrode layer is formed on the passivation layer covering the first opening and contacting the second doping type semiconductor layer.
In some embodiments, performing the first etching operation further includes removing a portion of the second doped semiconductor layer and exposing a portion of the first doped semiconductor layer until the first doped semiconductor layer of the predefined thickness remains on the first substrate. The remaining first-doped semiconductor layer extends horizontally across the plurality of LED units of the LED structure.
In some embodiments, forming the semiconductor layer on the first substrate further includes bonding the semiconductor layer to the first substrate through a bonding layer. In some embodiments, forming the semiconductor layer on the first substrate further includes: forming a driving circuit in a first substrate; forming a semiconductor layer on a second substrate; bonding the semiconductor layer to the first substrate through the bonding layer; and removing the second substrate.
In some embodiments, forming the first opening on the passivation layer further includes forming a second opening on the passivation layer to expose a contact of the driving circuit. In some embodiments, forming the electrode layer on the passivation layer covering the first opening and contacting the second doped semiconductor layer further includes forming the electrode layer on the passivation layer covering the first opening and the second opening to electrically connect the second doped semiconductor layer and the contacts of the driving circuit.
The foregoing description of the specific embodiments may be readily modified and/or adapted for use with various applications. Such adaptations and modifications are therefore intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein.
The breadth and scope of the present application should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.
Claims (7)
1. A micro LED display, comprising:
a substrate including a driving circuit and contacts of the driving circuit;
a plurality of LED units formed on the substrate, each LED unit being a functional micro LED pixel, and comprising:
a bonding layer formed on the substrate;
a first doping type semiconductor layer formed on the bonding layer;
a second doping type semiconductor layer formed on the first doping type semiconductor layer;
a multiple quantum well layer formed between the first doping type semiconductor layer and the second doping type semiconductor layer;
a passivation layer formed on the second doping type semiconductor layer and a portion of the first doping type semiconductor layer; and
an electrode layer formed on a portion of the passivation layer and in contact with the second doping type semiconductor layer,
wherein the plurality of LED units includes a first LED unit and a second LED unit adjacent to the first LED unit, wherein the first doped semiconductor layer of the first LED unit extends horizontally to the first doped semiconductor layer of the second LED unit adjacent to the first LED unit, and the first LED unit and the second LED unit are individually operable LED units;
the driving circuit is used for driving the LED units, contacts of the driving circuit are electrically connected with the second doping type semiconductor layers of the corresponding LED units through the electrode layers, and each contact is exposed between two adjacent LED units;
and, the electrode layer of each LED unit is connected to the driving circuit through an opening on the first doping type semiconductor layer.
2. The micro LED display of claim 1, wherein the second doped semiconductor layer of the first LED unit is electrically isolated from the second doped semiconductor layer of the second LED unit.
3. The micro LED display of claim 1, wherein the first doped semiconductor layer is a p-type semiconductor layer and is a common anode of the first LED unit and the second LED unit.
4. The micro LED display of claim 1, wherein the second doped semiconductor layer is an n-type semiconductor layer and is a cathode of the first LED unit and the second LED unit.
5. A micro LED display, comprising:
a substrate including a driving circuit and contacts of the driving circuit;
a plurality of LED units formed on the substrate, each LED unit being a functional micro LED pixel, and comprising:
a p-n diode layer formed on the substrate, the p-n diode layer including a p-doped layer, an n-doped layer, and a multiple quantum well layer formed between the p-doped layer and the n-doped layer;
a passivation layer formed on the p-n diode layer; and
an electrode layer formed on the passivation layer and in contact with the p-n diode layer,
a bonding layer formed between the substrate and the p-doped layer;
wherein the plurality of LED units comprises a first LED unit and a second LED unit adjacent to the first LED unit, wherein the p-doped layer extends horizontally across the plurality of LED units and serves as a common anode for the first and second LED units, and the first and second LED units are individually operable LED units, the drive circuit is for driving the LED units, and contacts of the drive circuit are electrically connected with n-doped layers of the respective LED units through electrode layers;
the electrode layer of each LED unit is connected to the driving circuit through an opening on the p-n diode layer.
6. The micro LED display of claim 5, wherein the n-doped layers of the first LED unit and the second LED unit are electrically isolated.
7. A method for manufacturing a micro LED display, comprising:
forming a driving circuit and a contact of the driving circuit on a first substrate;
forming a semiconductor layer on a second substrate, the semiconductor layer including a first doping type semiconductor layer, a second doping type semiconductor layer, and a multiple quantum well layer between the first doping type semiconductor layer and the second doping type semiconductor layer;
bonding the semiconductor layer to the first substrate through a bonding layer;
removing the second substrate;
performing a first etching operation, comprising: removing a portion of the second doped semiconductor layer and exposing a portion of the first doped semiconductor layer until a predefined thickness of the first doped semiconductor layer remains on the first substrate to form a plurality of LED units, wherein each LED unit is a functional micro LED pixel and the remaining first doped semiconductor layer extends horizontally across the plurality of LED units of the micro LED display;
forming a passivation layer on the second doping type semiconductor layer and on the exposed first doping type semiconductor layer;
forming a first opening exposing the second doping type semiconductor layer and a second opening exposing a contact of the driving circuit on the passivation layer; and
and forming an electrode layer on the passivation layer covering the first opening and contacting the second doping type semiconductor layer, thereby electrically connecting the contact of the driving circuit with the second doping type semiconductor layer of the corresponding LED unit, and further enabling the plurality of LED units to operate independently.
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| US202063007829P | 2020-04-09 | 2020-04-09 | |
| US63/007,829 | 2020-04-09 | ||
| US17/162,515 US20210320145A1 (en) | 2020-04-09 | 2021-01-29 | Light Emitting Diode Structure and Method for Manufacturing the Same |
| US17/162,515 | 2021-01-29 |
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| CN114497333A (en) * | 2021-12-21 | 2022-05-13 | 镭昱光电科技(苏州)有限公司 | Micro-LED Micro display chip and manufacturing method thereof |
| CN114628563B (en) * | 2022-05-12 | 2022-09-09 | 镭昱光电科技(苏州)有限公司 | Micro LED display chip and preparation method thereof |
| CN114759130B (en) * | 2022-06-15 | 2022-09-02 | 镭昱光电科技(苏州)有限公司 | Micro-LED display chip and preparation method thereof |
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| KR102422386B1 (en) * | 2017-04-21 | 2022-07-20 | 주식회사 루멘스 | Micro led display apparatus and method for fabricating the same |
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