CN112986800B - POR circuit testing method and device - Google Patents
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
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Abstract
The disclosure provides a POR circuit testing method and device, responding to receiving a testing instruction, and acquiring a working mode and a detection mode thereof; transmitting a preset power model to equipment to be tested according to the working mode so as to reset the equipment to be tested and output a reset feedback signal; aiming at one test of the power supply model, a reset feedback signal sent by the device to be tested is received, the reset characteristic of the reset feedback signal is determined according to the detection mode, and the test result is determined according to the reset characteristic of the feedback signal and a preset threshold corresponding to the reset characteristic. According to the embodiment of the disclosure, the POR output end of the device to be tested is not required to be led out, the identification and the test of the reset signal are realized on the premise of not influencing the device to be tested, and the independent test package is not required, so that the production cost is reduced; the embodiment of the disclosure can also automatically realize closed loop test without manually participating in the test, thereby reducing the time cost and labor cost of POR circuit test.
Description
Technical Field
The present disclosure relates to the field of electronic technologies, and in particular, to a method and an apparatus for testing a POR circuit.
Background
A Power-On Reset (POR) circuit is typically integrated in an integrated circuit with a host chip to provide a Reset function. Whether the POR circuit can send out correct reset signals in various working environments or not, and whether the system can be started normally or not is determined, so that the completeness of the test of the POR circuit is important.
The output end of the POR is required to be led out in the traditional POR circuit test, and the actual package produced in mass can not meet the test requirement, so that the package is required to be tested independently, and the production cost is increased. Because the traditional POR circuit test needs a large amount of power supply environments as the input of the equipment to be tested, whether the output signal of the equipment to be tested meets the reset requirement or not needs to be judged manually, the POR circuit test is time-consuming and labor-consuming, and the test is difficult to complete.
Disclosure of Invention
The present disclosure provides a POR circuit testing method and device.
In a first aspect, an embodiment of the present disclosure provides a method for testing a POR circuit, including:
in response to receiving the test instruction, acquiring a working mode and a detection mode therein;
transmitting a preset power model to equipment to be tested according to the working mode so as to reset the equipment to be tested and output a reset feedback signal;
and aiming at one test of the power supply model, receiving a reset feedback signal sent by the equipment to be tested, determining the reset characteristic of the reset feedback signal according to the detection mode, and determining the test result according to the reset characteristic of the feedback signal and a preset threshold corresponding to the reset characteristic.
In some embodiments, the sending the preset power model to the device under test according to the operation mode includes:
responding to the working mode being an automatic mode, and sending a preset power model to equipment to be tested; and after determining the current test result aiming at the power supply model, sending the power supply model to the equipment to be tested again until the test times reach the preset times, and stopping sending the power supply model to the equipment to be tested.
In some embodiments, the number of the preset power supply models is at least two, after the preset times of testing is completed for one preset power supply model, the other power supply model which is not tested is sent to the device to be tested according to the working mode, so that the preset times of testing is performed for the other power supply model which is not tested until all the preset power supply models are tested.
In some embodiments, the preset power model includes a first power model and/or a second power model, the first power model being a dc power model and the second power model being a non-dc power model.
In some embodiments, the step of generating the second power model comprises:
receiving a power supply parameter;
and generating a second power model with a waveform signal according to the power parameters.
In some embodiments, the power supply parameters include one or any combination of the following: the phase of the waveform, the time of the rising edge of the waveform, the amplitude of the waveform, the frequency of the waveform.
In some embodiments, the receiving the reset feedback signal sent by the device under test includes:
and receiving a reset feedback signal sent by the device to be tested according to a preset delay time.
In some embodiments, the reset feature comprises one of: the number of rising edges, the number of falling edges, the duration of the high level, the duration of the low level.
In yet another aspect, an embodiment of the present disclosure further provides a POR circuit testing apparatus, including a main control chip and a selector, the main control chip including a main control unit and a detection unit,
the main control unit is used for responding to the received test instruction and acquiring a working mode and a detection mode thereof;
the selector is used for sending a preset power supply model to equipment to be tested according to the working mode so as to reset the equipment to be tested and output a reset feedback signal;
the detection unit is used for receiving a reset feedback signal sent by the device to be tested, determining the reset characteristic of the reset feedback signal according to the detection mode, and determining the test result according to the reset characteristic of the feedback signal and a preset threshold corresponding to the reset characteristic.
In some embodiments, the selector is configured to send a preset power model to the device under test in response to the operating mode being an automatic mode; and after determining the current test result aiming at the power supply model, sending the power supply model to the equipment to be tested again until the test times reach the preset times, and stopping sending the power supply model to the equipment to be tested.
In some embodiments, the number of the preset power models is at least two, and the selector is configured to send, after completing the preset number of times of testing for one preset power model, another preset power model that is not tested to the device to be tested according to the working mode, so as to perform the preset number of times of testing for the other preset power model that is not tested until all the preset power models complete the testing.
In some embodiments, the preset power model includes a first power model and/or a second power model, the first power model being a dc power model and the second power model being a non-dc power model.
In some embodiments, the master control chip further includes a waveform generation unit, where the waveform generation unit is configured to receive a power parameter, generate a waveform signal according to the power parameter, and generate a second power model according to the waveform signal.
In some embodiments, the detecting unit is configured to receive a reset feedback signal sent by the device under test according to a preset delay time.
According to the POR circuit testing method provided by the embodiment of the disclosure, the working mode and the detection mode are acquired in response to receiving the testing instruction; transmitting a preset power model to equipment to be tested according to the working mode so as to reset the equipment to be tested and output a reset feedback signal; aiming at one test of the power supply model, a reset feedback signal sent by the device to be tested is received, the reset characteristic of the reset feedback signal is determined according to the detection mode, and the test result is determined according to the reset characteristic of the feedback signal and a preset threshold corresponding to the reset characteristic. According to the embodiment of the disclosure, the power supply model is sent to the equipment to be tested, whether the reset is effective is determined according to the reset feedback signal obtained by resetting the equipment to be tested based on the power supply model, the POR output end of the equipment to be tested is not required to be led out, the identification and the test of the reset signal are realized on the premise that the equipment to be tested is not influenced, the independent test package is not required, and the production cost is reduced; the embodiment of the disclosure can also automatically complete the output of the power supply model, automatically detect whether the device to be tested can send an effective reset feedback signal according to the power supply model after being electrified, realize closed loop test, and reduce the time cost and labor cost of POR circuit test without manual participation in the test.
Drawings
FIG. 1 is a flow chart of a POR circuit testing method according to an embodiment of the disclosure;
FIG. 2 is a schematic diagram of a POR circuit test principle provided in an embodiment of the disclosure;
FIG. 3 is a schematic flow chart of generating a second power model according to an embodiment of the disclosure;
FIG. 4 is a schematic diagram showing a POR circuit testing device according to an embodiment of the disclosure;
fig. 5 is a schematic diagram of a second structure of the POR circuit testing apparatus according to the embodiment of the disclosure.
Detailed Description
Example embodiments will be described more fully hereinafter with reference to the accompanying drawings, but may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Embodiments described herein may be described with reference to plan and/or cross-sectional views with the aid of idealized schematic diagrams of the present disclosure. Accordingly, the example illustrations may be modified in accordance with manufacturing techniques and/or tolerances. Thus, the embodiments are not limited to the embodiments shown in the drawings, but include modifications of the configuration formed based on the manufacturing process. Thus, the regions illustrated in the figures have schematic properties and the shapes of the regions illustrated in the figures illustrate the particular shapes of the regions of the elements, but are not intended to be limiting.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
The embodiment of the disclosure provides a POR circuit testing method, as shown in FIG. 2, which is applied to a POR circuit testing device for testing a POR circuit in a DUT (Device Under Test ).
Referring to fig. 1 and 2, the method for testing the POR circuit includes the following steps:
and step 11, responding to the received test instruction, and acquiring the working mode and the detection mode thereof.
The POR circuit test device receives a test instruction input by a user (i.e., a worker), as shown in FIG. 2, wherein the test instruction can be input by the user through a key and/or a display screen (e.g., a liquid crystal display) on the POR circuit test device, and the test instruction carries an operation mode and a detection mode. The working mode at least comprises an automatic mode and a manual mode, and in the automatic mode, POR circuit test is automatically carried out in the whole process without manual intervention. In the manual mode, after each POR circuit test is completed, the next POR circuit test needs to be manually started. In different detection modes, the reset characteristics selected for carrying out POR circuit test are different.
And step 12, transmitting the preset power model to the equipment to be tested according to the working mode so as to reset the equipment to be tested and output a reset feedback signal.
The power model is preset in the main control chip, and in this step, the mode of sending the power model to the DUT of the device to be tested is different according to different working modes. The power supply model is used as an input signal of the DUT, triggers the DUT to carry out reset operation, generates a reset feedback signal after the DUT is reset, and sends the reset feedback signal to the POR circuit testing device.
Step 13, for one test of the power supply model, receiving a reset feedback signal sent by the device to be tested, determining a reset characteristic of the reset feedback signal according to the detection mode, and determining a test result according to the reset characteristic of the feedback signal and a preset threshold corresponding to the reset characteristic.
The test result comprises the success or failure of resetting, and the POR circuit test device is preset with the threshold value corresponding to each reset characteristic.
In this step, after receiving the reset feedback signal sent by the device to be tested, the POR circuit testing device determines the reset feature corresponding to the detection mode and the corresponding threshold value thereof, and judges whether the reset feature of the feedback signal meets the threshold value, if yes, the POR circuit test of the power supply model is considered to pass (i.e. reset is successful); if not, the current POR circuit test of the power supply model is considered to be failed (i.e. reset failure).
According to the POR circuit testing method provided by the embodiment of the disclosure, the working mode and the detection mode are acquired in response to receiving the testing instruction; transmitting a preset power model to equipment to be tested according to the working mode so as to reset the equipment to be tested and output a reset feedback signal; aiming at one test of the power supply model, a reset feedback signal sent by the device to be tested is received, the reset characteristic of the reset feedback signal is determined according to the detection mode, and the test result is determined according to the reset characteristic of the feedback signal and a preset threshold corresponding to the reset characteristic. According to the embodiment of the disclosure, the power supply model is sent to the equipment to be tested, whether the reset is effective is determined according to the reset feedback signal obtained by resetting the equipment to be tested based on the power supply model, the POR output end of the equipment to be tested is not required to be led out, the identification and the test of the reset signal are realized on the premise that the equipment to be tested is not influenced, the independent test package is not required, and the production cost is reduced; the embodiment of the disclosure can also automatically complete the output of the power supply model, automatically detect whether the device to be tested can send an effective reset feedback signal according to the power supply model after being electrified, realize closed loop test, and reduce the time cost and labor cost of POR circuit test without manual participation in the test.
In some embodiments, the preset power model is sent to the device under test (i.e. step 12) according to the operation mode, including the steps of: responding to the working mode being an automatic mode, and sending a preset power model to the equipment to be tested; and after determining the current test result aiming at the power supply model, sending the power supply model to the equipment to be tested again until the test times reach the preset times, and stopping sending the power supply model to the equipment to be tested. In general, the POR circuit is tested several times, and the final conclusion of whether the reset is successful is obtained by counting the test results of each time. That is, in the automatic mode, after 1 test of the POR circuit for a certain power supply model is completed, the 2 nd and 3 rd tests for the power supply model are automatically performed until the predetermined number of tests are completed. The embodiment of the disclosure can automatically perform repeated tests, and saves manpower and material resources compared with the traditional POR circuit test scheme.
In some embodiments, the preset power model is sent to the device under test (i.e. step 12) according to the operation mode, including the steps of: and transmitting the preset power model to the device to be tested in response to the working mode being a manual mode. That is, in the manual mode, after completing 1 test of the POR circuit for a certain power model, the next test is not automatically performed, but the test is suspended, the next test is manually triggered by the user, and the user can analyze the test result between the two tests.
To simulate different power supply environments, in some embodiments, there are at least two preset power supply models, and embodiments of the present disclosure support built-in multiple test simulation power supply models, e.g., power supply models with different rise times, power supply large ripple models, etc.
After completing the test of the preset times for one preset power supply model, sending the other power supply model which is not tested to the equipment to be tested according to the working mode, and performing the test of the preset times for the other power supply model which is not tested until all the preset power supply models are tested. That is, in the automatic mode, the power supply models are tested one by one, and after a preset number of times, the next power supply model is started to be tested. As shown in fig. 2, the selector switches the power supply models to be tested, and it should be noted that the test sequence of each power supply model is not limited, and the power supply models may be selected randomly, or the test may be performed according to the sequence in which the user sets the power supply models in the POR circuit test device.
In some embodiments, the predetermined power model includes a first power model that is a dc power model and/or a second power model that is a non-dc power model. The non-dc power model is a power model whose waveform is nonlinear, for example, a power model whose waveform is a sine wave, a square wave, a triangle wave, or the like. As shown in fig. 2, for example, there are 3 preset power supply models, 2 first power supply models, respectively, a direct current power supply model of 1.8V and a direct current power supply model of 3.3V, and 1 second power supply model (i.e., a power supply model generated by the waveform generation unit).
In some embodiments, the POR circuit testing apparatus may further generate a second power model, and correspondingly, as shown in fig. 3, the step of generating the second power model includes:
step 21, receiving a power parameter.
The power supply parameters may be set, altered by the user, and in some embodiments, may include one or any combination of the following: the phase (offset) of the waveform, the time of the rising edge of the waveform, the amplitude of the waveform, the frequency of the waveform. For example, the amplitude of the waveform may be 0-5V and the frequency of the waveform may be 10KHz.
Step 22, a second power model with waveform signals is generated according to the power parameters.
In this step, as shown in fig. 2, a second power model having a waveform signal is generated by a waveform generating unit (i.e., waveform generator). The method comprises the steps of triggering a DAC (digital-to-analog converter) chip (such as an STM32 chip) with a DMA (Direct Memory Access) function by using a timer to generate a second power supply model with a waveform signal, sending the second power supply model to a driving module through a DAC interface of a waveform generation unit, and sending the second power supply model to a device to be tested through a selector. The driving module selects a chip with a quick response function, such as an LM675 operational amplifier chip, and the power supply driving adjustment resolution of the chip is 100uS, so that the power supply model can be more similar to an actual use scene. The second power model may be a periodic waveform of arbitrary shape and may drive a 300ma load.
In some embodiments, the receiving a reset feedback signal sent by the device under test (step 13) includes the following steps: and receiving a reset feedback signal sent by the device to be tested according to the preset delay time. That is, after the preset power model is sent to the device under test, a preset delay time is delayed to receive the reset feedback signal sent by the device under test.
In some embodiments, the reset feature may include one of: the number of rising edges, the number of falling edges, the duration of the high level, the duration of the low level. A detection mode corresponds to a reset feature, one reset feature has a corresponding threshold, and whether the POR circuit test passes or not is determined by judging whether the reset feature of the feedback signal meets the condition of the corresponding threshold.
In the embodiment of the disclosure, a user starts a POR circuit test through a key and a display screen, and after receiving a test instruction, the POR circuit test device outputs a power model to the DUT through a selector, and meanwhile collects a reset feedback signal of the DUT, judges the reset feedback signal and gives a test result. The user may obtain the test report through a display screen or a connected PC.
The embodiment of the disclosure can customize and output the power supply model for testing the POR circuit, so that the POR circuit test of the product is more perfect, and the detection mode can be customized, thereby realizing the judgment of the reset effect without affecting the DUT.
Based on the same technical concept, the embodiment of the disclosure further provides a POR circuit testing device, as shown in fig. 4, including a main control chip 10 and a selector 20, where the main control chip 10 includes a main control unit 101 and a detection unit 102, and the main control unit 101 is configured to obtain, in response to receiving a test instruction, a working mode and a detection mode therein.
The selector 20 is configured to send a preset power model to the device under test according to the operation mode, so as to reset the device under test and output a reset feedback signal.
The detection unit is used for receiving a reset feedback signal sent by the device to be tested, determining the reset characteristic of the reset feedback signal according to the detection mode, and determining the test result according to the reset characteristic of the feedback signal and a preset threshold corresponding to the reset characteristic.
In some embodiments, the selector 20 is configured to send the preset power model to the device under test in response to the operating mode being an automatic mode; and after determining the current test result aiming at the power supply model, sending the power supply model to the equipment to be tested again until the test times reach the preset times, and stopping sending the power supply model to the equipment to be tested.
In some embodiments, the number of the preset power models is at least two, and the selector 20 is configured to send another power model that is not tested to the device to be tested according to the operation mode after completing the test for the preset number of times for one power model, so as to perform the test for the preset number of times for the other power model that is not tested until all the power models are tested.
In some embodiments, the preset power model includes a first power model and/or a second power model, the first power model being a dc power model and the second power model being a non-dc power model.
In some embodiments, as shown in fig. 5, the main control chip 10 further includes a waveform generation unit 103, where the waveform generation unit 103 is configured to receive power parameters, and generate a second power model with a waveform signal according to the power parameters.
In some embodiments, the power supply parameters include one or any combination of the following: the phase of the waveform, the time of the rising edge of the waveform, the amplitude of the waveform, the frequency of the waveform.
In some embodiments, the detecting unit 102 is configured to receive a reset feedback signal sent by the device under test according to a preset delay time.
In some embodiments, the reset feature comprises one of: the number of rising edges, the number of falling edges, the duration of the high level, the duration of the low level.
The man-machine interaction interface of the POR circuit testing device is realized by adopting a display screen to display and key input. The main interface provides 5 functions, namely automatic, inquiry, manual and waveform generation and setting functions, wherein the automatic, inquiry, manual and waveform generation are working modes, and the test interface is switched after the working modes are entered. The query mode refers to not performing the POR circuit test, only querying the history test result, and the waveform generation mode refers to not performing the POR circuit test, only generating the waveform (i.e., the second power model). The manual mode refers to that the POR circuit testing device generates a power supply model meeting the testing requirement, and a user judges whether the DUT generates a valid reset signal or not by himself so as to be convenient for debugging. The test interface can display the current working mode, and also can display the information of the current tested power model, the reset signal detection standard, the current test times and the counted test results. The settings interface currently provides 3 settings: (1) test delay (Detect delay): the delay time is used for setting a detection standard; (2) a detection Mode (Detect Mode); (3) threshold (Detect Number): for setting the threshold of the reset feature.
The main control chip of the POR circuit testing device can be an STM32 chip of a digital-to-analog converter with a hardware DMA function. The detection unit is an input/output interface with a rising edge, a falling edge, a high-low level triggering external interrupt function and an Analog-to-digital converter (Analog-to-digital converter) function on the main control chip.
As shown in fig. 2, the POR circuit testing device according to the embodiment of the present disclosure may also communicate with an upper computer through a USB (Universal Serial Bus ) interface, and the upper computer may provide functions of reading or updating a power model, configuring a detection mode, reading and generating a test report, and the like. The power model can also be manually drawn by a host computer or automatically generated by given parameters.
Because the functions of the upper computer are more perfect, the man-machine interaction interface is more friendly, and the POR circuit test function can be directly integrated on the external card of the PC, so that the generation from the POR circuit test to the test report is more automatic.
Those of ordinary skill in the art will appreciate that all or some of the steps of the methods, functional modules/units in the apparatus disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed cooperatively by several physical components. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted in a generic and descriptive sense only and not for purpose of limitation. In some instances, it will be apparent to one skilled in the art that features, characteristics, and/or elements described in connection with a particular embodiment may be used alone or in combination with other embodiments unless explicitly stated otherwise. It will therefore be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the scope of the present invention as set forth in the following claims.
Claims (14)
1. A method for testing a POR circuit, the method comprising:
in response to receiving the test instruction, acquiring a working mode and a detection mode therein;
transmitting a preset power model to equipment to be tested according to the working mode so as to reset the equipment to be tested and output a reset feedback signal;
for one-time test of the power supply model, receiving a reset feedback signal sent by the equipment to be tested, determining the reset characteristic of the reset feedback signal according to the detection mode, and determining the test result according to the reset characteristic of the feedback signal and a preset threshold corresponding to the reset characteristic; one detection mode corresponds to one reset feature, one reset feature has a corresponding threshold, and the reset features are different in different detection modes.
2. The method of claim 1, wherein the transmitting the preset power model to the device under test according to the operating mode comprises:
responding to the working mode being an automatic mode, and sending a preset power model to equipment to be tested; and after determining the current test result aiming at the power supply model, sending the power supply model to the equipment to be tested again until the test times reach the preset times, and stopping sending the power supply model to the equipment to be tested.
3. The method of claim 2, wherein the number of the preset power models is at least two, and after completing the test for the preset number of times for one preset power model, the other non-tested preset power model is sent to the device to be tested according to the operation mode, so as to perform the test for the preset number of times for the other non-tested preset power model until all the preset power models are completed.
4. The method of claim 1, wherein the predetermined power model comprises a first power model and/or a second power model, the first power model being a dc power model and the second power model being a non-dc power model.
5. The method of claim 4, wherein generating the second power model comprises:
receiving a power supply parameter;
and generating a second power model with a waveform signal according to the power parameters.
6. The method of claim 5, wherein the power supply parameters include one or any combination of: the phase of the waveform, the time of the rising edge of the waveform, the amplitude of the waveform, the frequency of the waveform.
7. The method of claim 1, wherein receiving the reset feedback signal sent by the device under test comprises:
and receiving a reset feedback signal sent by the device to be tested according to a preset delay time.
8. The method of any of claims 1-7, wherein the reset feature comprises one of: the number of rising edges, the number of falling edges, the duration of the high level, the duration of the low level.
9. A POR circuit testing device is characterized by comprising a main control chip and a selector, wherein the main control chip comprises a main control unit and a detection unit,
the main control unit is used for responding to the received test instruction and acquiring a working mode and a detection mode thereof;
the selector is used for sending a preset power supply model to equipment to be tested according to the working mode so as to reset the equipment to be tested and output a reset feedback signal;
the detection unit is used for receiving a reset feedback signal sent by the equipment to be tested, determining the reset characteristic of the reset feedback signal according to the detection mode, and determining the test result according to the reset characteristic of the feedback signal and a preset threshold corresponding to the reset characteristic; one detection mode corresponds to one reset feature, one reset feature has a corresponding threshold, and the reset features are different in different detection modes.
10. The POR circuit testing apparatus as defined in claim 9, wherein said selector is adapted to send a predetermined power model to the device under test in response to said operation mode being an automatic mode; and after determining the current test result aiming at the power supply model, sending the power supply model to the equipment to be tested again until the test times reach the preset times, and stopping sending the power supply model to the equipment to be tested.
11. The apparatus according to claim 10, wherein the number of the predetermined power supply models is at least two, and the selector is configured to send another predetermined power supply model which is not tested to the device to be tested according to the operation mode after completing the predetermined number of times of testing for one predetermined power supply model, so as to perform the predetermined number of times of testing for the other predetermined power supply model which is not tested until all the predetermined power supply models are tested.
12. The POR circuit testing apparatus as defined in claim 11, wherein said predetermined power supply model comprises a first power supply model and/or a second power supply model, said first power supply model being a dc power supply model, said second power supply model being a non-dc power supply model.
13. The POR circuit testing apparatus as defined in claim 12, wherein said main control chip further comprises a waveform generation unit for receiving power parameters, generating a waveform signal based on said power parameters, and generating a second power model based on said waveform signal.
14. The apparatus for testing a POR circuit as defined in claim 9, wherein said detecting unit is configured to receive a reset feedback signal sent by said device under test according to a predetermined delay time.
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CN102692596A (en) * | 2011-03-24 | 2012-09-26 | 飞思卡尔半导体公司 | Selectable threshold reset circuit |
CN106443414A (en) * | 2016-09-28 | 2017-02-22 | 上海德布森电气有限公司 | Detection device for single-phase voltage self-resetting module |
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