CN112928185B - Preparation method of silicon surface passivation layer - Google Patents
Preparation method of silicon surface passivation layer Download PDFInfo
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- CN112928185B CN112928185B CN202110185158.0A CN202110185158A CN112928185B CN 112928185 B CN112928185 B CN 112928185B CN 202110185158 A CN202110185158 A CN 202110185158A CN 112928185 B CN112928185 B CN 112928185B
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 98
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 98
- 239000010703 silicon Substances 0.000 title claims abstract description 98
- 238000002161 passivation Methods 0.000 title claims abstract description 40
- 238000002360 preparation method Methods 0.000 title claims abstract description 17
- 238000000034 method Methods 0.000 claims abstract description 23
- HLLICFJUWSZHRJ-UHFFFAOYSA-N tioxidazole Chemical compound CCCOC1=CC=C2N=C(NC(=O)OC)SC2=C1 HLLICFJUWSZHRJ-UHFFFAOYSA-N 0.000 claims abstract description 22
- 229910003087 TiOx Inorganic materials 0.000 claims abstract description 21
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 21
- 239000008367 deionised water Substances 0.000 claims abstract description 19
- 229910021641 deionized water Inorganic materials 0.000 claims abstract description 19
- 239000007864 aqueous solution Substances 0.000 claims abstract description 9
- 238000004140 cleaning Methods 0.000 claims abstract description 8
- 238000000231 atomic layer deposition Methods 0.000 claims abstract description 7
- 238000001035 drying Methods 0.000 claims abstract description 7
- 239000012495 reaction gas Substances 0.000 claims description 14
- 238000011010 flushing procedure Methods 0.000 claims description 12
- 238000010438 heat treatment Methods 0.000 claims description 12
- 239000011259 mixed solution Substances 0.000 claims description 6
- 239000000243 solution Substances 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- 239000007789 gas Substances 0.000 claims description 4
- 238000010926 purge Methods 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- 230000005587 bubbling Effects 0.000 claims description 3
- 238000007599 discharging Methods 0.000 claims description 3
- 239000012535 impurity Substances 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 238000004857 zone melting Methods 0.000 claims description 3
- 238000007654 immersion Methods 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
- 150000003376 silicon Chemical class 0.000 claims 1
- 230000001351 cycling effect Effects 0.000 abstract 1
- 239000010408 film Substances 0.000 description 18
- 238000005516 engineering process Methods 0.000 description 7
- 238000006243 chemical reaction Methods 0.000 description 5
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005265 energy consumption Methods 0.000 description 2
- 230000035484 reaction time Effects 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000006206 glycosylation reaction Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 231100000331 toxic Toxicity 0.000 description 1
- 230000002588 toxic effect Effects 0.000 description 1
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Abstract
The application discloses a preparation method of a silicon surface passivation layer, which comprises the following steps: cleaning and impurity-removing a silicon wafer, and immersing the silicon wafer in an HF aqueous solution with the volume concentration of 10%; then at N 2 Baking and drying are carried out in the environment to obtain a dried silicon wafer; immersing the dried silicon wafer into an HF aqueous solution with the volume concentration of 10-50% for surface group treatment, and cleaning with deionized water to obtain an F-base silicon wafer; placing F-base silicon wafer into atomic layer deposition equipment, alternately introducing TiCl at 60-180deg.C 4 And H 2 O, repeatedly cycling, and preparing TiOx film layers on the front surface and the back surface of the silicon wafer, namely the passivation layer. The application realizes the passivation of the silicon surface with high minority carrier lifetime, avoids the high temperature process in the preparation of the traditional passivation film, and the minority carrier lifetime of the prepared TiOx passivation silicon wafer can directly reach 1.5-1.8ms, which is improved by about 30% compared with the minority carrier lifetime of the annealed TiOx passivation film reported at present.
Description
Field of the art
The application relates to a preparation method of a silicon surface passivation layer.
(II) background art
PERC (Passivated Emitter and Rear Cell), the emitter and back passivation cell technology, was first proposed in 1983 by Martin Green, australian scientist, and is now becoming the next generation of conventional technology for solar cells. PERC has been continuously refreshed in recent years with efficiency records, and the PERC technology improves the conversion efficiency by preparing a passivation layer on the backlight side of the cell. The higher efficiency levels in standard cell structures are limited by the tendency of photogenerated carriers to recombine.
The concept of TOPCON cell was proposed by Freunhofer solar systems institute of Germany (Fraunhofer-ISE) in 2013, TOPCON front side is not essentially different from conventional N-type solar cells, the cell core technology is back passivation contact, and the back side of silicon wafer is composed of a layer of ultra-thin silicon oxide (1-2 nm) and a layer of phosphor doped microcrystalline amorphous mixed Si film. Annealing at 850 ℃ and iVoc>710mV, J0 at 9-13fA/cm 2 Excellent passivation performance of the passivation contact structure is shown. The current world record (25.8%) of N-type front junction passivation contact solar cells was maintained by the Fraunhofer-ISE institute.
The two advanced solar cell technologies have higher requirements on the passivation level of the surface of the silicon wafer, and the basis for realizing higher conversion efficiency is the passivation technology of the surface of the silicon.
The prior art mainly prepares SiO 2 Or aSi: h is hydrogenated amorphous silicon as passivation layer, siO 2 If the thermal oxidation technology is adopted, the preparation itself requires a high temperature of more than 800 ℃, the preparation of hydrogenated amorphous silicon requires PECVD process equipment, the equipment itself is high in cost, and after the process, the hydrogenated amorphous silicon needs to be annealed at 800 ℃ to activate the passivation effect, mainly the energy consumption and the equipment cost are high.
(III) summary of the application
The application aims to provide a preparation method of a passivation layer on a silicon surface, which is used for passivating defects such as dangling bonds on the silicon surface, reducing the probability of carrier recombination at the defect and achieving the purpose of prolonging the service life of minority carriers. The method is further applied to the silicon solar cell, and the corresponding photoelectric conversion efficiency is improved.
The technical scheme adopted by the application is as follows:
the application provides a preparation method of a silicon surface passivation layerThe method comprises the following steps: (1) After cleaning and impurity removing the silicon wafer, immersing the silicon wafer into 10% HF aqueous solution with volume concentration to remove H on the surface of the silicon wafer 2 O 2 An SiOx layer formed by oxidation (room temperature, preferably 3 minutes); then at N 2 Baking and drying are carried out in the environment to obtain a dried silicon wafer; (2) Immersing the dried silicon wafer into an HF aqueous solution with the volume concentration of 10-50% for surface group treatment, and cleaning with deionized water to obtain an F-base silicon wafer; (3) Placing F-base silicon wafer into atomic layer deposition equipment, alternately introducing TiCl at 60-180deg.C 4 And H 2 And O, repeating the cycle until the TiOx film layer with the required thickness is prepared on the front surface and the back surface of the silicon wafer, namely the passivation layer.
Further, the silicon wafer in the step (1) is a double-sided polished zone-melting silicon wafer, the resistivity is 1-5 ohm cm, and the thickness is 280 μm, but the silicon wafer is not limited to the specification.
Further, the step of cleaning and impurity removing the silicon wafer in the step (1) comprises the following steps: 1) Immersing a silicon wafer into H with the volume ratio of 3:1 2 SO 4 And H 2 O 2 Heating to 100 ℃ and preserving heat for 15 minutes; taking out the silicon wafer, flushing with deionized water for not less than 2 minutes (preferably 2 minutes);
2) Immersing the silicon wafer cleaned in the step 1) into NH with the volume ratio of 1:1:5 4 OH、H 2 O 2 Heating to 80 ℃ in a mixed solution of deionized water, and preserving heat for 15 minutes; taking out the silicon wafer, flushing with deionized water for not less than 2 minutes (preferably 2 minutes);
3) Immersing the silicon wafer cleaned in the step 2) into HCl and H with the volume ratio of 1:1:5 2 O 2 Heating to 80 ℃ in a mixed solution of deionized water, and preserving heat for 15 minutes; and taking out the silicon wafer, flushing with deionized water for not less than 2 minutes (preferably 2 minutes), and obtaining the cleaned silicon wafer.
Further, step (1) N 2 The baking and drying conditions under the environment are as follows: heating by adopting a non-contact infrared lamp tube at 105 ℃ for 1 hour.
Further, the silicon wafer after the drying in the step (2) is placed in an aqueous solution of HF with the volume concentration of 10-50 percentImmersing at room temperature (25-30deg.C) for 3 min, and introducing N 2 Bubbling, N 2 The flow rate was controlled at 50sccm.
Further, tiCl in step (3) 4 And H 2 The O feeding condition is as follows: at 60-180deg.C, the wheel flow is introduced into 50sccm TiCl 4 600ms and 50sccm H 2 O100 ms, 50sccm N was introduced before each reaction gas was introduced 2 30s is taken as purge gas, unreacted reaction gas is discharged, and process influence is avoided; repeating the above steps for 10-100 times until the TiOx film layer reaches the thickness required to be prepared; after the first 20 cycles and each time the reaction gas is introduced, the chamber is sealed for 2s, so that the reaction gas is better nucleated and attached to the surface of the F-radical silicon wafer.
Further, the TiOx film thickness of step (3) is determined by the number of cycles of the previous step, and 1 cycle can produce a film thickness of about 0.15nm.
Compared with the prior art, the application has the beneficial effects that:
(1) The preparation method does not need toxic reagents, and is environment-friendly;
(2) In the traditional TiOx film passivation method, high-temperature annealing is needed to activate the passivation effect of the TiOx, but the preparation method of the application has no high-temperature process, reduces the possibility of silicon body lattice variation caused by high temperature, has low energy consumption, effectively reduces the preparation cost, and is easy for industrialized popularization.
(3) The application uses a silicon wafer surface treatment process, provides a method for taking F-base of the silicon surface as a growth substrate of a TiOx passivation film layer, prepares the TiOx passivation film layer through an atomic layer deposition process, adds a nucleation step in the film layer deposition process, has the advantages of an ALD fast mode and a stay mode, realizes the passivation of the silicon surface with high minority carrier lifetime, avoids a high-temperature process in the preparation of a traditional passivation film, and can reach 0.8-1.2ms before annealing the minority carrier lifetime of the silicon wafer for preparing the TiOx passivation film by the traditional method. The minority carrier lifetime of the TiOx passivated silicon wafer prepared by the method can directly reach 1.5-1.8ms, which is improved by about 30% compared with the minority carrier lifetime of the annealed TiOx passivation film reported at present.
(IV) description of the drawings
Fig. 1 is a schematic view of a TiOx film passivation silicon wafer, a being a TiOx passivation film, B being an F-based silicon surface, C being a silicon wafer.
Fig. 2 is a timing diagram of TiOx film reaction.
Fig. 3 is a plot of carrier concentration versus minority carrier lifetime at different F-times.
Fig. 4 is a plot of carrier concentration versus minority carrier lifetime at different preparation temperatures.
Fig. 5 is a plot of carrier concentration versus minority carrier lifetime for different cycles.
Fig. 6 is a plot of carrier concentration versus minority carrier lifetime for different HF concentrations.
(fifth) detailed description of the application
The application will be further described with reference to the following specific examples, but the scope of the application is not limited thereto:
the resistivity of deionized water in the embodiment of the application is greater than 18.2MΩ. H used in the embodiment of the application 2 SO 4 、H 2 O 2 、NH 4 OH and HCl are calculated according to 100% purity.
EXAMPLE 1 preparation of silicon surface passivation layer
1. Cleaning
(1) Immersing a raw silicon wafer (double-side polished zone-melting silicon wafer, resistivity 1-5 ohm cm, thickness 280 μm, phi 2 inch) into H with volume ratio of 3:1 2 SO 4 And H 2 O 2 Heating to 100 ℃ and preserving heat for 15 minutes; taking out the silicon wafer, flushing the silicon wafer by using deionized water for 2 minutes;
(2) Immersing the silicon wafer cleaned in the step (1) into NH with the volume ratio of 1:1:5 4 OH、H 2 O 2 Heating to 80 ℃ in a mixed solution of deionized water, and preserving heat for 15 minutes; taking out the silicon wafer, flushing the silicon wafer by using deionized water for 2 minutes;
(3) Immersing the silicon wafer cleaned in the step (2) into HCl and H with the volume ratio of 1:1:5 2 O 2 Heating to 80 ℃ in the mixed solution of deionized water, and preserving heat15 minutes; taking out the silicon wafer, flushing the silicon wafer by using deionized water for 2 minutes;
(4) Immersing the silicon wafer cleaned in the step (3) into an aqueous solution of HF with the mass concentration of 10%, immersing for 3 minutes at room temperature, and introducing N in the process 2 Bubbling, N 2 The flow is controlled at 50sccm, so that the reaction between HF and SiOx formed on the surface of the silicon wafer is ensured to be complete; taking out the silicon wafer, flushing the silicon wafer by using deionized water, and removing solution residues; silicon wafer is put into N 2 Baking and drying are carried out in the environment, non-contact infrared lamp tubes are adopted for baking, the heating temperature is 105 ℃, and the baking time is 1 hour;
2. factor of F-based treatment
(1) Time of
Immersing the silicon wafer dried in the step (4) into 50% HF water solution in volume concentration, respectively immersing for 1-8 hours (specifically 1, 3, 5 and 8 hours) at room temperature, carrying out surface group treatment, and taking out the silicon wafer to obtain the F-base silicon wafer. Placing into atomic layer deposition equipment (Tald), circulating at 60deg.C under 50sccm TiCl 4 600ms and 50sccm H 2 O100 ms, 50sccm N was introduced before each reaction gas was introduced 2 And (3) taking 30s as a purge gas, and discharging unreacted reaction gas to avoid process influence. The cycle was repeated 100 times. The first 20 cycles, after each time of introducing the reaction gas, the chamber is sealed for 2s, so that the reaction gas is better nucleated and attached to the surface of the F-group silicon wafer, a reaction time sequence chart is shown in figure 2, tiOx film layers with the thickness of 12nm are prepared on the front side and the back side of the surface of the silicon wafer, a WCT-120 minority carrier lifetime tester manufactured by Siton company is adopted for testing, the result is shown in figure 3, and the relation curve between the carrier concentration and minority carrier lifetime under the same F-group time is shown in figure 3, and the carrier concentration is 1 x 10 15 In place, it can be seen that the F-glycosylation time is 5 hours, and the TiOx passivation layer is prepared with the highest minority carrier lifetime, about 1.8ms.
(2) Concentration of aqueous HF solution
The aqueous HF solution in step (1) was changed to 10-50% (specifically 10%, 20%, 30%, 50%) and the soaking time was 5 hours, the other operations were the same, and as a result, see fig. 6, the highest lifetime was obtained in the 50% concentration HF solution, so that the 50% concentration was used as the base process.
3. Factors influencing the production of TiOx thin film layers
(1) Temperature (temperature)
Placing the F-group silicon wafer immersed in 50% HF aqueous solution in step 2 for 5 hours into an atomic layer deposition device, respectively introducing a wheel flow into 50sccm TiCl at 60-180deg.C (60, 80, 120, 150, 180 ℃) 4 600ms and 50sccm H 2 O100 ms, 50sccm N was introduced before each reaction gas was introduced 2 And (3) taking 30s as a purge gas, and discharging unreacted reaction gas to avoid process influence. The above cycle was repeated 100 times. And after the reaction gas is introduced into the first 20 cycles, the chamber is sealed for 2s each time, so that the reaction gas is better nucleated and is attached to the surface of the F-radical silicon wafer, a reaction time sequence chart is shown in figure 2, a TiOx film layer with the thickness of 12nm is prepared on the front side and the back side of the surface of the silicon wafer, and the WCT-120 minority carrier lifetime tester of Siton company is adopted for testing minority carrier lifetime.
The results are shown in FIG. 4, where the carrier concentration at different preparation temperatures is 1 x 10, versus minority carrier lifetime 15 In place, it can be seen that the TiOx passivation layer prepared at 60 degrees celsius has the highest minority carrier lifetime, about 1.5ms.
(2) Number of cycles
The temperature in the step (1) is changed to 60 ℃, the cycle times are respectively changed to 10, 30, 50, 80 and 100, other operations are the same, and the thickness of a film layer which can be generated in 1 cycle is about 0.15nm, and the result is shown in fig. 5.
Claims (5)
1. The preparation method of the silicon surface passivation layer is characterized by comprising the following steps: (1) After cleaning and impurity removing the silicon wafer, immersing the silicon wafer into 10% HF aqueous solution with volume concentration to remove H on the surface of the silicon wafer 2 O 2 An SiOx layer formed by oxidation; then at N 2 Baking and drying are carried out in the environment to obtain a dried silicon wafer; (2) Immersing the dried silicon wafer in an HF water solution with the volume concentration of 50%, and immersing for 5 hours at room temperature to perform surface group treatment to obtain an F-base silicon wafer; (3) Placing F-acylated silicon wafer into atomic layer deposition equipment, introducing 50sccm TiCl into the wheel flow at 60deg.C 4 600ms and 50sccm H 2 O100 ms, 50sccm N was introduced before each reaction gas was introduced 2 Discharging unreacted reaction gas by using 30s as a purge gas, and repeating the cycle for 100 times; the first 20 cycles, each time TiCl is introduced 4 And H 2 And (3) after O, sealing the chamber for 2s, and preparing TiOx film layers on the front and back surfaces of the silicon wafer, namely, the passivation layer.
2. The method of claim 1, wherein the silicon wafer in step (1) is a double-sided polished zone-melting silicon wafer with a resistivity of 1-5 ohm cm.
3. The method for preparing a passivation layer on a silicon surface according to claim 1, wherein the step of cleaning and impurity-removing the silicon wafer in the step (1) comprises the steps of: 1) Immersing a silicon wafer into H with the volume ratio of 3:1 2 SO 4 And H 2 O 2 Heating to 100 ℃ and preserving heat for 15 minutes; taking out the silicon wafer, flushing the silicon wafer by using deionized water, wherein the flushing time is not less than 2 minutes;
2) Immersing the silicon wafer cleaned in the step 1) into NH with the volume ratio of 1:1:5 4 OH、H 2 O 2 Heating to 80 ℃ in a mixed solution of deionized water, and preserving heat for 15 minutes; taking out the silicon wafer, flushing the silicon wafer by using deionized water, wherein the flushing time is not less than 2 minutes;
3) Immersing the silicon wafer cleaned in the step 2) into HCl and H with the volume ratio of 1:1:5 2 O 2 Heating to 80 ℃ in a mixed solution of deionized water, and preserving heat for 15 minutes; and taking out the silicon wafer, flushing with deionized water for not less than 2 minutes to obtain the cleaned silicon wafer.
4. The method for preparing a passivation layer on a silicon surface according to claim 1, wherein the silicon wafer in step (1) is immersed in a 10% HF aqueous solution at room temperature for 3 minutes, and N is introduced during the immersion process 2 Bubbling, N 2 The flow rate was controlled at 50sccm.
5. The method of preparing a silicon surface passivation layer according to claim 1, wherein the step (1) N 2 The baking and drying conditions under the environment are as follows: heating by adopting a non-contact infrared lamp tube at 105 ℃ for 1 hour.
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