CN112928185A - Preparation method of silicon surface passivation layer - Google Patents
Preparation method of silicon surface passivation layer Download PDFInfo
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- CN112928185A CN112928185A CN202110185158.0A CN202110185158A CN112928185A CN 112928185 A CN112928185 A CN 112928185A CN 202110185158 A CN202110185158 A CN 202110185158A CN 112928185 A CN112928185 A CN 112928185A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 99
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 99
- 239000010703 silicon Substances 0.000 title claims abstract description 99
- 238000002161 passivation Methods 0.000 title claims abstract description 37
- 238000002360 preparation method Methods 0.000 title claims abstract description 17
- 238000000034 method Methods 0.000 claims abstract description 25
- 229910003087 TiOx Inorganic materials 0.000 claims abstract description 22
- HLLICFJUWSZHRJ-UHFFFAOYSA-N tioxidazole Chemical compound CCCOC1=CC=C2N=C(NC(=O)OC)SC2=C1 HLLICFJUWSZHRJ-UHFFFAOYSA-N 0.000 claims abstract description 22
- 239000008367 deionised water Substances 0.000 claims abstract description 20
- 229910021641 deionized water Inorganic materials 0.000 claims abstract description 20
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 20
- 239000007864 aqueous solution Substances 0.000 claims abstract description 14
- 238000005406 washing Methods 0.000 claims abstract description 13
- 238000000231 atomic layer deposition Methods 0.000 claims abstract description 8
- 238000004140 cleaning Methods 0.000 claims abstract description 6
- 238000001035 drying Methods 0.000 claims abstract description 6
- 239000012535 impurity Substances 0.000 claims abstract description 5
- 238000010438 heat treatment Methods 0.000 claims description 15
- 239000012495 reaction gas Substances 0.000 claims description 14
- 239000011259 mixed solution Substances 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 239000007789 gas Substances 0.000 claims description 4
- 238000010926 purge Methods 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 229910003074 TiCl4 Inorganic materials 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000002347 injection Methods 0.000 claims 1
- 239000007924 injection Substances 0.000 claims 1
- 239000010408 film Substances 0.000 description 17
- 238000006243 chemical reaction Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 7
- 238000000137 annealing Methods 0.000 description 6
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 239000000969 carrier Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 238000005265 energy consumption Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 238000004857 zone melting Methods 0.000 description 2
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000002925 chemical effect Effects 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 231100000331 toxic Toxicity 0.000 description 1
- 230000002588 toxic effect Effects 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
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Abstract
The invention discloses a preparation method of a silicon surface passivation layer, which comprises the following steps: cleaning a silicon wafer, removing impurities, and immersing the silicon wafer into an HF aqueous solution with volume concentration of 10%; then N is added2Baking and drying the silicon wafer in the environment to obtain a dried silicon wafer; immersing the dried silicon wafer into an HF aqueous solution with the volume concentration of 10-50% for surface group treatment, and washing with deionized water to obtain an F-based silicon wafer; placing F-based silicon wafer into atomic layer deposition equipment, and alternately introducing TiCl at 60-180 DEG C4And H2And O, repeatedly circulating to prepare the TiOx film layers on the front surface and the back surface of the silicon wafer, namely the passivation layer. The inventionThe silicon surface passivation with high minority carrier lifetime is realized, the high-temperature process in the preparation of the traditional passivation film is avoided, the minority carrier lifetime of the prepared TiOx passivated silicon wafer can directly reach 1.5-1.8ms, and is improved by about 30% compared with the minority carrier lifetime of the annealed TiOx passivation film reported at present.
Description
(I) technical field
The invention relates to a preparation method of a silicon surface passivation layer.
(II) background of the invention
PERC (passivated Emitter and reader cell), the Emitter and back passivated cell technology, was first proposed in 1983 by Martin Green, Australian scientist, and is currently becoming the conventional technology for a new generation of solar cells. PERC has been constantly refreshed in recent years, and PERC technology has been used to improve conversion efficiency by creating a passivation layer on the back side of the cell. The higher efficiency levels in standard cell structures are limited by the tendency of photogenerated carriers to recombine.
The concept of the TOPCon cell is proposed in 2013 by Fraunhofer-ISE, the front side of the TOPCon cell is not essentially different from that of a conventional N-type solar cell, the cell core technology is back side passivation contact, and the back side of a silicon wafer consists of a layer of ultrathin silicon oxide (1-2 nm) and a layer of phosphorus-doped microcrystalline amorphous mixed Si film. Annealing at an annealing temperature of 850 ℃ iVoc>710mV, J0 at 9-13fA/cm2The excellent passivation performance of the passivated contact structure is shown. Current worldwide records (25.8%) of N-type front-junction passivated contact solar cells are maintained by the Fraunhofer-ISE institute.
The two advanced solar cell technologies have higher requirements on the surface passivation level of the silicon wafer, and the basis for realizing higher conversion efficiency is the passivation technology of the silicon surface.
The prior art mainly prepares SiO2Or as si: h, hydrogenated amorphous silicon, SiO as a passivation layer2If the thermal oxidation technology is adopted, the preparation per se needs high temperature of more than 800 ℃, the preparation of the hydrogenated amorphous silicon needs PECVD process equipment, the equipment cost is high, and after the process, the hydrogenated amorphous silicon needs annealing at 800 ℃ to activate the passivationThe chemical effect, mainly energy consumption and equipment cost are very high.
Disclosure of the invention
The invention aims to provide a preparation method of a silicon surface passivation layer, which is used for passivating defects such as dangling bonds and the like on the silicon surface, reducing the recombination probability of current carriers at the defects and achieving the purpose of prolonging the service life of minority current carriers. The photoelectric conversion device is further applied to silicon solar cells, and corresponding photoelectric conversion efficiency is improved.
The technical scheme adopted by the invention is as follows:
the invention provides a preparation method of a silicon surface passivation layer, which comprises the following steps: (1) cleaning a silicon wafer, removing impurities, immersing the silicon wafer into an HF aqueous solution with the volume concentration of 10%, and removing H on the surface of the silicon wafer2O2Oxidation of the formed SiOx layer (room temperature, preferably 3 minutes); then N is added2Baking and drying the silicon wafer in the environment to obtain a dried silicon wafer; (2) immersing the dried silicon wafer into an HF aqueous solution with the volume concentration of 10-50% for surface group treatment, and washing with deionized water to obtain an F-based silicon wafer; (3) placing F-based silicon wafer into atomic layer deposition equipment, and alternately introducing TiCl at 60-180 DEG C4And H2And O, repeating the circulation until the front surface and the back surface of the silicon wafer reach the required thickness to prepare a TiOx film layer, namely the passivation layer.
Further, the silicon wafer in the step (1) is a double-sided polished zone-melting silicon wafer with the resistivity of 1-5 ohm cm and the thickness of 280 μm, but is not limited to the specifications.
Further, the step (1) of cleaning and removing impurities of the silicon wafer comprises the following steps: 1) immersing the silicon wafer into H with the volume ratio of 3:12SO4And H2O2Heating the mixed solution to 100 ℃, and preserving the heat for 15 minutes; taking out the silicon wafer, and washing with deionized water for not less than 2 minutes (preferably 2 minutes);
2) immersing the silicon slice cleaned in the step 1) into NH with the volume ratio of 1:1:54OH、H2O2Heating the mixed solution of deionized water to 80 ℃, and preserving heat for 15 minutes; taking out the silicon wafer, and washing with deionized water for not less than 2 minutes (preferably 2 minutes);
3) will be step 2)Immersing the cleaned silicon wafer into HCl and H with the volume ratio of 1:1:52O2Heating the mixed solution of deionized water to 80 ℃, and preserving heat for 15 minutes; and taking out the silicon wafer, and washing with deionized water for not less than 2 minutes (preferably 2 minutes) to obtain the cleaned silicon wafer.
Further, step (1) N2The conditions for baking and drying under the environment are as follows: heating by adopting a non-contact infrared lamp tube at the heating temperature of 105 ℃ for 1 hour.
Further, the silicon chip dried in the step (2) is immersed in HF aqueous solution with the volume concentration of 10-50% for 3 minutes at room temperature (25-30 ℃), and N is introduced in the process2Bubbling, N2The flow rate was controlled at 50 sccm.
Further, step (3) of TiCl4And H2The introduction conditions of O are as follows: 50sccm TiCl is alternately introduced at 60-180 DEG C4600ms and 50sccm H2O100 ms, 50sccm N is introduced before each introduction of the reaction gas230s is used as purge gas, unreacted reaction gas is discharged, and process influence is avoided; repeating the above circulation for 10-100 times until the TiOx film layer reaches the thickness required for preparation; and (3) in the first 20 cycles, after the reaction gas is introduced every time, sealing the chamber for 2s, so that the reaction gas can be well nucleated and attached to the surface of the F-based silicon wafer.
Further, the thickness of the TiOx film in step (3) is determined by the number of previous cycles, and the film thickness that can be generated in 1 cycle is about 0.15 nm.
Compared with the prior art, the invention has the following beneficial effects:
(1) the preparation method does not need to use toxic reagents, and is environment-friendly;
(2) in the traditional passivation method of the TiOx film, high-temperature annealing is required to activate the passivation effect of the TiOx, but the preparation method of the invention has no high-temperature process, reduces the possibility of generating lattice change of a silicon body at high temperature, has low energy consumption, effectively reduces the preparation cost and is easy for industrialized popularization.
(3) The invention uses a silicon wafer surface treatment process, provides a method for forming a silicon surface F into a growth substrate of a TiOx passivation film layer, prepares the TiOx passivation film layer through an atomic layer deposition process, adds a nucleation step in the film layer deposition process, has the advantages of an ALD (atomic layer deposition) rapid mode and a retention mode, realizes the silicon surface passivation with high minority carrier service life, avoids a high-temperature process in the traditional passivation film preparation, and can reach 0.8-1.2ms after annealing after about 100 and 200 mus before annealing of the silicon wafer minority carrier service life of the TiOx passivation film prepared by the traditional method. The minority carrier lifetime of the TiOx passivated silicon chip prepared by the method can directly reach 1.5-1.8ms, and is improved by about 30% compared with the minority carrier lifetime of the annealed TiOx passivated film reported at present.
(IV) description of the drawings
FIG. 1 is a schematic diagram of a TiOx film-passivated silicon wafer, wherein A is the TiOx passivation film, B is an F-based silicon nitride surface, and C is a silicon wafer.
Fig. 2 is a timing diagram of the reaction of the TiOx film.
FIG. 3 is a plot of carrier concentration versus minority carrier lifetime for different F-prime times.
Fig. 4 is a plot of carrier concentration versus minority carrier lifetime at different fabrication temperatures.
Fig. 5 is a plot of carrier concentration versus minority carrier lifetime for different cycle numbers.
Fig. 6 is a plot of carrier concentration versus minority carrier lifetime for different HF concentrations.
(V) detailed description of the preferred embodiments
The invention will be further described with reference to specific examples, but the scope of the invention is not limited thereto:
the resistivity of the deionized water in the examples of the present application should be greater than 18.2M Ω. H used in the examples of the present invention2SO4、H2O2、NH4OH and HCl are calculated according to 100% purity.
Example 1 preparation of silicon surface passivation layer
1. Cleaning of
(1) Immersing raw material silicon wafer (double-sided polished zone-melting silicon wafer, resistivity of 1-5 ohm cm, thickness of 280 μm, phi 2 inches) into H with volume ratio of 3:12SO4And H2O2Mixed solution of (2)Heating to 100 ℃, and keeping the temperature for 15 minutes; taking out the silicon wafer, and washing with deionized water for 2 minutes;
(2) immersing the silicon slice cleaned in the step (1) into NH with the volume ratio of 1:1:54OH、H2O2Heating the mixed solution of deionized water to 80 ℃, and preserving heat for 15 minutes; taking out the silicon wafer, and washing with deionized water for 2 minutes;
(3) immersing the silicon wafer cleaned in the step (2) into HCl and H with the volume ratio of 1:1:52O2Heating the mixed solution of deionized water to 80 ℃, and preserving heat for 15 minutes; taking out the silicon wafer, and washing with deionized water for 2 minutes;
(4) immersing the silicon wafer cleaned in the step (3) into HF aqueous solution with the mass concentration of 10%, immersing for 3 minutes at room temperature, and introducing N in the process2Bubbling, N2Controlling the flow to be 50sccm to ensure that HF and SiOx formed on the surface of the silicon wafer completely react; taking out the silicon wafer, washing with deionized water, and removing solution residues; putting silicon wafer into N2Baking and drying in the environment, wherein the baking is carried out by adopting a non-contact infrared lamp tube for heating, the heating temperature is 105 ℃, and the baking time is 1 hour;
2. factor of influence of F-based treatment
(1) Time of day
And (3) immersing the silicon wafer dried in the step (4) into an HF aqueous solution with the volume concentration of 50%, respectively immersing for 1-8 hours (specifically 1, 3, 5 and 8 hours) at room temperature for surface group treatment, and taking out the silicon wafer to obtain the F-based silicon wafer. Placing into an atomic layer deposition device (Komin TALD), and introducing 50sccm TiCl in turn at 60 deg.C4600ms and 50sccm H2O100 ms, 50sccm N is introduced before each introduction of the reaction gas2And 30s is used as a purge gas, and unreacted reaction gas is discharged, so that process influence is avoided. The cycle was repeated 100 times. The first 20 cycles, after each reaction gas is introduced, the chamber is sealed for 2s, the reaction gas is better nucleated and is attached to the surface of the F-based group silicon wafer, the reaction sequence chart is shown in figure 2, TiOx thin film layers with the thickness of 12nm are prepared on the front and back surfaces of the silicon wafer, a WCT-120 minority carrier lifetime tester manufactured by Siton company is adopted for testing,the results are shown in FIG. 3, which is a plot of carrier concentration versus minority carrier lifetime for the same F-based time, at a carrier concentration of 1 x 1015Position, it can be seen that the F-priming time is 5 hours and the TiOx passivation layer produced has the highest minority carrier lifetime, about 1.8 ms.
(2) Concentration of HF in aqueous solution
The HF aqueous solution in the step (1) is changed into 10-50% (specifically 10%, 20%, 30%, 50%), and when the soaking time is 5 hours, the other operations are the same, and the result is shown in FIG. 6, and the highest lifetime is obtained in the HF solution with the concentration of 50%, so that the concentration of 50% is used as the basic process.
3. Influence factor of TiOx film layer preparation
(1) Temperature of
Placing the F-based silicon wafer soaked in the 50% HF aqueous solution for 5 hours in the step 2 into an atomic layer deposition device, and alternately introducing 50sccm TiCl under 60-180 ℃ (60, 80, 120, 150 and 180 ℃), respectively4600ms and 50sccm H2O100 ms, 50sccm N is introduced before each introduction of the reaction gas2And 30s is used as a purge gas, and unreacted reaction gas is discharged, so that process influence is avoided. The above cycle was repeated 100 times. And (3) performing the first 20 cycles, sealing the chamber for 2s after introducing the reaction gas each time, so that the reaction gas can be well nucleated and attached to the surface of the F-based clustered silicon wafer, wherein a reaction sequence diagram is shown in figure 2, TiOx film layers with the thickness of 12nm are prepared on the front side and the back side of the surface of the silicon wafer, and the minority carrier lifetime is tested by adopting a WCT-120 minority carrier lifetime tester of Siton company.
The results are shown in FIG. 4, which is a plot of carrier concentration versus minority carrier lifetime at different production temperatures, at a carrier concentration of 1 x 1015In place, the TiOx passivation layer fabricated at 60 degrees celsius is seen to have the highest minority carrier lifetime, about 1.5 ms.
(2) Number of cycles
The temperature in the step (1) is changed to 60 ℃, the cycle times are respectively changed to 10, 30, 50, 80 and 100, other operations are the same, the thickness of the film layer which can be generated by 1 cycle is about 0.15nm, and the result is shown in figure 5.
Claims (8)
1. A preparation method of a silicon surface passivation layer is characterized by comprising the following steps: (1) cleaning a silicon wafer, removing impurities, immersing the silicon wafer into an HF aqueous solution with the volume concentration of 10%, and removing H on the surface of the silicon wafer2O2A SiOx layer formed by oxidation; then N is added2Baking and drying the silicon wafer in the environment to obtain a dried silicon wafer; (2) immersing the dried silicon wafer into an HF aqueous solution with the volume concentration of 10-50% for surface group treatment, and washing with deionized water to obtain an F-based silicon wafer; (3) placing F-based silicon wafer into atomic layer deposition equipment, and alternately introducing TiCl at 60-180 DEG C4And H2And O, repeatedly circulating to prepare the TiOx film layers on the front surface and the back surface of the silicon wafer, namely the passivation layer.
2. The method for preparing the silicon surface passivation layer according to claim 1, wherein the silicon wafer in the step (1) is a double-sided polished float-zone silicon wafer with a resistivity of 1-5 ohm cm.
3. The method for preparing the silicon surface passivation layer according to claim 1, wherein the step of cleaning and removing impurities of the silicon wafer in the step (1) comprises the following steps: 1) immersing the silicon wafer into H with the volume ratio of 3:12SO4And H2O2Heating the mixed solution to 100 ℃, and preserving the heat for 15 minutes; taking out the silicon wafer, and washing with deionized water for not less than 2 minutes;
2) immersing the silicon slice cleaned in the step 1) into NH with the volume ratio of 1:1:54OH、H2O2Heating the mixed solution of deionized water to 80 ℃, and preserving heat for 15 minutes; taking out the silicon wafer, and washing with deionized water for not less than 2 minutes;
3) immersing the silicon wafer cleaned in the step 2) into HCl and H with the volume ratio of 1:1:52O2Heating the mixed solution of deionized water to 80 ℃, and preserving heat for 15 minutes; and taking out the silicon wafer, and washing with deionized water for not less than 2 minutes to obtain the cleaned silicon wafer.
4. The method for preparing a silicon surface passivation layer according to claim 1, characterized in thatImmersing the silicon wafer in the step (1) in an HF aqueous solution with the volume concentration of 10% for 3 minutes at room temperature, and introducing N in the process2Bubbling, N2The flow rate was controlled at 50 sccm.
5. The method for preparing a silicon surface passivation layer according to claim 1, wherein the step (1) N2The conditions for baking and drying under the environment are as follows: heating by adopting a non-contact infrared lamp tube at the heating temperature of 105 ℃ for 1 hour.
6. The method for preparing a silicon surface passivation layer according to claim 1, wherein the silicon wafer dried in the step (2) is immersed in an aqueous solution of HF having a volume concentration of 10 to 50% at room temperature for 1 to 8 hours.
7. The method for preparing a silicon surface passivation layer as claimed in claim 1, characterized in that step (3) is carried out with TiCl4And H2The introduction conditions of O are as follows: 50sccm TiCl is alternately introduced at 60-180 DEG C4600ms and 50sccm H2O100 ms, 50sccm N is introduced before each introduction of the reaction gas230s as a purge gas, and unreacted reaction gas was discharged.
8. The method for preparing a silicon surface passivation layer according to claim 1, wherein the step (3) is repeated 10 to 100 times; the first 20 cycles, each time with TiCl injection4And H2After O, the chamber 2s is closed.
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