CN112886701B - Power-down storage power management circuit - Google Patents

Power-down storage power management circuit Download PDF

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Publication number
CN112886701B
CN112886701B CN202110144240.9A CN202110144240A CN112886701B CN 112886701 B CN112886701 B CN 112886701B CN 202110144240 A CN202110144240 A CN 202110144240A CN 112886701 B CN112886701 B CN 112886701B
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Prior art keywords
power supply
power
diode
resistor
double diode
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CN202110144240.9A
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CN112886701A (en
Inventor
李明
薛振永
王成龙
袁文嘉
杜树帅
吴莉莉
秦广素
李川
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Xuji Group Co Ltd
Henan Xuji Instrument Co Ltd
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Xuji Group Co Ltd
Henan Xuji Instrument Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • H02J9/04Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
    • H02J9/06Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
    • H02J9/061Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems for DC powered loads

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  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Stand-By Power Supply Arrangements (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The invention relates to a power-down storage power management circuit which comprises a first double diode, a second double diode, a third double diode, a triode, a second resistor, a third resistor, a fourth resistor, a second capacitor, a super capacitor, a battery and a memory. The triode is not conducted in normal operation and is conducted in power failure, so that the super capacitor provides power for the memory. The power-down storage power management circuit can enable the intelligent meter to have enough power for storage operation after detecting the power-down signal according to different voltages of all parts during power down, provides power support for the power-down storage, and simultaneously reduces the risk of failure of devices to the greatest extent.

Description

Power-down storage power management circuit
Technical Field
The invention relates to the field of power supplies, in particular to a power-down storage power supply management circuit.
Background
Along with the development of the power industry, the intelligent electric energy meter is rapidly replacing the traditional mechanical electric energy meter and the traditional electronic electric energy meter, the functions of the intelligent electric energy meter are more and more, the data to be stored are also increased successively, the data related to the electric energy are required to be stored when the electric energy meter is powered down, but the storage time is prolonged due to the increase of the data, and the normal storage time can be ensured only by ensuring sufficient power supply time in the power failure process.
The intelligent meter currently in use stores related data of electric quantity of an electric meter, more electric energy meters record loss, load, electricity larceny and the like on a power line according to the development of the current electric energy meters, the data quantity is more and more, and if the storage is incomplete, the problems of electric quantity loss, mismatching of electric quantity data, loss of record and the like can be caused, so that the loss can be caused for an electric company. Therefore, a power-down storage power management circuit is necessary in the practical application of the intelligent electric energy meter. The existing power-down storage power management circuit has the advantages that the voltage time for supporting the storage after power failure is short, the existing power-down storage power management circuit is used under the condition that the stored data amount of the electric energy meter of the old product is not large, the stored data amount is large according to the development condition of the electric energy meter, the original power management circuit cannot support the storage work of all the data amounts, and the power-down storage power management circuit for coping with the development of the intelligent meter is needed.
Disclosure of Invention
Object of the invention
The invention aims to provide a power-down storage power management circuit which is applied to an intelligent electric energy meter, can provide power support when power is down, and has enough power for storage operation.
(II) technical scheme
One aspect of the invention provides a power down storage power management circuit, which comprises a first double diode, a second double diode, a third double diode, a triode, a second resistor, a third resistor, a fourth capacitor, a super capacitor, a battery and a memory; the collector of the triode is connected with the super capacitor through a second resistor and a second double diode, the emitter of the triode is connected with the working power supply of the system and the power supply end of the memory, and the base of the triode is grounded through a fourth resistor and a fourth capacitor which are connected in series; the third double diode is connected between the battery and the control power supply through a third resistor, and the connection point of the fourth resistor and the fourth capacitor is connected with the third double diode; the first double diodes are connected between the system working power supply, the control power supply and the system rectifying power supply, so that the voltages of the system working power supply and the control power supply are the same; the third double diode is connected with the battery power supply output end, and the second double diode is connected with the super capacitor power supply output end.
According to one aspect of the invention, the two diodes of the first double diode are connected in parallel to form three end parts, the connection point of the anodes of the two diodes is a third end part, and the cathodes of the two diodes are respectively a first end part and a second end part.
According to one aspect of the invention, the first end of the first dual diode is connected to a system operating power supply, the second end is connected to a control power supply, and the third end is connected to a system rectified power supply.
According to one aspect of the invention, two diodes of the second double diode are connected in series to form three ends, the connection point of the cathode of one diode and the anode of the other diode is the second end, the anode of one diode is the first end, and the cathode of the other diode is the third end.
According to one aspect of the invention, the power-down storage power management circuit further comprises a first resistor and a first capacitor, wherein the first end part of the second double diode is connected to the system rectification power supply through the first resistor, the third end part is a super capacitor power supply output end, the second end part is connected with the positive electrode of the super capacitor, the negative electrode of the super capacitor is grounded, and the first capacitor is connected between the system rectification power supply and the ground.
According to one aspect of the invention, two diodes of the third double diode are connected in parallel to form three end parts, the cathodes of the two diodes are connected to form a third end part, and the anodes of the two diodes are respectively a first end part and a second end part.
According to one aspect of the invention, the third end of the third double diode is connected with a connection point of the fourth resistor and the fourth capacitor, the first end is connected with a battery power supply output end, the third end is connected with the positive electrode of the battery through the third resistor, the negative electrode of the battery is grounded, and the second end of the third double diode is connected with a control power supply.
According to one aspect of the invention, a diode is connected between the battery power supply output end and the super capacitor power supply output end, the battery power supply output end is connected with the anode of the diode, and the super capacitor power supply output end is connected with the cathode of the diode.
According to one aspect of the invention, the memory is a chip, and the power supply terminal is a pin.
(III) beneficial effects
The invention provides a power-down storage power supply management circuit for an intelligent electric energy meter, which can enable the intelligent meter to have enough power supply to carry out storage operation after detecting a power-down signal according to different voltages of all parts during power-down, and has the following beneficial technical effects:
1. The power supply support is provided for the power failure storage number, and the support time is long.
2. The response speed is high, the power supply switching has no delay, the continuous supply of the power supply can be ensured, and the stock operation is supported.
3. Fully considers the complete failure or partial failure condition of each part of devices, and furthest reduces the risk of stock failure caused by device failure.
Drawings
Fig. 1 is a schematic diagram of a power down count power management circuit according to one embodiment of the invention.
Detailed Description
The objects, technical solutions and advantages of the present invention will become more apparent by the following detailed description of the present invention with reference to the accompanying drawings. It should be understood that the description is only illustrative and is not intended to limit the scope of the invention. In addition, in the following description, descriptions of well-known structures and techniques are omitted so as not to unnecessarily obscure the present invention.
Fig. 1 shows a schematic diagram of a power down count power management circuit. In fig. 1, VDD is the rectified power of the system, generated by an external input power source, VCC is the working power of the system, VCM is the control power, VCAP is the super capacitor power output, and VBATT is the battery power output. The power-down storage power management circuit comprises a double diode Q1, Q2 and Q3, a triode Q4, resistors R1, R2, R3 and R4, capacitors C1 and C4, a super capacitor CD1, a battery B1 and a diode D1.
The double diode Q1 has three ends, 11, 12 and 13 respectively, two diodes of the double diode Q1 are connected in parallel, anodes of the two diodes are connected to form an end 13, a cathode of one diode is the end 11, and a cathode of the other diode is the end 12. The double diode Q1 is a single-way in, two-way out and direction is irreversible.
The double diode Q2 has three ends, 21, 22 and 23 respectively, and the two diodes of the double diode Q1 are connected in series, i.e. the cathode of one diode is connected to the anode of the other diode, the junction of the two diodes is end 22, the anode of one diode is end 21, and the cathode of the other diode is end 23. The dual diode Q2 includes two modes of operation. First, both the lower and right pins can output when the left pin is powered. And the second is that when the left pin is not powered, the lower pin can power the right pin, and the lower pin is a charging and discharging channel of the super capacitor CD 1.
The double diode Q3 has three ends, 31, 32 and 33 respectively, the two diodes of the double diode Q3 are connected in parallel, the cathodes of the two diodes are connected to form end 33, the anode of one diode is end 31, and the anode of the other diode is end 32. The dual diode Q3 is two-way in, one-way out, and the voltage of VBATT and VCM is compared, and the voltage is taken as input.
Transistor Q4 includes collector C, base B and emitter E. Transistor Q4 is non-conductive when powered up and conductive when powered down.
Super capacitor CD1 is charged by VDD when powered on; the drive transistor Q4 operates to power the memory U2 when power is lost.
The memory U2 is a chip with 8 pins, powered by VCC, for data storage.
As can be seen from fig. 1, end 1 of the dual diode Q1 is connected to VCC, end 2 is connected to VCM, and end 3 is connected to VDD. When both diodes of the dual diode Q1 are turned on, the voltages of VCC and VCM are the same. A diode D1 is connected between VBATT and VCAP, VBATT is connected to the anode of the diode D1, and VCAP is connected to the cathode of the diode D1. The end 21 of the double diode Q2 is connected with VDD through a resistor R1, the end 23 is connected with VCAP, the end 22 is connected with the positive pole of the super capacitor CD1, the negative pole of the super capacitor CD1 is grounded GND, and a capacitor C1 is connected between VDD and GND. Collector C of transistor Q4 is connected to end 23 of dual diode Q2 through resistor R2. The emitter E of transistor Q4 is connected to VCC. The base B of the triode Q4 is grounded GND through a resistor R4 and a capacitor C4 which are connected in series. The base B of the triode Q4 is connected with one end of a resistor R4, the other end of the resistor R4 is connected with one end of a capacitor C4 in series, and the other end of the capacitor C4 is grounded to GND. The end 33 of the double diode Q3 is connected to the connection point between the resistor R4 and the capacitor C4, the end 31 of the double diode Q3 is connected to VBATT, the positive electrode of the battery B1 is connected to the resistor R3, the negative electrode of the battery B1 is grounded GND, and the end 32 of the double diode Q3 is connected to VCM. Pin 4 of memory U2 is connected to ground GND and pin 8 is connected to emitter E of transistor Q4.
The working process of the power-down storage number power management circuit is as follows:
When power is on, the two diodes of the double diode Q1 are conducted, and due to the action of the double diode Q1, the voltage of VCM is the same as that of VCC, so that the triode Q4 is in a non-conducting state, and therefore, the system working power supply VCC supplies power to the memory U2. VDD charges supercapacitor CD1 through resistor R1 and dual diode Q2, and VCM charges capacitor C4 through dual diode Q3.
When power is lost, the voltage of VDD becomes zero, and the voltages of VCC and VCM also become zero. Under the action of a power supply B1, the double diode Q3 is conducted, VBATT drives the base B of the triode Q4 through the double diode Q3 and a resistor R4, so that the collector C and the emitter E of the triode Q4 are conducted, VCAP supplies power to the VCC end of the memory U2 through the resistor R2, and the power failure storage is supported.
Considering super capacitor life's influence, when super capacitor CD1 became invalid, VBATT also accessible diode D1 provides the power for VCAP, supports the use of losing the power deposit number, and diode D1 still can avoid super capacitor CD1 to charge battery B1 backward.
Considering the battery life and passivation effect, when the battery B1 fails, the capacitor C4 may also drive the transistor Q4 to supply the VCAP with VCC.
The intelligent electric energy meter requires the battery to be replaceable, so the main function of the super capacitor is to support the battery to be replaced when the battery is dead, and the consumption of the super capacitor to support the storage is relatively small, so the time requirement of replacing the battery is mainly used as a reference for the selection of the super capacitor. The resistors R1, R2, R3 and R4, the capacitors C1, C4 and the triode Q4 are selected after calculation according to different requirements. The memory U2 is used for selecting the type according to all data contents which need to be stored by the electric energy meter. For example, in one embodiment, the power meter system is powered by a 5V power supply, i.e., the system power VDD is 5V, the vcc and VCM voltages are 4.7V, and the parameters of the other circuit components are set as follows: 51 Ω for resistor R1, 10 Ω for resistors R2 and R3, 10kΩ for resistor R4, 10 μF for capacitor C1, 47 μF for capacitor C4, 1.5F for super capacitor, 3.6V for battery B1, BAT54A for dual diode Q1, BAT54S for dual diode Q2, BAT54C for dual diode Q3, LMBT2222ALT1G for transistor Q4.
And according to the key data such as the forward and reverse reactive power total electric quantity, the time-sharing electric quantity and the like, which are stored during power failure, the software processing time is evaluated, the maintenance level is required to be maintained for more than 70ms, and the method is easy to meet under the normal working condition.
When the power grid is in a low voltage condition, after the power-off signal is detected, the level maintenance time is possibly shortened, data are easy to lose, and the circuit can effectively prolong the level maintenance time and ensure the storage.
In summary, the present invention provides a power down register power management circuit, which includes a first dual diode, a second dual diode, a third dual diode, a triode, a second resistor, a third resistor, a fourth capacitor, a super capacitor, a battery and a memory; the collector of the triode is connected with the super capacitor through a second resistor and a second double diode, the emitter of the triode is connected with the working power supply of the system and the power supply end of the memory, and the base of the triode is grounded through a fourth resistor and a fourth capacitor which are connected in series; the third double diode is connected between the battery and the control power supply through a third resistor, and the connection point of the fourth resistor and the fourth capacitor is connected with the third double diode; the first double diodes are connected between the system working power supply, the control power supply and the system rectifying power supply, so that the voltages of the system working power supply and the control power supply are the same; the third double diode is connected with the battery power supply output end, and the second double diode is connected with the super capacitor power supply output end. The power-down storage power management circuit can enable the intelligent meter to have enough power for storage operation after detecting the power-down signal according to different voltages of all parts during power down, provides power support for the power-down storage, and simultaneously reduces the risk of failure of devices to the greatest extent.
It is to be understood that the above-described embodiments of the present invention are merely illustrative of or explanation of the principles of the present invention and are in no way limiting of the invention. Accordingly, any modification, equivalent replacement, improvement, etc. made without departing from the spirit and scope of the present invention should be included in the scope of the present invention. Furthermore, the appended claims are intended to cover all such changes and modifications that fall within the scope and boundary of the appended claims, or equivalents of such scope and boundary.

Claims (6)

1. A power-down storage power management circuit comprises a first double diode (Q1), a second double diode (Q2), a third double diode (Q3), a triode (Q4), a second resistor (R2), a third resistor (R3), a fourth resistor (R4), a fourth capacitor (C4), a super capacitor (CD 1), a battery (B1) and a memory (U2);
The collector of the triode (Q4) is connected with the super capacitor (CD 1) through a second resistor (R2) and a second double diode (Q2), the emitter of the triode (Q4) is connected with a working power supply (VCC) of a system and the power supply end of a memory (U2), and the base of the triode (Q4) is Grounded (GND) through a fourth resistor (R4) and a fourth capacitor (C4) which are connected in series; the third double diode (Q3) is connected between the battery (B1) and the control power supply (VCM) through a third resistor (R3), and the connection point of the fourth resistor (R4) and the fourth capacitor (C4) is connected with the third double diode (Q3); the first double diode (Q1) is connected between a system working power supply (VCC), a control power supply (VCM) and a system rectification power supply (VDD) so that the voltages of the system working power supply (VCC) and the control power supply (VCM) are the same; the third double diode (Q3) is connected with a battery power supply output end (VBATT), and the second double diode (Q2) is connected with a super capacitor power supply output end (VCAP);
two diodes of the first double diode (Q1) are connected in parallel to form three end parts, the connection point of the anodes of the two diodes is a third end part (13), and the cathodes of the two diodes are a first end part (11) and a second end part (12) respectively;
Two diodes of the second double diode (Q2) are connected in series to form three end parts, the connection point of the cathode of one diode and the anode of the other diode is a second end part (22), the anode of one diode is a first end part (21), and the cathode of the other diode is a third end part (23);
the two diodes of the third double diode (Q3) are connected in parallel to form three end parts, the cathodes of the two diodes are connected to form a third end part (33), and the anodes of the two diodes are respectively a first end part (31) and a second end part (32).
2. The power down count power management circuit of claim 1 wherein,
The first end (11) of the first double diode (Q1) is connected to a system operating power supply (VCC), the second end (12) is connected to a control power supply (VCM), and the third end (13) is connected to a system rectified power supply (VDD).
3. The power down count power management circuit of claim 1 wherein,
The power-down storage power management circuit further comprises a first resistor (R1) and a first capacitor (C1), a first end portion (21) of the second double diode (Q2) is connected to a system rectification power supply (VDD) through the first resistor (R1), a third end portion (23) is a super capacitor power supply output end (VCAP), the second end portion (22) is connected with the positive electrode of the super capacitor (CD 1), the negative electrode of the super capacitor (CD 1) is Grounded (GND), and the first capacitor (C1) is connected between the system rectification power supply (VDD) and the Ground (GND).
4. The power down count power management circuit of claim 1 wherein,
The third end (33) of the third double diode (Q3) is connected to a connection point between the fourth resistor (R4) and the fourth capacitor (C4), the first end (31) is connected to the battery power supply output end (VBATT), the third resistor (R3) is connected to the positive electrode of the battery (B1), the negative electrode of the battery (B1) is Grounded (GND), and the second end (32) of the third double diode (Q3) is connected to the control power supply (VCM).
5. The power down count power management circuit of claim 1 wherein,
The battery power supply output end (VBATT) and the super capacitor power supply output end (VCAP) are connected with a diode (D1), the battery power supply output end (VBATT) is connected with the positive electrode of the diode (D1), and the super capacitor power supply output end (VCAP) is connected with the negative electrode of the diode (D1).
6. The power down count power management circuit of claim 1 wherein,
The memory (U2) is a chip, and the power supply end is a pin.
CN202110144240.9A 2021-02-02 2021-02-02 Power-down storage power management circuit Active CN112886701B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN204886393U (en) * 2015-05-22 2015-12-16 成都前锋电子仪器有限责任公司 A power control system for intelligent gas meter
CN108429332A (en) * 2018-05-18 2018-08-21 扬州万泰电子科技有限公司 A kind of super capacitor application circuit of battery changeable type intelligent electric energy meter power supply

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103730953A (en) * 2014-01-24 2014-04-16 深圳市思达仪表有限公司 IC (Integrated Circuit) card intelligent water meter, and power supply managing circuit and method of IC card intelligent water meter
CN109932563B (en) * 2019-01-30 2020-12-29 国网浙江省电力有限公司衢州供电公司 Intelligent electric energy meter capable of automatically reporting in case of power failure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN204886393U (en) * 2015-05-22 2015-12-16 成都前锋电子仪器有限责任公司 A power control system for intelligent gas meter
CN108429332A (en) * 2018-05-18 2018-08-21 扬州万泰电子科技有限公司 A kind of super capacitor application circuit of battery changeable type intelligent electric energy meter power supply

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