CN112882894A - Hall detection system based on storage server three-layer drawer - Google Patents
Hall detection system based on storage server three-layer drawer Download PDFInfo
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- CN112882894A CN112882894A CN202110191567.1A CN202110191567A CN112882894A CN 112882894 A CN112882894 A CN 112882894A CN 202110191567 A CN202110191567 A CN 202110191567A CN 112882894 A CN112882894 A CN 112882894A
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- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3044—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is the mechanical casing of the computing system
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
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- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
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Abstract
The invention relates to the technical field of storage servers, and provides a Hall detection system based on three drawers of a storage server, which comprises a control unit and a Hall switch of the three drawers; the three-layer drawer Hall switch is arranged at the connection position of a back plate of each layer of drawer framework of the storage server, a magnet is arranged at the connection position of each layer of drawer and the corresponding drawer Hall switch, and the three-layer drawer Hall switch senses the pulling state of the corresponding layer of drawer through the arranged corresponding magnet; the control unit is connected with a Baseboard Management Controller (BMC) of the mainboard and used for acquiring the pulling change state of the corresponding drawer in real time through the first layer drawer Hall switch, the second layer drawer Hall switch and the third layer drawer Hall switch and transmitting the acquired pulling change state of the drawer to the BMC, so that the quantity of mainboard connectors is effectively reduced, the area of the mainboard is saved, and heat dissipation of the mainboard and wiring of other signals are facilitated.
Description
Technical Field
The invention belongs to the technical field of storage servers, and particularly relates to a Hall detection system based on three layers of drawers of a storage server.
Background
With the increasing market of storage servers and the increasing scale of operation and maintenance of the servers, the high requirements on the maintainability of the hard disks of the servers are provided at present, a hard disk storage scheme in a three-layer drawer form is developed, the three layers of hard disks of the hard disks are independently maintained and can be respectively drawn out for maintenance, and the operation and the maintenance are convenient.
However, when the servers in such forms carry out intrusion detection, each layer of drawer uses one intrusion switch, so that cables inside the servers are too many, and the mainboard also needs three connectors and occupies a small and expensive mainboard space.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a Hall detection system based on three layers of drawers of a storage server, and aims to solve the problems that in the prior art, when the server carries out intrusion detection, each layer of drawer uses an intrusion switch, so that cables in the server are too many, a mainboard also needs three connectors, and the space of the mainboard which is small in size is occupied.
The technical scheme provided by the invention is as follows: a Hall detection system based on three layers of drawers of a storage server comprises a control unit, and a first layer of drawer Hall switches, a second layer of drawer Hall switches and a third layer of drawer Hall switches which are respectively connected with the control unit;
the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches are arranged at the connection part of the back plate of each layer of drawer framework of the storage server, magnets are arranged at the connection part of each layer of drawers and the corresponding drawer Hall switches, and the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches all sense the drawing state of the corresponding layer of drawers through the corresponding magnets;
the control unit is connected with a baseboard management controller BMC of the mainboard and used for acquiring the drawing change state of the corresponding layer of drawers in real time through the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches and transmitting the acquired drawing change state of the drawers to the baseboard management controller BMC.
As an improved scheme, the hall detection system further comprises a hall switch interface correspondingly connected with the pin P32, the pin P33 and the pin P34 of the processing unit, wherein the hall switch interface comprises an interface TP1, an interface TP2, an interface TP3 and an interface TP 4;
the interface TP1 is grounded, and the interface TP2, the interface TP3 and the interface TP4 are correspondingly connected with the first layer drawer Hall switch, the second layer drawer Hall switch and the third layer drawer Hall switch through GPIO buses respectively.
As an improved scheme, the processing unit is connected to the BMC through an I2C bus, wherein the pin P35 of the processing unit communicates a data signal data with the BMC through a signal line, and the pin P36 of the processing unit communicates a clock signal clock with the BMC through a signal line.
As an improved scheme, the hall detection system further comprises a USB debugging interface, a power filter circuit, a voltage conversion circuit, a JTAG debugging interface and an LED indicator display circuit, which are connected to the processing unit;
the USB debugging interface is used for debugging and using a main control program of the processing unit;
the power supply filter circuit is used for carrying out power supply filter operation on the power supply signal of the processing unit;
the voltage conversion circuit is used for converting the voltage of the power supply into the voltage meeting the use requirement of the processing unit;
the JTAG debugging interface is used for debugging and using the log printing program for the processing unit;
and the LED indicator lamp display circuit is used for carrying out LED indication display on the working state of the processing unit.
As an improved scheme, the USB debug interface includes a USB connector, the pin D + of the USB connector is connected to the pin P40 of the processing unit after being connected to the series resistor R10, the pin D + of the USB connector is connected to the pin P38 of the processing unit after being connected to the series resistor R11, and the pin VBUS of the USB connector is connected to the voltage terminal 5 VUSB.
As an improved scheme, the JTAG debugging interface comprises an interface TP7, an interface TP8, an interface TP9, an interface TP10, an interface TP11, an interface TP12 and an interface TP 13;
the interface TP7, the interface TP8, the interface TP9, the interface TP10, the interface TP11 and the interface TP12 are respectively connected to the pin 23, the pin 24, the pin 25, the pin 26, the pin 47 and the pin 48 of the processing unit, and the interface TP13 is grounded.
As a modified solution, the power supply filter circuit comprises a first filter circuit connected with a pin P11 of the processing unit, the first filter circuit comprises a capacitor C1 and a capacitor C2 which are connected in parallel, and a line led out from a line between the pin P11 and the capacitor C1 is connected with a power supply end 3.3V;
the power supply filter circuit further comprises a capacitor C3 and a capacitor C4 which are respectively connected with a pin P13 and a pin P43 of the processing unit in a refining mode, and the other ends of the capacitor C3 and the capacitor C4 are grounded;
the power supply filter circuit further comprises a second filter circuit connected with a pin P7 of the processing unit, the second filter circuit comprises an inductor L1, one end of the inductor L1 is connected with the pin P7, the other end of the inductor L1 is connected with a power supply end 3.3V, two line nodes are sequentially arranged on a line between the pin P7 and the inductor L1, and lines led out from the two line nodes are respectively connected with a capacitor C6 and a capacitor C5 in series and then grounded;
the line from pin P41 of the processing unit is connected to voltage terminal 5 VUSBI.
As an improved scheme, the voltage conversion circuit comprises a voltage reduction chip DA1, and a pin IN of the voltage reduction chip is connected with the voltage terminal 5VUSB after being connected with a fuse F1 IN series;
a pin EN of the voltage reduction chip DA1 is grounded after being connected in series with a resistor R17, a pin OUT of the voltage reduction chip DA1 is output to a voltage end 3.3V, a circuit node is arranged on a circuit between the voltage end 3.3V and the pin OUT, and a circuit led OUT from the circuit node is grounded after being connected in series with a resistor R16 and a capacitor C22;
and a circuit led out from a pin SR of the voltage reduction chip DA1 is connected with a pin GND after being connected with a capacitor C21 in series.
As an improved scheme, the LED indicator display circuit includes a light emitting diode VD2, the positive terminal of the light emitting diode VD2 is connected to the pin P15 of the processing unit, the negative terminal of the light emitting diode VD2 is connected to the pin P14 of the processing unit after being connected to a resistor R1 in series, and the light emitting diode VD2 is connected to a common rectifying diode connected in the same direction in parallel;
the LED indicator lamp display circuit further comprises a light-emitting diode VD3, the positive end of the light-emitting diode VD3 is connected with a pin P16 of the processing unit, the negative end of the light-emitting diode VD3 is connected with a resistor R2 in series and then is connected with the voltage end by 3.3V, and the light-emitting diode VD3 is connected with a common reverse-connection rectifier diode in parallel;
the LED indicator lamp display circuit further comprises a light-emitting diode VD4, the positive end of the light-emitting diode VD4 is connected with a pin P17 of the processing unit, the negative end of the light-emitting diode VD4 is connected with a resistor R3 in series and then is connected with the voltage end by 3.3V, and the light-emitting diode VD4 is connected with a common reverse-connection rectifier diode in parallel;
the LED indicator lamp display circuit further comprises a light-emitting diode VD5, the positive end of the light-emitting diode VD5 is connected with a pin P18 of the processing unit, the negative end of the light-emitting diode VD5 is connected with a resistor R4 in series and then is connected with the voltage end by 3.3V, and the light-emitting diode VD5 is connected with a common reverse-connection rectifier diode in parallel;
the LED indicator lamp display circuit further comprises a light-emitting diode VD6, the positive end of the light-emitting diode VD6 is connected with a pin P19 of the processing unit, the negative end of the light-emitting diode is connected with a resistor R5 in series and then connected with a voltage end 3.3V, and the light-emitting diode VD6 is connected with a common reverse-connection rectifier diode in parallel.
In the embodiment of the invention, the Hall detection system based on the three-layer drawer of the storage server comprises a control unit, and a first-layer drawer Hall switch, a second-layer drawer Hall switch and a third-layer drawer Hall switch which are respectively connected with the control unit; the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches are arranged at the connection position of a back plate of each layer of drawer framework of the storage server, magnets are arranged at the connection position of each layer of drawers and the corresponding drawer Hall switches, and the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches all sense the drawing state of the corresponding layer of drawers through the arranged corresponding magnets; the control unit is connected with a Baseboard Management Controller (BMC) of the mainboard and used for acquiring the pulling change state of the corresponding drawer in real time through the first layer drawer Hall switch, the second layer drawer Hall switch and the third layer drawer Hall switch and transmitting the acquired pulling change state of the drawer to the BMC, so that the quantity of mainboard connectors is effectively reduced, the area of the mainboard is saved, and heat dissipation of the mainboard and wiring of other signals are facilitated.
Drawings
In order to more clearly illustrate the detailed description of the invention or the technical solutions in the prior art, the drawings that are needed in the detailed description of the invention or the prior art will be briefly described below. Throughout the drawings, like elements or portions are generally identified by like reference numerals. In the drawings, elements or portions are not necessarily drawn to scale.
FIG. 1 is a schematic connection diagram of a Hall detection system based on a three-layer drawer of a storage server provided by the invention;
FIG. 2 is a schematic circuit diagram of a Hall detection system based on a three-tier drawer of a storage server provided by the invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The following examples are merely for illustrating the technical solutions of the present invention more clearly, and therefore are only examples, and the protection scope of the present invention is not limited thereby.
FIG. 1 is a schematic connection diagram of a Hall detection system based on a three-tier drawer of a storage server according to the present invention, and for convenience of illustration, only the parts related to the embodiment of the present invention are shown in the diagram;
the Hall detection system based on the three-layer drawer of the storage server comprises a control unit, and a first-layer drawer Hall switch, a second-layer drawer Hall switch and a third-layer drawer Hall switch which are respectively connected with the control unit;
the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches are arranged at the connection part of the back plate of each layer of drawer framework of the storage server, magnets are arranged at the connection part of each layer of drawers and the corresponding drawer Hall switches, and the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches all sense the drawing state of the corresponding layer of drawers through the corresponding magnets;
the control unit is connected with a baseboard management controller BMC of the mainboard and used for acquiring the drawing change state of the corresponding layer of drawers in real time through the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches and transmitting the acquired drawing change state of the drawers to the baseboard management controller BMC.
Referring to fig. 2, the hall sensing system further includes a hall switch interface correspondingly connected to pin P32, pin P33 and pin P34 of the processing unit (identified by DD1 in the figure), where the hall switch interface includes interface TP1, interface TP2, interface TP3 and interface TP 4;
the interface TP1 is grounded, and the interface TP2, the interface TP3 and the interface TP4 are correspondingly connected with the first layer drawer Hall switch, the second layer drawer Hall switch and the third layer drawer Hall switch through GPIO buses respectively;
in this embodiment, the processing unit is connected to the BMC through an I2C bus, wherein the pin P35 of the processing unit transfers the data signal data to the BMC through a signal line, and the pin P36 of the processing unit transfers the clock signal clock to the BMC through a signal line.
In the embodiment of the present invention, as shown in fig. 1, the hall detection system further includes a USB debug interface, a power filter circuit, a voltage conversion circuit, a JTAG debug interface, and an LED indicator display circuit, which are connected to the processing unit;
the USB debugging interface is used for debugging and using a main control program of the processing unit;
the power supply filter circuit is used for carrying out power supply filter operation on the power supply signal of the processing unit;
the voltage conversion circuit is used for converting the voltage of the power supply into the voltage meeting the use requirement of the processing unit;
the JTAG debugging interface is used for debugging and using the log printing program for the processing unit;
the LED indicator lamp display circuit is used for carrying out LED indication display on the working state of the processing unit;
as shown in fig. 2, the USB debug interface includes a USB connector, a pin D of the USB connector is connected in series with a resistor R10 and then connected to a pin P40 of the processing unit, a pin D of the USB connector is connected in series with a resistor R11 and then connected to a pin P38 of the processing unit, and a pin VBUS of the USB connector is connected to a voltage terminal 5 VUSB;
the USB connector is model number 47491-D001, but other model numbers can be adopted, and the invention is not limited herein.
As shown in fig. 2, the JTAG debug interface includes interface TP7, interface TP8, interface TP9, interface TP10, interface TP11, interface TP12, and interface TP 13;
the interface TP7, the interface TP8, the interface TP9, the interface TP10, the interface TP11 and the interface TP12 are respectively connected to the pin 23, the pin 24, the pin 25, the pin 26, the pin 47 and the pin 48 of the processing unit, and the interface TP13 is grounded.
As shown in fig. 2, the power supply filter circuit includes a first filter circuit connected to pin P11 of the processing unit, the first filter circuit includes a capacitor C1 and a capacitor C2 connected in parallel, and a line led out from a line between the pin P11 and the capacitor C1 is connected to a power supply terminal 3.3V;
the power supply filter circuit further comprises a capacitor C3 and a capacitor C4 which are respectively connected with a pin P13 and a pin P43 of the processing unit in a refining mode, and the other ends of the capacitor C3 and the capacitor C4 are grounded;
the power supply filter circuit further comprises a second filter circuit connected with a pin P7 of the processing unit, the second filter circuit comprises an inductor L1, one end of the inductor L1 is connected with the pin P7, the other end of the inductor L1 is connected with a power supply end 3.3V, two line nodes are sequentially arranged on a line between the pin P7 and the inductor L1, and lines led out from the two line nodes are respectively connected with a capacitor C6 and a capacitor C5 in series and then grounded;
a line led out from a pin P41 of the processing unit is connected to a voltage end 5 VUSBI;
the inductor L1 may be BLM15PX601SN 1D.
Referring to fig. 2, the voltage converting circuit includes a voltage dropping chip DA1, and a pin IN of the voltage dropping chip is connected IN series with a fuse F1 and then connected to the voltage terminal 5 VUSB;
a pin EN of the voltage reduction chip DA1 is grounded after being connected in series with a resistor R17, a pin OUT of the voltage reduction chip DA1 is output to a voltage end 3.3V, a circuit node is arranged on a circuit between the voltage end 3.3V and the pin OUT, and a circuit led OUT from the circuit node is grounded after being connected in series with a resistor R16 and a capacitor C22;
a circuit led out from a pin SR of the voltage reduction chip DA1 is connected with a pin GND after being connected with a capacitor C21 in series;
the voltage reduction chip DA1 can adopt a chip with model number TPS 78833.
Referring to fig. 2, the LED indicator display circuit includes a light emitting diode VD2, the positive terminal of the light emitting diode VD2 is connected to the pin P15 of the processing unit, the negative terminal is connected in series with a resistor R1 and then connected to the pin P14 of the processing unit, and the light emitting diode VD2 is connected in parallel to a common rectifier diode connected in the same direction;
the LED indicator lamp display circuit further comprises a light-emitting diode VD3, the positive end of the light-emitting diode VD3 is connected with a pin P16 of the processing unit, the negative end of the light-emitting diode VD3 is connected with a resistor R2 in series and then is connected with the voltage end by 3.3V, and the light-emitting diode VD3 is connected with a common reverse-connection rectifier diode in parallel;
the LED indicator lamp display circuit further comprises a light-emitting diode VD4, the positive end of the light-emitting diode VD4 is connected with a pin P17 of the processing unit, the negative end of the light-emitting diode VD4 is connected with a resistor R3 in series and then is connected with the voltage end by 3.3V, and the light-emitting diode VD4 is connected with a common reverse-connection rectifier diode in parallel;
the LED indicator lamp display circuit further comprises a light-emitting diode VD5, the positive end of the light-emitting diode VD5 is connected with a pin P18 of the processing unit, the negative end of the light-emitting diode VD5 is connected with a resistor R4 in series and then is connected with the voltage end by 3.3V, and the light-emitting diode VD5 is connected with a common reverse-connection rectifier diode in parallel;
the LED indicator lamp display circuit further comprises a light-emitting diode VD6, the positive end of the light-emitting diode VD6 is connected with a pin P19 of the processing unit, the negative end of the light-emitting diode is connected with a resistor R5 in series and then connected with a voltage end 3.3V, and the light-emitting diode VD6 is connected with a common reverse-connection rectifier diode in parallel.
In an embodiment of the present invention, the processing unit is a microprocessor controller, which is model MSP430F5510 IPT.
In the embodiment of the invention, an MCU with low power consumption is used as a processing unit, 3 Hall switches can be connected through a GPIO bus of the MCU, each Hall switch is arranged at the connection position of a back plate of each layer of drawer framework, meanwhile, a magnet is arranged at the connection position of each layer of drawer and the Hall switch, the MCU monitors the states of the three Hall switches in real time, if the pulling state change of any layer of drawer is detected, the MCU communicates with a server main board through an I2C bus of the MCU, and the three connectors and 6 wires required by the previous three independent intrusion detection are compared, so that the method can be realized only by one connector and four wires;
moreover, the processing unit is used for collecting the states of the three Hall switches in real time, monitoring the states of the three hard disk drawers, and the I2C is used for transmission, so that the wiring space and the number of the mainboard connectors are saved.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention, and they should be construed as being included in the following claims and description.
Claims (9)
1. A Hall detection system based on three layers of drawers of a storage server is characterized by comprising a control unit, a first layer of drawer Hall switches, a second layer of drawer Hall switches and a third layer of drawer Hall switches, wherein the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches are respectively connected with the control unit;
the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches are arranged at the connection part of the back plate of each layer of drawer framework of the storage server, magnets are arranged at the connection part of each layer of drawers and the corresponding drawer Hall switches, and the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches all sense the drawing state of the corresponding layer of drawers through the corresponding magnets;
the control unit is connected with a baseboard management controller BMC of the mainboard and used for acquiring the drawing change state of the corresponding layer of drawers in real time through the first layer of drawer Hall switches, the second layer of drawer Hall switches and the third layer of drawer Hall switches and transmitting the acquired drawing change state of the drawers to the baseboard management controller BMC.
2. The storage server triple-drawer based hall sensing system of claim 1, further comprising a hall switch interface correspondingly connected to pin P32, pin P33, and pin P34 of the processing unit, the hall switch interface comprising interface TP1, interface TP2, interface TP3, and interface TP 4;
the interface TP1 is grounded, and the interface TP2, the interface TP3 and the interface TP4 are correspondingly connected with the first layer drawer Hall switch, the second layer drawer Hall switch and the third layer drawer Hall switch through GPIO buses respectively.
3. The Hall detection system based on three-tier drawer of storage server of claim 1, wherein the processing unit is connected to the BMC through I2C bus, wherein the pin P35 of the processing unit transmits the data signal data to the BMC through signal line, and the pin P36 of the processing unit transmits the clock signal clock to the BMC through signal line.
4. The Hall detection system based on the three-tier drawer of the storage server according to claim 1, further comprising a USB debugging interface, a power filter circuit, a voltage conversion circuit, a JTAG debugging interface and an LED indicator light display circuit connected with the processing unit;
the USB debugging interface is used for debugging and using a main control program of the processing unit;
the power supply filter circuit is used for carrying out power supply filter operation on the power supply signal of the processing unit;
the voltage conversion circuit is used for converting the voltage of the power supply into the voltage meeting the use requirement of the processing unit;
the JTAG debugging interface is used for debugging and using the log printing program for the processing unit;
and the LED indicator lamp display circuit is used for carrying out LED indication display on the working state of the processing unit.
5. The Hall detection system based on three-tier drawer of storage server of claim 4, wherein the USB debug interface comprises a USB connector, a pin D-series resistor R10 of the USB connector is connected with a pin P40 of the processing unit, a pin D + series resistor R11 of the USB connector is connected with a pin P38 of the processing unit, and a pin VBUS of the USB connector is connected with a voltage terminal 5 VUSB.
6. The storage server triple-drawer based Hall detection system according to claim 4, wherein the JTAG debug interface includes interface TP7, interface TP8, interface TP9, interface TP10, interface TP11, interface TP12, and interface TP 13;
the interface TP7, the interface TP8, the interface TP9, the interface TP10, the interface TP11 and the interface TP12 are respectively connected to the pin 23, the pin 24, the pin 25, the pin 26, the pin 47 and the pin 48 of the processing unit, and the interface TP13 is grounded.
7. The storage server triple-drawer based Hall detection system according to claim 4, wherein the power supply filter circuit comprises a first filter circuit connected with a pin P11 of the processing unit, the first filter circuit comprises a capacitor C1 and a capacitor C2 connected in parallel, and a line out of a line between the pin P11 and the capacitor C1 is connected with a power supply terminal of 3.3V;
the power supply filter circuit further comprises a capacitor C3 and a capacitor C4 which are respectively connected with a pin P13 and a pin P43 of the processing unit in a refining mode, and the other ends of the capacitor C3 and the capacitor C4 are grounded;
the power supply filter circuit further comprises a second filter circuit connected with a pin P7 of the processing unit, the second filter circuit comprises an inductor L1, one end of the inductor L1 is connected with the pin P7, the other end of the inductor L1 is connected with a power supply end 3.3V, two line nodes are sequentially arranged on a line between the pin P7 and the inductor L1, and lines led out from the two line nodes are respectively connected with a capacitor C6 and a capacitor C5 in series and then grounded;
the line from pin P41 of the processing unit is connected to voltage terminal 5 VUSBI.
8. The Hall detection system based on the three-tier drawer of the storage server as claimed IN claim 7, wherein the voltage conversion circuit comprises a voltage dropping chip DA1, and a pin IN of the voltage dropping chip is connected with the voltage terminal 5VUSB after being connected with a fuse F1 IN series;
a pin EN of the voltage reduction chip DA1 is grounded after being connected in series with a resistor R17, a pin OUT of the voltage reduction chip DA1 is output to a voltage end 3.3V, a circuit node is arranged on a circuit between the voltage end 3.3V and the pin OUT, and a circuit led OUT from the circuit node is grounded after being connected in series with a resistor R16 and a capacitor C22;
and a circuit led out from a pin SR of the voltage reduction chip DA1 is connected with a pin GND after being connected with a capacitor C21 in series.
9. The storage server three-tier drawer based hall sensing system of claim 4 wherein said LED indicator light display circuit comprises a light emitting diode VD2, wherein the positive terminal of said light emitting diode VD2 is connected to pin P15 of said processing unit, the negative terminal of said light emitting diode VD 1 is connected to pin P14 of said processing unit after being connected in series with a resistor R1, and said light emitting diode VD2 is connected in parallel with a common rectifying diode connected in the same direction;
the LED indicator lamp display circuit further comprises a light-emitting diode VD3, the positive end of the light-emitting diode VD3 is connected with a pin P16 of the processing unit, the negative end of the light-emitting diode VD3 is connected with a resistor R2 in series and then is connected with the voltage end by 3.3V, and the light-emitting diode VD3 is connected with a common reverse-connection rectifier diode in parallel;
the LED indicator lamp display circuit further comprises a light-emitting diode VD4, the positive end of the light-emitting diode VD4 is connected with a pin P17 of the processing unit, the negative end of the light-emitting diode VD4 is connected with a resistor R3 in series and then is connected with the voltage end by 3.3V, and the light-emitting diode VD4 is connected with a common reverse-connection rectifier diode in parallel;
the LED indicator lamp display circuit further comprises a light-emitting diode VD5, the positive end of the light-emitting diode VD5 is connected with a pin P18 of the processing unit, the negative end of the light-emitting diode VD5 is connected with a resistor R4 in series and then is connected with the voltage end by 3.3V, and the light-emitting diode VD5 is connected with a common reverse-connection rectifier diode in parallel;
the LED indicator lamp display circuit further comprises a light-emitting diode VD6, the positive end of the light-emitting diode VD6 is connected with a pin P19 of the processing unit, the negative end of the light-emitting diode is connected with a resistor R5 in series and then connected with a voltage end 3.3V, and the light-emitting diode VD6 is connected with a common reverse-connection rectifier diode in parallel.
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| CN115171348B (en) * | 2022-06-08 | 2024-04-02 | 阿里巴巴（中国）有限公司 | Early warning device, drawing component and server |
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