CN112802933B - Light emitting diode epitaxial wafer and preparation method thereof - Google Patents

Light emitting diode epitaxial wafer and preparation method thereof Download PDF

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CN112802933B
CN112802933B CN202110166507.4A CN202110166507A CN112802933B CN 112802933 B CN112802933 B CN 112802933B CN 202110166507 A CN202110166507 A CN 202110166507A CN 112802933 B CN112802933 B CN 112802933B
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epitaxial wafer
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CN112802933A (en
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从颖
姚振
梅劲
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HC Semitek Suzhou Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H01L33/325—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials

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Abstract

The disclosure provides a light emitting diode epitaxial wafer and a preparation method thereof, and belongs to the technical field of light emitting diodes. In the n-type GaN layer, a plurality of insertion layers are inserted at intervals. The plurality of first GaN sublayers in the plurality of insertion layers may then consume electrons multiple times and counteract the effect of too fast a generation rate of electrons relative to a generation rate of holes. Increasing the number of holes into the multiple quantum well layer. The second GaN sublayer prepared by the intrinsic materials on the first GaN sublayer is laminated, so that the function of blocking electrons is further realized, the time for reserving holes is increased, and the quality of the n-type GaN layer is improved. The number of holes entering the multiple quantum well layer of the finally obtained light-emitting diode epitaxial wafer is increased, so that the light-emitting efficiency of the light-emitting diode epitaxial wafer is improved, the quality of the light-emitting diode epitaxial wafer is improved, and the light-emitting efficiency of the finally obtained light-emitting diode can be further improved.

Description

Light emitting diode epitaxial wafer and preparation method thereof
Technical Field
The disclosure relates to the technical field of light emitting diodes, and particularly relates to a light emitting diode epitaxial wafer and a preparation method thereof.
Background
The light emitting diode is a light emitting device with wide application, and is commonly used for communication signal lamps, automobile interior and exterior lamps, urban illumination, landscape illumination and the like, and the light emitting diode epitaxial wafer is a basic structure for preparing the light emitting diode. The light emitting diode epitaxial wafer generally comprises a substrate and an n-type GaN layer, a multiple quantum well layer and a p-type GaN layer which are sequentially stacked on the substrate, wherein electrons generated by the n-type GaN layer and holes generated by the p-type GaN layer enter the multiple quantum well layer to be compounded and emit light under the action of current.
Because the generation efficiency and the mobility of electrons are far greater than those of holes, the number of electrons entering the multiple quantum well layer is far greater than that of holes entering the multiple quantum well layer, the electrons easily overflow the multiple quantum well layer and enter the p-type GaN layer, and are subjected to non-radiative recombination with the holes of the p-type GaN layer, partial holes are consumed by electrons before entering the multiple quantum well layer, the number of the holes entering the multiple quantum well layer is reduced, and the light emitting efficiency of the light emitting diode is low.
Disclosure of Invention
The embodiment of the disclosure provides a light emitting diode epitaxial wafer and a preparation method thereof, which can improve the number of holes entering a multi-quantum well layer so as to improve the luminous efficiency of a finally obtained light emitting diode. The technical scheme is as follows:
the embodiment of the disclosure provides a light emitting diode epitaxial wafer, the light emitting diode epitaxial wafer comprises a substrate, an n-type GaN layer, a multi-quantum well layer and a p-type GaN layer, wherein the n-type GaN layer, the multi-quantum well layer and the p-type GaN layer are sequentially stacked on the substrate, the light emitting diode epitaxial wafer further comprises a plurality of insertion layers, the insertion layers are sequentially inserted into the n-type GaN layer at intervals, and each insertion layer comprises a first GaN sublayer doped with Mg and a second GaN sublayer prepared from an intrinsic material, which are sequentially stacked.
Optionally, the thickness of each insertion layer is 15-80 nm.
Optionally, a ratio of the thickness of the first GaN sublayer to the thickness of the second GaN sublayer is 2:1 to 10: 1.
Optionally, the doping concentration of Mg in the first GaN sublayer is 1E 17-1E 18/cm3。
Optionally, the thickness of the first GaN sublayer is 10-60 nm, and the thickness of the second GaN sublayer is 5-30 nm.
Optionally, the distance between two adjacent insertion layers is 150-350 nm.
Optionally, the number of the insertion layers is 2-6.
The embodiment of the disclosure provides a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
providing a substrate;
growing an n-type GaN layer and a plurality of insertion layers on the substrate, wherein the insertion layers are sequentially inserted into the n-type GaN layer at intervals, and each insertion layer comprises a first GaN sublayer doped with Mg and a second GaN sublayer prepared from intrinsic materials which are sequentially stacked;
growing a multi-quantum well layer on the n-type GaN layer;
and growing a p-type GaN layer on the multi-quantum well layer.
Optionally, the growing an n-type GaN layer and a plurality of insertion layers on the substrate includes:
and alternately introducing the growth materials of the n-type GaN layer and the growth materials of the insertion layers into the reaction cavity to obtain the n-type GaN layer and a plurality of insertion layers which are sequentially inserted into the n-type GaN layer at intervals.
Optionally, the growth rate of the first GaN sublayer is 2.5-4.5 μm/h, and the growth rate of the second GaN sublayer is 3-6 μm/h.
The beneficial effect that technical scheme that this disclosure embodiment provided brought includes:
in the n-type GaN layer, a plurality of insertion layers are inserted at intervals. The Mg-doped first GaN sub-layers in each insertion layer can generate holes, so that electrons can be in "non-radiative recombination" in advance to consume part of electrons, and the plurality of first GaN sub-layers in the plurality of insertion layers can consume electrons for multiple times and offset the influence of the electron generation rate on the hole generation rate. Holes can therefore be generated in the p-type GaN layer with more time and have more time to migrate into the mqw layer, increasing the number of holes into the mqw layer. The second GaN sublayer prepared by stacking the intrinsic materials on the first GaN sublayer in the insertion layer can further play a role in blocking electrons and increasing the time for reserving holes, and meanwhile, the second GaN sublayer can also play a role in improving the quality of the n-type GaN layer and reducing the electric leakage condition. The number of holes entering the multiple quantum well layer of the finally obtained light emitting diode epitaxial wafer is increased, so that the light emitting efficiency of the light emitting diode epitaxial wafer is improved, the quality of the light emitting diode epitaxial wafer is improved, and the light emitting efficiency of the finally obtained light emitting diode can be further improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of another light emitting diode epitaxial wafer according to an embodiment of the present disclosure;
fig. 3 is a flowchart of a method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present disclosure;
fig. 4 is a flowchart of another method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present disclosure.
Detailed Description
To make the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," "third," and similar terms in the description and claims of the present disclosure are not intended to indicate any order, quantity, or importance, but rather are used to distinguish one element from another. Also, the use of the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprise" or "comprises", and the like, means that the element or item listed before "comprises" or "comprising" covers the element or item listed after "comprising" or "comprises" and its equivalents, and does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", "top", "bottom", and the like are used merely to indicate relative positional relationships, which may also change accordingly when the absolute position of the object being described changes.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present disclosure, and as can be seen from fig. 1, an led epitaxial wafer according to an embodiment of the present disclosure includes a substrate 1, and an n-type GaN layer 2, a multi-quantum well layer 3, and a p-type GaN layer 4 sequentially stacked on the substrate 1, and further includes a plurality of insertion layers 5, the plurality of insertion layers 5 are sequentially inserted into the n-type GaN layer 2 at intervals, and each insertion layer 5 includes a first Mg-doped GaN sublayer 51 and a second GaN sublayer 52 made of an intrinsic material, which are sequentially stacked.
In the n-type GaN layer 2, a plurality of insertion layers 5 are inserted at intervals. The Mg-doped first GaN sublayers 51 in each insertion layer 5 can generate holes, thereby consuming part of electrons by "non-radiative recombination" with electrons in advance, and the plurality of first GaN sublayers 51 in the plurality of insertion layers 5 can consume electrons a plurality of times and offset the influence of the electron generation rate over the hole generation rate. Holes can therefore be generated in the p-type GaN layer 4 with more time and have more time to migrate into the multiple quantum well layer 3, increasing the number of holes into the multiple quantum well layer 3. The second GaN sublayer 52, which is formed by stacking the intrinsic material on the first GaN sublayer 51 in the insertion layer 5, can further function to block electrons, thereby increasing the time for leaving holes, and the second GaN sublayer 52 can also function to improve the quality of the n-type GaN layer 2 and reduce the leakage. The number of holes entering the multiple quantum well layer 3 of the finally obtained light emitting diode epitaxial wafer is increased, so that the light emitting efficiency of the light emitting diode epitaxial wafer is improved, the quality of the light emitting diode epitaxial wafer is improved, and the light emitting efficiency of the finally obtained light emitting diode can be further improved. And the arrangement of the plurality of insertion layers 5 arranged at intervals also enables the current to flow to the multiple quantum well layer 3 more uniformly, thereby ensuring the light emitting effect of the finally obtained light emitting diode epitaxial wafer.
It should be noted that, since the activation efficiency of the Mg species in the first GaN sublayer 51 is low, the first GaN sublayer 51 has a small influence on the generation efficiency and mobility of electrons, and the probability of electron overflow from the light emitting region is reduced, and the situation that the electron mobility is lower than the hole mobility is not caused.
Optionally, each insert layer 5 has a thickness of 15 to 80.
When the thickness of each insertion layer 5 is within the above range, the thickness of each insertion layer 5 is reasonable, so that electrons in the n-type GaN layer 2 can be effectively blocked, and the preparation cost of the light-emitting diode epitaxial wafer is not too high.
Illustratively, the thicknesses of the plurality of insertion layers 5 may all be equal.
The thicknesses of the plurality of insertion layers 5 are equal, so that the plurality of insertion layers 5 can grow conveniently, and the quality of the finally obtained light emitting diode epitaxial wafer is ensured to be good.
Optionally, the number of the insertion layers 5 is 2-6. Electrons can be effectively consumed while the n-type GaN layer 2 having a good quality can be obtained.
In one implementation provided by the present disclosure, the number of the insertion layers 5 is 2-4. The present disclosure is not so limited.
Optionally, the distance between two adjacent insertion layers 5 is 150-350 nm.
When the distance between two adjacent insertion layers 5 is within the above range, the n-type GaN layer 2 can stably provide electrons, the insertion layers 5 can effectively control the number of electrons, the finally obtained n-type GaN layer 2 and the multiple quantum well layer 3 have good quality, and the light emitting efficiency of the light emitting diode epitaxial wafer can be greatly improved.
Illustratively, the distance between each two adjacent insert layers 5 may be the same. The preparation and growth of the n-type GaN layer 2 can be facilitated.
Optionally, in the insertion layer 5, a ratio of a thickness of the first GaN sublayer 51 to a thickness of the second GaN sublayer 52 is 2:1 to 10: 1.
When the ratio of the thickness of the first GaN sublayer 51 to the thickness of the second GaN sublayer 52 is in the above range, the quality of the obtained n-type GaN layer 2 is good, and the light emitting efficiency of the light emitting diode epitaxial wafer is also high.
Illustratively, the thickness of the first GaN sub-layer 51 is 10-60 nm, and the thickness of the second GaN sub-layer 52 is 5-30 nm.
When the thickness of the first GaN sublayer 51 and the thickness of the second GaN sublayer 52 are within the above ranges, the quality of the obtained n-type GaN layer 2 is good, and the light emitting efficiency of the light emitting diode epitaxial wafer is also high.
In one implementation manner provided by the present disclosure, the thickness of the first GaN sublayer 51 is 10 to 40nm, and the thickness of the second GaN sublayer 52 is 5 to 20 nm. The present disclosure is not so limited.
Optionally, the doping concentration of Mg in the first GaN sublayer 51 is 1E 17-1E 18/cm3。
When the doping concentration of Mg in the first GaN sublayer 51 is within the above range, the obtained first GaN sublayer 51 has good quality, and can also effectively consume part of electrons, thereby improving the quality of the finally obtained light emitting diode epitaxial wafer.
In one implementation manner provided by the present disclosure, the doping concentration of Mg in the first GaN sublayer 51 is 2E 17-8E 17/cm3. The present disclosure is not so limited.
In one implementation provided by the present disclosure, the doping concentration of Mg in each of the plurality of insertion layers may be equal. The uniform entering of electrons is convenient to control, and the overall quality of the n-type GaN layer is relatively uniform.
In other implementations provided by the present disclosure, the doping concentration of Mg in the plurality of insertion layers may also be set to be gradually increased, gradually decreased, increased first and then decreased, or decreased first and then increased, etc. in the epitaxial growth direction, which is not limited by the present disclosure.
Fig. 2 is a schematic structural diagram of another light emitting diode epitaxial wafer according to an embodiment of the present disclosure, and as can be seen from fig. 2, in another implementation manner provided by the present disclosure, the light emitting diode epitaxial wafer may include a substrate 1, and a GaN buffer layer 6, an undoped GaN layer 7, an n-type GaN layer 2, a multi-quantum well layer 3, an AlGaN electron blocking layer 8, a p-type GaN layer 4, and a p-type contact layer 9 grown on the substrate 1.
It should be noted that the structure of the insertion layer 5 shown in fig. 2 is the same as the structure of the insertion layer 5 shown in fig. 1, and the description thereof is omitted.
Alternatively, the substrate 1 may be a sapphire substrate 1. Easy to manufacture and obtain.
Alternatively, the thickness of the GaN buffer layer 6 may be 10-30 nm. The lattice mismatch between the n-type GaN layer 2 and the substrate 1 can be reduced, and the crystal quality of the epitaxial layer is ensured.
Illustratively, the thickness of the undoped GaN layer 7 may be 1 to 3.5 μm. The quality of the obtained light emitting diode epitaxial wafer is good.
In one implementation provided by the present disclosure, the thickness of the undoped GaN layer 7 may also be 1 μm. The present disclosure is not so limited.
Alternatively, the doping element of the n-type GaN layer 2 may be Si, and the doping concentration of the Si element may be 1 × 1018～1×1019cm-3. The overall quality of the n-type GaN layer 2 is good.
Illustratively, the thickness of the n-type GaN layer 2 may be 2 to 3 μm. The obtained n-type GaN layer 2 has good overall quality.
In one implementation provided by the present disclosure, the thickness of the n-type GaN layer 2 may be 2 μm. The present disclosure is not so limited.
Alternatively, the multiple quantum well layer 3 may include InGaN well layers 31 and GaN barrier layers 32 alternately stacked. Easy preparation and acquisition.
Optionally, the Al content of the AlGaN electron blocking layer 8 may be 0.15 to 0.25. The effect of blocking electrons is better.
Alternatively, the p-type GaN layer 4 may be doped with Mg, and the thickness of the p-type GaN layer 4 may be the same as that of the structure shown in fig. 1, which is not described herein again.
Illustratively, the thickness of the p-type contact layer 9 may be 15 nm.
In the epitaxial wafer structure shown in fig. 2, compared with the epitaxial wafer structure shown in fig. 1, an electron blocking layer 8 is added between the multiple quantum well layer 3 and the p-type GaN layer 4, and a p-type contact layer 9 is also grown on the p-type GaN layer 4. The obtained epitaxial wafer has better quality and luminous efficiency.
Fig. 3 is a flowchart of a method for manufacturing an led epitaxial wafer according to an embodiment of the present disclosure, and as shown in fig. 3, the method for manufacturing an led epitaxial wafer includes:
s101: a substrate is provided.
S102: an n-type GaN layer and a plurality of insertion layers grow on a substrate, the insertion layers are sequentially inserted into the n-type GaN layer at intervals, and each insertion layer comprises a first GaN sub-layer doped with Mg and a second GaN sub-layer prepared from intrinsic materials which are sequentially stacked.
S103: and growing a multi-quantum well layer on the n-type GaN layer.
S104: and growing a p-type GaN layer on the multi-quantum well layer.
In the n-type GaN layer, a plurality of insertion layers are inserted at intervals. The Mg-doped first GaN sub-layers in each insertion layer can generate holes, so that electrons can be in "non-radiative recombination" in advance to consume part of electrons, and the plurality of first GaN sub-layers in the plurality of insertion layers can consume electrons for multiple times and offset the influence of the electron generation rate on the hole generation rate. Holes can therefore be generated in the p-type GaN layer with more time and have more time to migrate into the mqw layer, increasing the number of holes into the mqw layer. The second GaN sublayer prepared by stacking the intrinsic materials on the first GaN sublayer in the insertion layer can further play a role in blocking electrons and increasing the time for reserving holes, and meanwhile, the second GaN sublayer can also play a role in improving the quality of the n-type GaN layer and reducing the electric leakage condition. The number of holes entering the multiple quantum well layer of the finally obtained light emitting diode epitaxial wafer is increased, so that the light emitting efficiency of the light emitting diode epitaxial wafer is improved, the quality of the light emitting diode epitaxial wafer is improved, and the light emitting efficiency of the finally obtained light emitting diode can be further improved.
Step S102 may include:
and alternately introducing the growth materials of the n-type GaN layer and the insertion layers into the reaction cavity to obtain the n-type GaN layer and a plurality of insertion layers which are sequentially inserted into the n-type GaN layer at intervals. The growth and the formation of the n-type GaN layer and the plurality of insertion layers can be conveniently realized.
Illustratively, the growth temperature and the growth pressure of the growth material for introducing the n-type GaN layer into the reaction chamber are respectively the same as the growth temperature and the growth pressure of the growth material for introducing the insertion layer into the reaction chamber. The growth of the insertion layer and the n-type GaN layer can be facilitated, the control is easy, and meanwhile the good quality of the insertion layer and the n-type GaN layer can be ensured.
Optionally, the growth temperature and growth pressure of the growth material for introducing the n-type GaN layer into the reaction chamber may be 1070-1100 ℃ and 100-250 torr, respectively. An n-type GaN layer with better quality can be obtained.
Optionally, when the growth material of the n-type GaN layer is introduced into the reaction chamber, 500-800 sccm of Ga source, 90-120 sccm of Si source and 30-60L of ammonia gas can be introduced into the reaction chamber. The obtained n-type GaN layer has good quality.
Illustratively, when the growth material of the insertion layer is introduced into the reaction cavity, 30-60 sccm of Ga source, 150-300 sccm of Mg source and 30-60L of ammonia gas can be introduced into the reaction cavity to obtain a first GaN sublayer; and introducing 15-30 sccm of Ga source and 30-60L of ammonia gas into the reaction cavity to obtain a second GaN sublayer. The quality of the resulting insertion layer is better.
Optionally, the growth rate of the first GaN sublayer is 2.5-4.5 μm/h, and the growth rate of the second GaN sublayer is 3-6 μm/h.
The preparation efficiency of the light-emitting diode epitaxial wafer can be improved while the quality of the finally obtained insertion layer is ensured.
In other implementation manners provided by the present disclosure, the growth rate of the first GaN sub-layer can also be 2.5-4 μm/h. The present disclosure is not so limited.
Fig. 1 is a view of an epitaxial wafer structure of the light emitting diode after step S104 is performed.
Fig. 4 is a flowchart of another method for manufacturing an led epitaxial wafer according to an embodiment of the present disclosure, and as shown in fig. 4, the method for manufacturing an led epitaxial wafer includes:
s201: a substrate is provided.
Wherein the substrate may be a sapphire substrate. Easy to realize and manufacture.
Optionally, step S201 may further include: and treating the surface of the substrate for growing the epitaxial layer for 5-6 min in a hydrogen atmosphere.
For example, when the substrate is processed for growing the surface of the epitaxial layer, the temperature of the reaction chamber may be 1000-1100 ℃, and the pressure of the reaction chamber may be 200-500 torr.
S202: a GaN buffer layer is grown on the substrate.
Illustratively, the growth temperature of the GaN buffer layer can be 530-560 ℃, and the pressure can be 200-500 mtorr. The obtained GaN buffer layer has better quality.
S203: and growing an undoped GaN layer on the GaN buffer layer.
The thickness of the non-doped GaN layer can be 0.5-3 um.
Illustratively, the growth temperature of the non-doped GaN layer can be 1000-1100 ℃, and the growth pressure is controlled at 100-300 torr. The obtained undoped GaN layer has better quality.
S204: and growing an n-type GaN layer and a plurality of insertion layers on the undoped GaN layer.
The growth conditions of the n-type GaN layer and the plurality of insertion layers can refer to step S102 shown in fig. 1, and thus are not described herein again.
S205: and growing a multi-quantum well layer on the n-type GaN layer.
The multiple quantum well layer may include InGaN well layers and GaN barrier layers alternately grown. The chamber pressure was controlled at 200 torr. When the InGaN well layer grows, the temperature of the reaction chamber is 760-780 ℃. When the GaN barrier layer grows, the temperature of the reaction chamber is 860-890 ℃. The obtained MQW layer has good quality.
S206: and growing an AlGaN electronic barrier layer on the multi-quantum well layer.
The growth temperature of the AlGaN electron blocking layer can be 800-1000 ℃, and the growth pressure of the AlGaN electron blocking layer can be 100-300 Torr. The AlGaN electron blocking layer grown under the condition has good quality, and is beneficial to improving the luminous efficiency of the light-emitting diode.
S207: and growing a p-type GaN layer on the AlGaN electron blocking layer.
Alternatively, the growth pressure of the p-type GaN layer may be 200to 600Torr, and the growth temperature of the p-type GaN layer may be 800 to 1000 ℃.
S208: and growing a p-type contact layer on the p-type GaN layer.
Alternatively, the growth pressure of the p-type contact layer may be 100 to 300Torr, and the growth temperature of the p-type contact layer may be 800 to 1000 ℃.
The method for manufacturing the light emitting diode epitaxial wafer shown in fig. 4 provides a more detailed method for growing the light emitting diode epitaxial wafer compared to the method for manufacturing the light emitting diode shown in fig. 3.
The structure of the led epitaxial wafer after step S208 is completed can be seen in fig. 2.
It should be noted that, in the embodiment of the present disclosure, a VeecoK 465i or C4 or RB MOCVD (Metal Organic Chemical Vapor Deposition) apparatus is adopted to implement the growth method of the light emitting diode. By using high-purity H2(Hydrogen) or high purity N2(Nitrogen) or high purity H2And high purity N2The mixed gas of (2) is used as a carrier gas, high-purity NH3As an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) as gallium sources, trimethyl indium (TMIn) as indium sources, silane (SiH4) as an N-type dopant, trimethyl aluminum (TMAl) as an aluminum source, and magnesium dicylocene (CP)2Mg) as a P-type dopant.
Although the present invention has been described with reference to the above embodiments, it should be understood that the invention is not limited to the above embodiments, and various changes and modifications may be made by those skilled in the art without departing from the scope of the invention.

Claims (7)

1. A light emitting diode epitaxial wafer comprises a substrate, an n-type GaN layer, a multi-quantum well layer and a p-type GaN layer which are sequentially stacked on the substrate, and is characterized by further comprising a plurality of insertion layers, wherein the insertion layers are sequentially inserted into the n-type GaN layer at intervals, each insertion layer comprises a first GaN sublayer doped with Mg and a second GaN sublayer prepared from intrinsic materials which are sequentially stacked,
the ratio of the thickness of the first GaN sublayer to the thickness of the second GaN sublayer is 2: 1-10: 1, the thickness of the first GaN sublayer is 10-60 nm, the thickness of the second GaN sublayer is 5-30 nm, the distance between every two adjacent insertion layers is 150-350 nm, and the distance between every two adjacent insertion layers is the same.
2. The light-emitting diode epitaxial wafer according to claim 1, wherein the thickness of each insertion layer is 15-80 nm.
3. The light-emitting diode epitaxial wafer of claim 1 or 2, wherein the doping concentration of Mg in the first GaN sub-layer is 1E 17-1E 18/cm3。
4. The light-emitting diode epitaxial wafer according to claim 1 or 2, wherein the number of the insertion layers is 2-6.
5. A preparation method of a light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
growing an n-type GaN layer and a plurality of insertion layers on the substrate, wherein the insertion layers are sequentially inserted into the n-type GaN layer at intervals, each insertion layer comprises a first GaN sub-layer doped with Mg and a second GaN sub-layer prepared from intrinsic materials which are sequentially stacked,
the ratio of the thickness of the first GaN sublayer to the thickness of the second GaN sublayer is 2: 1-10: 1, the thickness of the first GaN sublayer is 10-60 nm, the thickness of the second GaN sublayer is 5-30 nm, the distance between every two adjacent insertion layers is 150-350 nm, and the distance between every two adjacent insertion layers is the same;
growing a multi-quantum well layer on the n-type GaN layer;
and growing a p-type GaN layer on the multi-quantum well layer.
6. The method for preparing the light-emitting diode epitaxial wafer as claimed in claim 5, wherein the growing the n-type GaN layer and the plurality of insertion layers on the substrate comprises:
and alternately introducing the growth materials of the n-type GaN layer and the growth materials of the insertion layers into the reaction cavity to obtain the n-type GaN layer and a plurality of insertion layers which are sequentially inserted into the n-type GaN layer at intervals.
7. The method for preparing the light-emitting diode epitaxial wafer as claimed in claim 6, wherein the growth rate of the first GaN sub-layer is 2.5-4.5 μm/h, and the growth rate of the second GaN sub-layer is 3-6 μm/h.
CN202110166507.4A 2021-02-04 2021-02-04 Light emitting diode epitaxial wafer and preparation method thereof Active CN112802933B (en)

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Publication number Priority date Publication date Assignee Title
KR100738399B1 (en) * 2006-04-18 2007-07-12 삼성전기주식회사 Nitride semiconductor light emitting device
CN204407349U (en) * 2015-03-05 2015-06-17 安徽三安光电有限公司 A kind of gallium nitride based light emitting diode
CN109309150A (en) * 2018-08-16 2019-02-05 华灿光电（浙江）有限公司 A kind of gallium nitride based LED epitaxial slice and preparation method thereof
CN109860359A (en) * 2018-11-26 2019-06-07 华灿光电（浙江）有限公司 A kind of gallium nitride based LED epitaxial slice and preparation method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100738399B1 (en) * 2006-04-18 2007-07-12 삼성전기주식회사 Nitride semiconductor light emitting device
CN204407349U (en) * 2015-03-05 2015-06-17 安徽三安光电有限公司 A kind of gallium nitride based light emitting diode
CN109309150A (en) * 2018-08-16 2019-02-05 华灿光电（浙江）有限公司 A kind of gallium nitride based LED epitaxial slice and preparation method thereof
CN109860359A (en) * 2018-11-26 2019-06-07 华灿光电（浙江）有限公司 A kind of gallium nitride based LED epitaxial slice and preparation method thereof

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