CN112802538A - Method for increasing vector depth of test machine - Google Patents

Abstract

The invention discloses a method for increasing vector depth of a tester, which comprises the following steps that 1) a memory meeting testing requirements is independently installed on a testing board of a testing chip; 2) the program will write the vector exceeding the standard into the memory chip of the test board first; 3) when a program executes a certain test item, when the vector of the test item exceeds the depth of the tester, the vector in the tester is read in batches by the memory on the test board, the program executes in batches, and the vector exceeding the standard is written into the memory chip of the test board by the program until the test vectors are all completed. The invention provides a method for increasing vector depth of a tester, which solves the problem that a larger test vector can still be used under the condition that the vector depth of the tester is insufficient, a memory chip is correspondingly arranged on each site on a pin card, a large vector is stored in the memory chip of the pin card, and the vector stored on the pin card is read into a vector memory space in the tester in batches during testing until the vector testing is completed.

Description

Method for increasing vector depth of test machine

Technical Field

The invention relates to the technical field of automatic chip detection, in particular to a method for increasing the vector depth of a tester.

Background

The tester is a device for automatically detecting the quality of a chip, when the chip is tested, the coverage rate of the chip for function test is provided as high as possible, the generated test vector is larger and exceeds the vector depth of the test strip, and if the vector is reduced, the working condition of the chip is not covered, and various functional problems can occur when the chip is used in the future. When testing a chip, some are parameter tests and some are functional tests. A test vector is needed to be used in the functional test, the integration level is higher and higher along with the scale of the integrated circuit is larger and larger, and the test vector is also larger and larger in order to cover the feasibility as much as possible. There is a limit to the tester that can write test vectors at one time, and when the written vectors exceed the capability of the tester, it is still guaranteed that the vectors can be written into the tester. At present, the vector depth of a tester cannot meet the current increasingly developed chip testing requirements.

Disclosure of Invention

The technical scheme adopted by the invention for solving the technical problems is to provide a method for increasing the vector depth of a tester, aiming at increasing the use depth of the vector of the tester under the condition that the vector of the tester is certain, so that a larger test vector can still be used under the condition that the vector depth of the tester is insufficient, wherein the specific technical scheme is as follows:

1) a memory meeting the test requirement is independently installed on a test board of the test chip;

2) the program will write the vector exceeding the standard into the memory chip of the test board first;

3) when a program executes a certain test item, when the vector of the test item exceeds the depth of the tester, the vector in the tester is read in batches by the memory on the test board, the program executes in batches, and the vector exceeding the standard is written into the memory chip of the test board by the program until the test vectors are all completed.

The method for increasing the vector depth of the tester comprises the following steps: the 1G memory is separately mounted on a test board for testing the chip.

Compared with the prior art, the invention has the following beneficial effects: the problem that a large test vector can still be used under the condition that the vector depth of a tester is not enough is solved, a memory chip is correspondingly arranged on each site on a pin card, a large vector is stored in the memory chip of the pin card, and the vector stored on the pin card is read into a vector storage space in the tester in batches during testing until the vector testing is completed. The method has low cost, does not need to replace a tester with a higher standard, and also meets the requirement of chip testing.

Drawings

FIG. 1 is a schematic diagram showing the interaction between an external vector of a test board and an internal vector of a tester.

Detailed Description

A memory meeting the test requirements is separately installed on a test board of a test chip, 1G is generally sufficient, and only 16M or 32M may be available in the test machine. The program will write the vector exceeding the standard into the memory chip of the test board, when the program executes a certain test item, because the vector of the test item exceeds the depth of the test machine, the vector in the memory on the test board is read into the vector in the test machine in batches, and the vector is executed in batches until the test vector is completely finished, as shown in fig. 1.

Although the present invention has been described with respect to the preferred embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (2)

1. A method for increasing vector depth of a tester is characterized in that:

1) a memory meeting the test requirement is independently installed on a test board of the test chip;

2) the program will write the vector exceeding the standard into the memory chip of the test board first;

3) when a program executes a certain test item, when the vector of the test item exceeds the depth of the tester, the vector in the tester is read in batches by the memory on the test board, the program executes in batches, and the vector exceeding the standard is written into the memory chip of the test board by the program until the test vectors are all completed.

2. The method of claim 1, wherein increasing the vector depth of the tester comprises: the 1G memory is separately mounted on a test board for testing the chip.

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