CN112777563B - Manufacturing method of airtight radio frequency MEMS device and airtight radio frequency MEMS device - Google Patents
Manufacturing method of airtight radio frequency MEMS device and airtight radio frequency MEMS device Download PDFInfo
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00301—Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/007—Interconnections between the MEMS and external electrical signals
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00269—Bonding of solid lids or wafers to the substrate
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00642—Manufacture or treatment of devices or systems in or on a substrate for improving the physical properties of a device
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C3/00—Assembling of devices or systems from individually processed components
- B81C3/001—Bonding of two components
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Abstract
The invention discloses a manufacturing method of an airtight radio frequency MEMS device and the airtight radio frequency MEMS device, wherein the method comprises the following steps: processing a TGV filled through hole structure on the substrate wafer; deposit and grow a first SiO 2 The dielectric layer is used for processing a transmission line and a first bonding pad; deposit and grow a second SiO 2 The dielectric layer is processed into an interlayer interconnection through hole structure; deposit and grow third SiO 2 The dielectric layer is used for processing the pull-down electrode and the second bonding pad; deposit and grow fourth SiO 2 A dielectric layer, wherein contact bumps are processed; depositing a sacrificial layer, and processing a bonding ring, an anchor point and an upper polar plate; releasing the sacrificial layer; manufacturing a packaging cover plate; performing wafer level metal bonding; and carrying out wafer-level tin ball implantation and scribing, thereby obtaining the final airtight radio frequency MEMS device. The airtight radio frequency MEMS device manufactured by the method has reliable structure, good air tightness, good radio frequency performance, low parasitic effect, high production efficiency and low production cost, and is suitable for mass production.
Description
Technical Field
The invention relates to the technical field of airtight radio frequency MEMS devices, in particular to a manufacturing method of an airtight radio frequency MEMS device and the airtight radio frequency MEMS device.
Background
Radio frequency micro-electromechanical systems (radio frequency MEMS) are one of the important fields of application of MEMS technology, and are a research hotspot in the MEMS field since the nineties of the twentieth century. The radio frequency micro-electromechanical system device has the advantages of high isolation, low loss, high linearity, low power consumption, wide frequency band and the like, and has the characteristics of small size and easy integration. The radio frequency MEMS is used for signal processing in radio frequency and microwave frequency circuits, and is a technology which can have great influence on the radio frequency structure in the existing radar and communication. However, since the rf MEMS itself has a special structure which is not comparable to the conventional IC, the packaging form and reliability requirements are more strict, and the rf MEMS device having the high-reliability packaging structure is one of the key fields of current MEMS research.
At least one metal (gold or aluminum, etc.) is used as a thin structural material in the rf MEMS device, so that the package of the rf device must be a low-temperature package to avoid the influence of high temperature on the structure; the radio frequency MEMS device comprises a movable cantilever beam or a double-end cantilever beam structure, and is easy to be influenced by water vapor and some impurities in the external environment to cause adhesion failure, so that the encapsulation of the radio frequency MEMS chip is required to be encapsulated in an airtight sealing way. In the prior art, the packaging forms of gold-silicon, silicon-silicon melting, anodic bonding and the like with the bonding temperature higher than 300 ℃ are not suitable for the radio frequency MEMS device. The organic adhesive bonding packaging technology can realize low-temperature packaging and transverse interconnection of leads, but the air tightness of the organic material packaging is much lower than that of the metal packaging; when the metal packaging is adopted, the strength and the air tightness of the packaging can be ensured, but the transverse interconnection signal extraction of the lead cannot be realized in the prior art, a through hole signal extraction process is required, and the probability of air leakage is increased by the through hole in the cavity. Meanwhile, the introduction of the packaging upper cover and the metal packaging sealing ring can bring additional parasitic effect to the radio frequency signal transmission line, and influence the radio frequency performance of the device.
In view of the above-mentioned drawbacks, the present inventors have actively studied and innovated to create a method for manufacturing a radio frequency MEMS device with an airtight package structure, so as to make the device have industrial utility value.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems existing in the prior art. Therefore, an object of the present invention is to provide a method for manufacturing an airtight rf MEMS device, which has reliable structure, good air tightness, good rf performance, low parasitic effect, high production efficiency, low production cost, and is suitable for mass production.
The manufacturing method of the airtight radio frequency MEMS device according to the embodiment of the first aspect of the invention comprises the following steps:
s1: processing a TGV filled through hole structure on a substrate wafer so as to form a first intermediate product piece;
s2: depositing and growing a first SiO on the upper surface of the first intermediate product piece 2 A dielectric layer on the first SiO 2 Processing transmission line and first welding in dielectric layerThe disc, the said transmission line and said first pad are connected with said TGV of corresponding and filled up the through hole structure electricity separately, thus form the second intermediate product piece;
s3: depositing and growing a second SiO on the upper surface of the second intermediate product piece 2 A dielectric layer on the second SiO 2 Processing an interlayer interconnection through hole structure in the dielectric layer, wherein the interlayer interconnection through hole structure is electrically connected with the first bonding pad, so that a third intermediate product piece is formed;
s4: depositing and growing a third SiO on the upper surface of the third intermediate product piece 2 A dielectric layer on the third SiO 2 A pull-down electrode and a second bonding pad are processed in the dielectric layer, and the second bonding pad is electrically connected with the interlayer interconnection through hole structure, so that a fourth intermediate product piece is formed;
s5: depositing and growing a fourth SiO on the upper surface of the fourth intermediate product piece 2 A dielectric layer on the fourth SiO 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 Processing contact protruding points in the dielectric layer, wherein the bottoms of the contact protruding points are electrically connected with one transmission line, so that a fifth intermediate product piece is formed;
s6: depositing a sacrificial layer on the upper surface of the fifth intermediate product piece, and processing a bonding ring on the sacrificial layer, wherein the bottom of the bonding ring is connected with the fourth SiO 2 A dielectric layer fixed on the sacrificial layer and the fourth SiO 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 An anchor point is processed in the dielectric layer, the bottom of the anchor point is electrically connected with another transmission line, an upper polar plate is processed on the upper surface of the sacrificial layer, the upper polar plate is electrically connected with the top of the anchor point, and the anchor point, the upper polar plate and the contact salient point are all positioned in the bonding ring, so that a sixth intermediate product piece is formed;
s7: releasing the sacrificial layer in the sixth intermediate product piece, thereby forming a seventh intermediate product piece;
s8: manufacturing a packaging cover plate, wherein the bottom surface of the packaging cover plate is provided with a packaging inner cavity, masking layers are arranged on the upper side of the packaging cover plate and the part, except for the packaging inner cavity, of the lower side of the packaging cover plate, a bonding sealing ring is arranged on the masking layer on the lower side of the packaging cover plate, and the packaging inner cavity is positioned in the bonding sealing ring;
s9: aligning the bonding ring of the seventh intermediate product piece with the bonding sealing ring of the packaging cover plate, and performing wafer-level metal bonding so as to form an eighth intermediate product piece;
s10: and carrying out wafer-level tin ball implantation on the lower surface of the substrate wafer of the eighth intermediate product piece, and scribing the eighth intermediate product piece, so as to obtain the final airtight radio frequency MEMS device.
The manufacturing method of the airtight radio frequency MEMS device provided by the embodiment of the first aspect of the invention has the following advantages: firstly, a transmission line (such as a coplanar waveguide transmission line) is led out of a packaging inner cavity by combining a rewiring process, so that the external TGV filled through hole structure is realized, the packaging air tightness of the air tightness radio frequency MEMS device is greatly improved, and the reliability of the air tightness radio frequency MEMS device is improved; the second, the introduction of the bonding sealing ring on the encapsulation cover plate can guarantee encapsulation air tightness, but can bring extra parasitic effect to the RF signal transmission line at the same time, influence the radio frequency performance of the device; by providing a second SiO 2 Dielectric layer, third SiO 2 Dielectric layer, fourth SiO 2 The dielectric layer can not only thicken the thickness of the dielectric layer between the transmission line and the bonding ring, but also reduce the interval between the pull-down electrode and the upper polar plate (i.e. the cantilever beam), reduce the pull-down voltage, and alleviate the parasitic effect problem of the entering of the sealing ring of the metal package under the condition of not influencing the pull-down voltage; thirdly, aligning the bonding ring of the fifth intermediate product piece with the bonding sealing ring of the packaging cover plate for wafer-level metal bonding, so that good air tightness can be provided, and the influence of high-temperature packaging on the structure of the air tightness radio frequency MEMS device is avoided while air tightness packaging is completed; fourth, the packaging mode is wafer level packaging, which is suitable for batch production of airtight radio frequency MEMS devices, improves production efficiency and reduces production cost.
According to an embodiment of the first aspect of the present invention, the upper surface of the first intermediate product piece, the upper surface of the second intermediate product piece, the upper surface of the third intermediate product piece and the upper surface of the fourth intermediate product piece are polished flat surfaces.
According to an embodiment of the first aspect of the present invention, in the step S1, the specific processing steps of the TGV filling via structure are as follows: and after a through hole is manufactured on the substrate wafer, plating a metal conducting layer on the inner peripheral wall of the through hole, and filling an insulating medium in the through hole plated with the metal conducting layer, so that the TGV filled through hole structure is processed, or all conductive metals are filled in the through hole, so that the TGV filled through hole structure is processed.
According to an embodiment of the first aspect of the present invention, in the step S2, the step is performed on the first SiO 2 The method for processing the transmission line and the first bonding pad in the dielectric layer specifically comprises the following steps: at the first SiO 2 Firstly processing a transmission line pattern cavity and a first bonding pad pattern cavity (photoetching and etching) which are exposed out of the substrate wafer in the dielectric layer; and respectively depositing and growing a first metal adhesion layer and a first metal circuit layer in the transmission line pattern cavity and the first bonding pad pattern cavity in sequence, wherein the first metal adhesion layer is used for cementing the first metal circuit layer.
According to an embodiment of the first aspect of the present invention, in the step S3, the second SiO 2 Processing an interlayer interconnection through hole structure in a dielectric layer, which specifically comprises the following steps: at the second SiO 2 And processing an interlayer interconnection through hole pattern cavity in the dielectric layer, and sequentially depositing and growing a second metal adhesion layer and a second metal circuit layer in the interlayer interconnection through hole pattern cavity respectively, wherein the second metal adhesion layer is used for cementing the second metal circuit layer.
According to an embodiment of the first aspect of the present invention, in the step S4, the step is performed on the third SiO 2 The method for processing the pull-down electrode and the second bonding pad in the dielectric layer specifically comprises the following steps: at the third SiO 2 First adding in the dielectric layerAnd then a third metal adhesion layer and a third metal circuit layer are respectively deposited and grown in the pull-down electrode pattern cavity and the second pad pattern cavity in sequence.
According to an embodiment of the first aspect of the present invention, in the step S5, the step is performed on the fourth SiO 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 The method comprises the following steps of: at the fourth SiO 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 And processing a contact bump pattern cavity in the dielectric layer, respectively depositing and growing a fourth metal adhesion layer and a metal bump layer at the contact bump pattern cavity in sequence, and processing the metal bump layer to form the contact bump.
According to an embodiment of the first aspect of the present invention, in the step S6, the step of processing the bonding ring in the sacrificial layer specifically includes the steps of: and processing a bonding ring graph cavity in the sacrificial layer, and then manufacturing the bonding ring in the bonding ring graph cavity.
According to an embodiment of the first aspect of the present invention, in the step S6, the sacrificial layer, the fourth SiO 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 An anchor point is processed in the dielectric layer, and the method specifically comprises the following steps: at the sacrificial layer, the fourth SiO 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 And processing an anchor point graphic cavity in the dielectric layer, and then manufacturing an anchor point in the anchor point graphic cavity.
According to an embodiment of the first aspect of the present invention, in the step S6, the sacrificial layer is an organic sacrificial layer or an inorganic sacrificial layer.
According to an embodiment of the first aspect of the present invention, in the step S7, the release of the sacrificial layer is a dry release or a wet release.
According to an embodiment of the first aspect of the present invention, in the step S8, the method for manufacturing the package cover plate includes: and simultaneously depositing the masking layer on the upper side and the lower side of the high-resistance silicon wafer, patterning the masking layer on the lower side, and etching the packaging inner cavity in the masking layer on the lower side and the high-resistance silicon wafer.
According to an embodiment of the first aspect of the present invention, the bonded seal ring is formed by depositing a fifth metal adhesion layer and a metal bonding layer, respectively, the fifth metal adhesion layer being used for fixing the metal bonding layer.
The second aspect of the invention also proposes a hermetically sealed radio frequency MEMS device.
According to an embodiment of the second aspect of the present invention, the airtight radio frequency MEMS device is manufactured by the manufacturing method of the airtight radio frequency MEMS device according to any one of the embodiments of the first aspect of the present invention.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
fig. 1 is a schematic diagram of a first process of the method for fabricating a hermetic radio frequency MEMS device of the present invention.
Fig. 2 is a schematic diagram of a second process of the method for fabricating a hermetic rf MEMS device according to the present invention.
Fig. 3 is a schematic diagram of a third process of the method for fabricating a hermetic rf MEMS device according to the present invention.
Fig. 4 is a schematic diagram of a fourth process of the method for fabricating a hermetic rf MEMS device according to the present invention.
Fig. 5 is a schematic diagram of a fifth process of the method for fabricating a hermetic rf MEMS device according to the present invention.
Fig. 6 is a schematic diagram of a sixth process of the method for fabricating a hermetic rf MEMS device according to the present invention.
Fig. 7 is a schematic diagram of a seventh process of the method for fabricating a hermetic rf MEMS device according to the present invention.
Fig. 8 is a schematic cross-sectional structure of a hermetically sealed rf MEMS device of the present invention.
Reference numerals:
airtight radio frequency MEMS device 1000
Substrate wafer 1TGV filled via structure 2
First SiO 2 Dielectric layer 3 transmission line 4 first bonding pad 5
Second SiO 2 Dielectric layer 6 interlayer interconnection via structure 7
Third SiO 2 The dielectric layer 8 pulls down the electrode 9 and the second bonding pad 10
Fourth SiO 2 Dielectric layer 11 contacts bump 12
Upper polar plate 16 of anchor point 15 of bonding ring 14 of sacrificial layer 13
Packaging cover 17
High resistance silicon wafer 1701 package cavity 1702 masking layer 1703 bonding sealing ring 1704
Solder ball 18
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the invention.
The method of fabricating the hermetic rf MEMS device and the hermetic rf MEMS device 1000 of the present invention are described below with reference to fig. 1 to 8.
As shown in fig. 1 to 8, a method for manufacturing a hermetic radio frequency MEMS device 1000 according to an embodiment of the first aspect of the present invention includes the steps of:
s1: as shown in fig. 1, a TGV filled via structure 2 is processed on a substrate wafer 1 to form a first intermediate product piece;
s2: as shown in FIG. 2, a first SiO is grown by deposition on the upper surface of the first intermediate product piece 2 Dielectric layer 3, at first SiO 2 Transmission lines are formed in the dielectric layer 34 and a first bonding pad 5, the transmission line 4 and the first bonding pad 5 being electrically connected with the corresponding TGV filled via structure 2, respectively, thereby forming a second intermediate product;
s3: as shown in FIG. 3, a second SiO is grown by deposition on the upper surface of the second intermediate product piece 2 Dielectric layer 6, at second SiO 2 An interlayer interconnection through hole structure 7 is processed in the dielectric layer 6, and the interlayer interconnection through hole structure 7 is electrically connected with the first bonding pad 5, so that a third intermediate product piece is formed;
s4: as shown in FIG. 3, a third SiO is grown by deposition on the upper surface of the third intermediate product piece 2 Dielectric layer 8, in the third SiO 2 A pull-down electrode 9 and a second bonding pad 10 are processed in the dielectric layer 8, and the second bonding pad 10 is electrically connected with the interlayer interconnection through hole structure 7, so that a fourth intermediate product piece is formed;
s5: as shown in FIGS. 3 and 4, a fourth SiO is grown on the upper surface of the fourth intermediate product member by deposition 2 Dielectric layer 11, at fourth SiO 2 Dielectric layer 11, third SiO 2 Dielectric layer 8 and second SiO 2 Processing a contact bump 12 in the dielectric layer 6, wherein the bottom of the contact bump 12 is electrically connected with one transmission line 4, so as to form a fifth intermediate product piece;
s6: as shown in fig. 5, a sacrificial layer 13 is deposited on the upper surface of the fifth intermediate product member, and a bonding ring 14 is processed in the sacrificial layer 13, the bottom of the bonding ring 14 and a fourth SiO 2 The dielectric layer 11 is fixed on the sacrificial layer 13 and the fourth SiO 2 Dielectric layer 11, third SiO 2 Dielectric layer 8 and second SiO 2 An anchor point 15 is processed in the dielectric layer 6, the bottom of the anchor point 15 is electrically connected with the other transmission line 4, an upper polar plate 16 is processed on the upper surface of the sacrificial layer 13, the upper polar plate 16 is electrically connected with the top of the anchor point 15, and the anchor point 15, the upper polar plate 16 and the contact salient point 12 are all positioned in the bonding ring 14, so that a sixth intermediate product piece is formed;
s7: as shown in fig. 6, the sacrificial layer 13 in the sixth intermediate product piece is released, thereby forming a seventh intermediate product piece;
s8: as shown in fig. 7, a packaging cover plate 17 is manufactured, a packaging cavity 1702 is formed in the bottom surface of the packaging cover plate 17, a masking layer 1703 is arranged on the upper side of the packaging cover plate 17 and a part, except for the packaging cavity 1702, of the lower side of the packaging cover plate 17, a bonding sealing ring 1704 is arranged on the masking layer 1703 of the lower side of the packaging cover plate 17, and the packaging cavity 1702 is positioned in the bonding sealing ring 1704;
s9: as shown in fig. 8, wafer level metal bonding is performed by aligning the bonding ring 14 of the seventh intermediate product component with the bonding sealing ring 1704 of the package cover 17, thereby forming an eighth intermediate product component;
s10: as shown in fig. 8, wafer level solder balls 18 are formed on the lower surface of the substrate wafer 1 of the eighth intermediate product piece, and dicing is performed on the eighth intermediate product piece, thereby obtaining the final airtight rf MEMS device.
The manufacturing method of the airtight radio frequency MEMS device provided by the embodiment of the first aspect of the invention has the following advantages: firstly, a transmission line 4 (such as a coplanar waveguide transmission line 4) is led out of a packaging cavity 1702 by combining a rewiring process, so that the external TGV filling through hole structure 2 is realized, the packaging air tightness of the air tightness radio frequency MEMS device 1000 is greatly improved, and the reliability of the air tightness radio frequency MEMS device is improved; the second, the introduction of the bonding seal ring 1704 on the packaging cover plate 17 can ensure the packaging air tightness, but can bring extra parasitic effect to the RF signal transmission line 4 at the same time, and influence the radio frequency performance of the device; by providing a second SiO 2 Dielectric layer, third SiO 2 Dielectric layer, fourth SiO 2 The dielectric layer can not only thicken the thickness of the dielectric layer between the transmission line 4 and the bonding ring 14, but also reduce the distance between the pull-down electrode 9 and the upper polar plate 16 (i.e. cantilever beam), reduce the pull-down voltage, and alleviate the parasitic effect problem of the entering of the sealing ring of the metal package under the condition of not influencing the pull-down voltage; thirdly, the bonding ring 14 of the fifth intermediate product piece is aligned with the bonding sealing ring 1704 of the packaging cover plate 17 for wafer-level metal bonding, so that good air tightness can be provided, and the influence of high-temperature packaging on the structure of the air tightness radio frequency MEMS device 1000 is avoided while air tightness packaging is completed; fourth, the packaging mode is wafer level packaging, which is suitable for the mass production of the airtight radio frequency MEMS device 1000, improves the production efficiency and reduces the production cost.
According to one embodiment of the first aspect of the invention, the upper surface of the first intermediate product piece, the upper surface of the second intermediate product piece, the upper surface of the third intermediate product piece and the upper surface of the fourth intermediate product piece are polished flat surfaces. In this way, the stress of the hermetic rf MEMS device 1000 can be reduced, the flatness of the cantilever beam (i.e., the upper plate 16) of the hermetic rf MEMS device 1000 can be increased, and the electrical contact performance of the interlayer interconnection of the hermetic rf MEMS device 1000 can be improved.
Preferably, the upper surface of the first intermediate product piece, the upper surface of the second intermediate product piece, the upper surface of the third intermediate product piece and the upper surface of the fourth intermediate product piece are polished flat surfaces, and can be respectively obtained by a CMP (chemical mechanical polishing) polishing process.
According to an embodiment of the first aspect of the present invention, in step S1, the specific processing steps of the TGV filling via structure 2 are: after the through-hole is formed on the substrate wafer 1, a metal conductive layer, such as a copper layer, is plated on the inner peripheral wall of the through-hole, and then an insulating medium is filled in the through-hole plated with the metal conductive layer, thereby forming the TGV filled through-hole structure 2, or the through-hole is filled with the conductive metal, such as copper, entirely, thereby forming the TGV filled through-hole structure 2. Thereby, the conductivity of the TGV filled via structure 2 is achieved.
Preferably, the substrate wafer 1 may be a glass wafer.
According to an embodiment of the first aspect of the invention, in step S2, in the first SiO 2 The dielectric layer 3 is processed with a transmission line 4 and a first bonding pad 5, and specifically includes the following steps: in the first SiO 2 Firstly, processing a transmission line pattern cavity and a first bonding pad pattern cavity which are exposed out of a substrate wafer 1 in a dielectric layer 3; and respectively depositing and growing a first metal adhesion layer and a first metal circuit layer in the transmission line pattern cavity and the first bonding pad pattern cavity in sequence, wherein the first metal adhesion layer is used for cementing the first metal circuit layer. Therefore, the processing is convenient, and the processed transmission line 4 and the processed first bonding pad 5 are good in quality and free of falling risks.
The transmission line pattern cavity and the first pad pattern cavity may be etched by photolithography and etching the first SiO 2 The dielectric layer 3 is obtained by exposing the substrate wafer 1, and the processing method has the advantages of good selectivity, good repeatability, high production efficiency and low cost.
According to an embodiment of the first aspect of the invention, in step S3, in the second SiO 2 An interlayer interconnection through hole structure 7 is processed in the dielectric layer 6, and specifically comprises the following steps: in the second SiO 2 And processing an interlayer interconnection through hole pattern cavity in the dielectric layer 6, and sequentially depositing and growing a second metal adhesion layer and a second metal circuit layer in the interlayer interconnection through hole pattern cavity respectively, wherein the second metal adhesion layer is used for cementing the second metal circuit layer. Therefore, the processing is convenient, and the quality of the processed interlayer interconnection through hole structure 7 is good.
The interlayer interconnection through hole pattern cavity can be etched by photoetching and etching the second SiO 2 The dielectric layer 6 is obtained, and the processing method has the advantages of good selectivity, good repeatability, high production efficiency and low cost.
According to an embodiment of the first aspect of the present invention, in step S4, at a third SiO 2 The dielectric layer 8 is processed with a pull-down electrode 9 and a second bonding pad 10, which comprises the following steps: in the third SiO 2 A pull-down electrode pattern cavity and a second bonding pad pattern cavity are processed in the dielectric layer 8, and then a third metal adhesion layer and a third metal circuit layer are sequentially deposited and grown in the pull-down electrode pattern cavity and the second bonding pad pattern cavity respectively. Thus, the processing is convenient, and the processed pull-down electrode 9 and second bonding pad 10 have good quality.
The pull-down electrode pattern cavity and the second pad pattern cavity may be formed by photolithography and etching of the third SiO 2 The dielectric layer 8 is obtained, and the processing method has the advantages of good selectivity, good repeatability, high production efficiency and low cost.
According to an embodiment of the first aspect of the invention, in step S5, at a fourth SiO 2 Dielectric layer 11, third SiO 2 Dielectric layer 8 and second SiO 2 The contact bump 12 is firstly processed in the dielectric layer 6, and specifically comprises the following steps: in the fourth SiO 2 Dielectric layer 11, third SiO 2 Dielectric layer 8 and second SiO 2 A contact convex point pattern cavity is processed in the dielectric layer 6 and then is contactedAnd respectively depositing and growing a fourth metal adhesion layer and a metal bump layer at the bump pattern cavity in sequence, and processing the metal bump layer to form the contact bump 12. Thus, the contact bump 12 can be processed, and the quality of the contact bump 12 is good
The contact bump pattern cavity may be etched by photolithography and etching of the fourth SiO 2 Dielectric layer 11, third SiO 2 Dielectric layer 8 and second SiO 2 The dielectric layer 6 is obtained, and the processing method has the advantages of good selectivity, good repeatability, high production efficiency and low cost.
According to an embodiment of the first aspect of the present invention, in step S6, the bonding ring 14 is processed in the sacrificial layer 13, specifically comprising the steps of: the bond ring pattern cavities are first machined into the sacrificial layer and then the bond rings 14 are fabricated into the bond ring pattern cavities. Thus, the bonding ring 14 can be conveniently processed, and the bonding ring 14 has good quality
The bonding ring pattern cavity can be obtained by photoetching and etching the sacrificial layer 13, and the processing method has good selectivity, good repeatability, high production efficiency and low cost.
According to an embodiment of the first aspect of the present invention, in step S6, in the sacrificial layer 13, a fourth SiO 2 Dielectric layer 11, third SiO 2 Dielectric layer 8 and second SiO 2 An anchor point 15 is processed in the dielectric layer 6, and specifically comprises the following steps: at the sacrifice layer 13, fourth SiO 2 Dielectric layer 11, third SiO 2 Dielectric layer 8 and second SiO 2 An anchor point graphic cavity is processed in the dielectric layer 6, and then an anchor point 15 is manufactured in the anchor point graphic cavity. Therefore, the anchor point 15 can be conveniently processed, and the anchor point 15 is good in quality.
It should be noted that the anchor pattern cavity may be formed by photolithography and etching of the sacrificial layer 13, the fourth SiO 2 Dielectric layer 11, third SiO 2 Dielectric layer 8 and second SiO 2 The dielectric layer 6 is obtained, and the processing method has the advantages of good selectivity, good repeatability, high production efficiency and low cost.
According to an embodiment of the first aspect of the present invention, in step S6, the sacrificial layer 13 is an organic sacrificial layer 13 or an inorganic sacrificial layer 13. For example, the organic layer may be selected from polyimide sacrificial layers 13, and the inorganic sacrificial layer 13 may be a silicon sacrificial layer 13.
According to one embodiment of the first aspect of the present invention, in step S7, the release of the sacrificial layer 13 is performed using dry release or wet release. In particular, the dry release sacrificial layer 13 may be employed when the sacrificial layer 13 is a polyimide sacrificial layer 13, and the wet release sacrificial layer 13 may be employed when the sacrificial layer 13 is a silicon sacrificial layer 13, so that the sacrificial layer 13 can be removed conveniently and thoroughly.
According to an embodiment of the first aspect of the present invention, in step S8, the manufacturing method of the package cover 17 includes: masking layers 1703 are simultaneously deposited on the upper and lower sides of the high-resistance silicon wafer 1701, the lower masking layer 1703 is patterned, and package cavities 1702 are etched in the lower masking layer 1703 and the high-resistance silicon wafer 1701. Thus, the processing is convenient, and the leakage of radio frequency signals can be reduced by processing the packaging cover plate 17.
According to a further embodiment of the first aspect of the present invention, the masking layer 1703 is Si 3 N 4 Masking layer 1703. Thus, the etching selectivity ratio is high, and the package cavity 1702 can be conveniently processed
According to a further embodiment of the first aspect of the present invention, the bonded seal ring 1704 is formed by depositing a fifth metal adhesion layer and a metal bonding layer, respectively, the fifth metal adhesion layer being used to secure the metal bonding layer. Thus, the processing is convenient, and the quality of the bonding ring 14 can be ensured.
According to a further embodiment of the first aspect of the present invention, the sealing bond ring 14 is made of one, two or more combination metals of Cu/Sn, au/Sn/Cu, ge/Al and Au/Au, and may be selected according to practical needs.
The second aspect of the present invention also proposes a hermetically sealed rf MEMS device 1000.
According to the airtight radio frequency MEMS device 1000 of the embodiment of the second aspect of the present invention, the airtight radio frequency MEMS device 1000 is fabricated by the fabrication method of the airtight radio frequency MEMS device 1000 according to any one of the embodiments of the first aspect of the present invention.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the spirit and principles of the invention, the scope of which is defined by the claims and their equivalents.
Claims (14)
1. The manufacturing method of the airtight radio frequency MEMS device is characterized by comprising the following steps of:
s1: processing a TGV filled through hole structure on a substrate wafer so as to form a first intermediate product piece;
s2: depositing and growing a first SiO on the upper surface of the first intermediate product piece 2 A dielectric layer on the first SiO 2 Processing a transmission line and a first bonding pad in the dielectric layer, wherein the transmission line and the first bonding pad are respectively and electrically connected with the corresponding TGV filling through hole structure, so as to form a second intermediate product piece;
s3: depositing and growing a second SiO on the upper surface of the second intermediate product piece 2 A dielectric layer on the second SiO 2 Processing an interlayer interconnection through hole structure in the dielectric layer, wherein the interlayer interconnection through hole structure is electrically connected with the first bonding pad, so that a third intermediate product piece is formed;
s4: depositing and growing a third SiO on the upper surface of the third intermediate product piece 2 A dielectric layer on the third SiO 2 A pull-down electrode and a second bonding pad are processed in the dielectric layer, and the second bonding pad is electrically connected with the interlayer interconnection through hole structure, so that a fourth intermediate product piece is formed;
s5: depositing and growing a fourth SiO on the upper surface of the fourth intermediate product piece 2 A dielectric layer on the fourth SiO 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 Processing contact protruding points in the dielectric layer, wherein the bottoms of the contact protruding points are electrically connected with one transmission line, so that a fifth intermediate product piece is formed;
s6: depositing a sacrificial layer on the upper surface of the fifth intermediate product piece, and processing a bonding ring on the sacrificial layer, wherein the bottom of the bonding ring is connected with the fourth SiO 2 A dielectric layer fixed on the sacrificial layer and the fourth SiO 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 An anchor point is processed in the dielectric layer, the bottom of the anchor point is electrically connected with another transmission line, an upper polar plate is processed on the upper surface of the sacrificial layer, the upper polar plate is electrically connected with the top of the anchor point, and the anchor point, the upper polar plate and the contact salient point are all positioned in the bonding ring, so that a sixth intermediate product piece is formed;
s7: releasing the sacrificial layer in the sixth intermediate product piece, thereby forming a seventh intermediate product piece;
s8: manufacturing a packaging cover plate, wherein the bottom surface of the packaging cover plate is provided with a packaging inner cavity, masking layers are arranged on the upper side of the packaging cover plate and the part, except for the packaging inner cavity, of the lower side of the packaging cover plate, a bonding sealing ring is arranged on the masking layer on the lower side of the packaging cover plate, and the packaging inner cavity is positioned in the bonding sealing ring;
s9: aligning the bonding ring of the seventh intermediate product piece with the bonding sealing ring of the packaging cover plate, and performing wafer-level metal bonding so as to form an eighth intermediate product piece;
s10: and carrying out wafer-level tin ball implantation on the lower surface of the substrate wafer of the eighth intermediate product piece, and scribing the eighth intermediate product piece, so as to obtain the final airtight radio frequency MEMS device.
2. The method of claim 1, wherein the upper surface of the first intermediate product, the upper surface of the second intermediate product, the upper surface of the third intermediate product, and the upper surface of the fourth intermediate product are polished flat surfaces.
3. The method for fabricating a hermetic radio frequency MEMS device according to claim 1, wherein in the step S1, the specific processing steps of the TGV filling via structure are as follows: and after a through hole is manufactured on the substrate wafer, plating a metal conducting layer on the inner peripheral wall of the through hole, and filling an insulating medium in the through hole plated with the metal conducting layer, so that the TGV filled through hole structure is processed, or all conductive metals are filled in the through hole, so that the TGV filled through hole structure is processed.
4. The method of fabricating a hermetic radio frequency MEMS device according to claim 1, wherein in step S2, the first SiO is a silicon oxide film 2 The method for processing the transmission line and the first bonding pad in the dielectric layer specifically comprises the following steps: at the first SiO 2 Firstly processing a transmission line pattern cavity and a first bonding pad pattern cavity which are exposed out of the substrate wafer in the dielectric layer; and respectively depositing and growing a first metal adhesion layer and a first metal circuit layer in the transmission line pattern cavity and the first bonding pad pattern cavity in sequence, wherein the first metal adhesion layer is used for cementing the first metal circuit layer.
5. The method of fabricating a hermetic radio frequency MEMS device according to claim 1, wherein in step S3, the second SiO is a silicon oxide film 2 Processing an interlayer interconnection through hole structure in a dielectric layer, which specifically comprises the following steps: at the second SiO 2 And processing an interlayer interconnection through hole pattern cavity in the dielectric layer, and sequentially depositing and growing a second metal adhesion layer and a second metal circuit layer in the interlayer interconnection through hole pattern cavity respectively, wherein the second metal adhesion layer is used for cementing the second metal circuit layer.
6. The method of fabricating a hermetic radio frequency MEMS device according to claim 1, wherein in step S4, the third SiO is a silicon oxide film 2 The method for processing the pull-down electrode and the second bonding pad in the dielectric layer specifically comprises the following steps: at the third SiO 2 Processing a pull-down electrode pattern cavity and a second bonding pad pattern cavity in the dielectric layer, and sequentially depositing and growing a third metal adhesion layer and a third gold in the pull-down electrode pattern cavity and the second bonding pad pattern cavity respectivelyBelongs to a circuit layer.
7. The method of fabricating a hermetically sealed rf MEMS device as claimed in claim 1, wherein in step S5, the fourth SiO is a silicon oxide film 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 The method comprises the following steps of: at the fourth SiO 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 And processing a contact bump pattern cavity in the dielectric layer, respectively depositing and growing a fourth metal adhesion layer and a metal bump layer at the contact bump pattern cavity in sequence, and processing the metal bump layer to form the contact bump.
8. The method for fabricating a hermetic radio frequency MEMS device according to claim 1, wherein in the step S6, the step of processing a bonding ring in the sacrificial layer comprises the steps of: and processing a bonding ring graph cavity in the sacrificial layer, and then manufacturing the bonding ring in the bonding ring graph cavity.
9. The method of fabricating a hermetic radio frequency MEMS device according to claim 1, wherein in the step S6, the sacrificial layer and the fourth SiO 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 An anchor point is processed in the dielectric layer, and the method specifically comprises the following steps: at the sacrificial layer, the fourth SiO 2 A dielectric layer, the third SiO 2 Dielectric layer and the second SiO 2 And processing an anchor point graphic cavity in the dielectric layer, and then manufacturing an anchor point in the anchor point graphic cavity.
10. The method according to claim 1, wherein in the step S6, the sacrificial layer is an organic sacrificial layer or an inorganic sacrificial layer.
11. The method of fabricating a hermetically sealed rf MEMS device according to claim 1, wherein in step S7, the sacrificial layer is released by dry or wet release.
12. The method of manufacturing a hermetically sealed rf MEMS device according to claim 1, wherein in step S8, the method of manufacturing the package cover plate comprises: and simultaneously depositing the masking layer on the upper side and the lower side of the high-resistance silicon wafer, patterning the masking layer on the lower side, and etching the packaging inner cavity in the masking layer on the lower side and the high-resistance silicon wafer.
13. The method of claim 1, wherein the bonded seal ring is formed by depositing a fifth metal adhesion layer and a metal bonding layer, respectively, the fifth metal adhesion layer being used for fixing the metal bonding layer.
14. A hermetically sealed rf MEMS device, characterized in that the hermetically sealed rf MEMS device is fabricated by a fabrication method of the hermetically sealed rf MEMS device according to any one of claims 1-13.
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| PCT/CN2021/139235 WO2022151919A1 (en) | 2021-01-12 | 2021-12-17 | Manufacturing method for hermetic radio frequency mems device, and hermetic radio frequency mems device |
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