CN112768348A - Optimization method for etching lithium niobate material and improving side wall angle - Google Patents

Optimization method for etching lithium niobate material and improving side wall angle Download PDF

Info

Publication number
CN112768348A
CN112768348A CN202110059078.0A CN202110059078A CN112768348A CN 112768348 A CN112768348 A CN 112768348A CN 202110059078 A CN202110059078 A CN 202110059078A CN 112768348 A CN112768348 A CN 112768348A
Authority
CN
China
Prior art keywords
etching
lithium niobate
side wall
optimization method
improving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202110059078.0A
Other languages
Chinese (zh)
Other versions
CN112768348B (en
Inventor
江安全
陈一凡
庄晓
江钧
汪超
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fudan University
Original Assignee
Fudan University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fudan University filed Critical Fudan University
Priority to CN202110059078.0A priority Critical patent/CN112768348B/en
Publication of CN112768348A publication Critical patent/CN112768348A/en
Application granted granted Critical
Publication of CN112768348B publication Critical patent/CN112768348B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching
    • H01L21/30635Electrolytic etching of AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • H01L21/30655Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)
  • Weting (AREA)

Abstract

The invention belongs to the technical field of storage material preparation, and particularly relates to an optimization method for etching a lithium niobate material and improving a side wall angle. The method comprises the following steps: manufacturing a hard mask, performing inclined etching, blackening the metal to correct the side wall, and performing wet etching cleaning. Different from the traditional method of directly etching the lithium niobate pattern by using the dry etching method, the method combines the dry etching method with the wet etching method, not only can obtain the lithium niobate pattern with steep etching angle and smooth side wall, but also has extremely high etching efficiency, and can carry out later correction on the lithium niobate pattern. The method has great significance for nano processing based on the lithium niobate material, and the ferroelectric property of the material can not be damaged.

Description

Optimization method for etching lithium niobate material and improving side wall angle
Technical Field
The invention belongs to the technical field of storage material preparation, and particularly relates to an optimization method for etching a lithium niobate material and improving a side wall angle.
Background
The lithium niobate single crystal material has unique photoelectric, piezoelectric and ferroelectric properties, and is widely applied to the fields of surface acoustic wave devices, photoelectric modulators, piezoelectric sensors and ferroelectric memories. Based on the principle of a conductive domain wall, the nonvolatile ferroelectric domain wall memory and the ferroelectric field effect transistor which are made of lithium niobate materials greatly promote the development of nano domain wall electronics. Furthermore, by using the ion knife (Smart Cut) method, a submicron-thickness lithium niobate single crystal thin film can be prepared and then mixed with SiO2The Si substrate or the Si-based read-write circuit substrate is bonded together, so that the large-scale manufacture of the ferroelectric domain wall memory compatible with the CMOS process becomes possible, and the memory has huge market application prospect. Compared with a film surface storage unit without etching, the storage unit with the structure that the surface of the lithium niobate film is etched into the convex block has a better information reading and writing function, and the higher the inclination angle of the side edge of the convex block is, the better the information retention performance is. But the processing of lithium niobate bumps with high bevel angles remains an international challenge. For the fabrication of lithium niobate bumps in general, micromachining, laser machining etching, dry etching, wet etching may be used. Wet etching and dry etching are two methods commonly used in microelectronic integrated circuits, but the wet etching has poor anisotropy and a slow etching rate. The dry etching requires the use of fluorine-based gas, which inevitably results in the formation of LiF, thereby hindering further etching of the lithium niobate cell. According to the reports of the literature, the chemical proportion of lithium niobate can be changed by using a proton exchange mode to form a new compound, so that the etching angle of the side wall can be improved, but the method can cause irreversible damage to the ferroelectricity of the material, and the information storage function cannot be realized. As a memory and a photoelectric device, the etching angle of lithium niobate has a large influence on the performance of the device, so that it is important to explore a new etching scheme to etch a steep and smooth lithium niobate pattern.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provide an optimization method for etching a lithium niobate material and improving the side wall angle. The method consists of a plurality of process steps, and the processes are combined to etch a lithium niobate bump pattern with almost vertical side walls.
The invention provides an optimization method for etching a lithium niobate material and improving a side wall angle, which comprises the following specific steps of:
(1) manufacturing a hard mask on the surface of the lithium niobate substrate;
(2) etching lithium niobate by a dry method;
(3) correcting the side wall of the lithium niobate pattern by utilizing metal blackening;
(4) and cleaning the etched substrate by using wet etching.
In the present invention, the lithium niobate material includes but is not limited to lithium niobate single crystal, lithium niobate thin film, doped MgO, Mn2O5Or Fe2O3A single crystal or a thin film of lithium niobate.
In the invention, the hard mask is manufactured on the surface of the lithium niobate substrate, and the specific process comprises the following steps:
(1) growing a seed layer on the lithium niobate substrate;
(2) manufacturing a required graph by using a photoetching technology;
(3) the mask is prepared by an electroplating method.
The material of the seed layer is conductive metal, and comprises Cr, Au, Pt, Al or Ti.
Wherein the hard mask is an etching-resistant metal, such as Ni or Cu, and has a thickness of 10 nm-20 μm.
In the invention, the dry etching of the lithium niobate can be carried out by adopting an inclined sample mode, and the inclination angle is 1-89 degrees; preferably the angle of inclination is from 15 to 70.
And the specific inclination angle and the inclined etching time of the dry etching of the lithium niobate are determined according to the etching rate and the target etching depth.
In the invention, the sidewall correction is performed by using metal blackening, and the main process comprises the following steps: and growing metal on the surface of the etched sample, annealing at high temperature, and cleaning the blackened metal by using an etching solution.
Wherein, the metal used has high chemical activity and can absorb oxygen atoms in the lithium niobate crystal, including but not limited to Mg, Zn, Al, Li or Cu.
Wherein the annealing time is 1 minute to 100 hours, the temperature is 100 ℃ to 800 ℃, and the specific numerical value is determined according to the conditions of the etching depth, the etching angle and the like. The annealing time is preferably 2 to 50 hours, and the annealing temperature is 400 to 700 ℃.
Wherein the used corrosive solution is an acidic solution or an alkaline solution, the acidic solution is hydrochloric acid, hydrofluoric acid or nitric acid, and the alkaline solution is sodium hydroxide or ammonia water; the solvent of the solutions comprises hydrogen peroxide or deionized water, and one or more solutions are selected to be mixed for corrosion according to actual conditions.
Wherein, the etching solution can be heated by water bath in the cleaning process, and the temperature is 0-100 ℃. The water bath heating temperature is preferably 60-85 ℃.
The method has the advantages that: the dry etching and the wet etching are combined, and the sample is obliquely placed in the dry etching process, so that more plasmas can bombard the side wall of the lithium niobate pattern, and then the etching by-product is removed by using the wet etching. The graph side wall is corrected by utilizing metal blackening, and lithium niobate can be accelerated to corrode to a certain extent by mainly utilizing a blackening area, so that the inclination angle of the side wall is steeper. The method has great significance for improving the performances of devices such as nano processing, storage, photoelectricity and the like based on the lithium niobate material.
Drawings
Fig. 1 is a schematic diagram of an etching process of a lithium niobate pattern according to an embodiment of the present invention.
Fig. 2 is a Scanning Electron Microscope (SEM) pattern of a lithium niobate pattern etched by the etching method provided in the comparative example and the etching method provided in the embodiment of the present invention, respectively.
Fig. 3 is SEM images of memory cells respectively manufactured by the etching method provided in the comparative example and the etching method provided in the embodiment of the present invention.
Fig. 4 is hysteresis curves of memory cells respectively prepared by using the etching method provided by the comparative example and the etching method provided by the embodiment of the present invention.
Fig. 5 is a coercive electric field fitting graph of the memory cell respectively prepared by using the etching method provided by the comparative example and the etching method provided by the embodiment of the present invention.
Fig. 6 is a SEM image of a graph of lithium niobate after blackening according to an embodiment of the present invention.
Detailed Description
The invention is further illustrated below with reference to the figures and examples.
In the drawings, the thicknesses of layers and regions are exaggerated for clarity, and the dimensional proportional relationship between the portions shown in the drawings does not reflect the actual dimensional proportional relationship.
Fig. 1 is a process of etching a lithium niobate bump using the present invention. The selected lithium niobate material is an MgO-doped X-cut lithium niobate single crystal wafer with the concentration of 5 mol%. Firstly, growing 20 nm thick Cr and 40 nm thick Au on the surface of the lithium niobate crystal by magnetron sputtering as seed layers, and then manufacturing a lithium niobate pattern by using an electron beam lithography technology, as shown in fig. 1 a. Then, 100 nm Ni is electroplated as a hard mask in the exposed pattern area, and excess photoresist is removed by acetone, as shown in FIGS. 1 b-c. The seed layer and the lithium niobate are then etched using a Reactive Ion Etching (RIE) system. First adopt Ar and Ar/O2Au and Cr were etched separately, followed by Ar and SF6The mixed gas etches the lithium niobate at a rate of 8 nanometers per minute. To obtain a lithium niobate pattern having a depth of about 100 nm, the total etching time was 12 minutes. The whole process can be divided into three steps: (1) the lithium niobate was etched in the normal manner for 6 minutes as shown in fig. 1 d; (2) lifting one side to form an included angle of 15 degrees between the sample and the horizontal plane, and etching for 3 minutes under the same etching parameters, as shown in figure 1 e; (3) raising the other side of the sample to form 1Etching was continued for 3 minutes at an angle of 5 deg., as shown in fig. 1 f.
After etching, the sample is cleaned with an alkaline solution, NH4OH,H2O2,H2O is as follows 1: 1: 1, and heating in water bath at 85 ℃, and cleaning for 10 minutes.
To verify the etching effect of this example, we also used conventional methods for etching as a comparative example. In the comparative example, we used metallic Cr as the material of the hard mask, using Ar and SF6The lithium niobate is directly etched for 12 minutes.
Fig. 2 is SEM images of lithium niobate etched by the etching method provided in the comparative example for 12 minutes (left image) and lithium niobate etched by the etching method provided in the present example for 12 minutes (right image), and it is apparent that the etching angle of the sidewall increases from 70 ° to 83 °.
Fig. 3 is SEM images of lithium niobate memory cells respectively prepared by the etching method provided in the comparative example (left diagram) and the etching method provided in the present example (right diagram). Shown in the inset are the respective angles of inclination of the lithium niobate sidewalls.
FIG. 4 shows the hysteresis loop measurement of the corresponding memory cell of FIG. 3. It can be seen that the hysteresis loop tends to be more symmetric about the voltage axis with increasing angle and the imprint voltage decreases from 5V (70 ° etch angle) to 1.85V (83 ° etch angle). It can be seen that the polarization maintaining characteristic of the lithium niobate memory manufactured by the invention is greatly improved.
Fig. 5 is a schematic diagram of the coercive electric field fitting of the corresponding memory cell in fig. 3, and it can be seen that the coercive electric field is also significantly reduced in the memory cell with a large etching angle, which means that the memory cell can be read and written at a lower voltage.
Fig. 6 is an SEM image after blackening for 4 hours at 400 c using 300 nm thick metallic Al, and it can be seen that the sidewall inclination angle is almost vertical.
In summary, the method for etching the lithium niobate material and optimizing the angle of the side wall combines the manufacture of the hard mask, the inclined etching, the metal blackening and side wall correction and the wet etching cleaning, can obtain a lithium niobate pattern with a steep and smooth side wall, and provides great help for the subsequent lithium niobate processing technology.
It is to be understood that the above embodiments are merely illustrative of one of the fields in which the present invention may be used, but the present invention is not limited thereto. Modifications and substitutions that may be easily contemplated by those of ordinary skill in the art within the scope of the disclosed technology are intended to be included within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims (7)

1. An optimization method for etching a lithium niobate material and improving a side wall angle is characterized by comprising the following specific steps:
(1) manufacturing a hard mask on the surface of the lithium niobate substrate;
(2) etching lithium niobate by a dry method;
(3) correcting the side wall of the lithium niobate pattern by utilizing metal blackening;
(4) etching and cleaning the etched substrate by using a wet method;
wherein the lithium niobate material is selected from lithium niobate single crystal, lithium niobate thin film, doped MgO and Mn2O5Or Fe2O3A single crystal or a thin film of lithium niobate.
2. The optimization method for etching the lithium niobate material and improving the side wall angle according to claim 1, wherein the hard mask is manufactured on the surface of the lithium niobate substrate by the following specific processes:
(1) growing a seed layer on the lithium niobate substrate;
(2) manufacturing a required graph by using a photoetching technology;
(3) preparing a mask by using an electroplating method;
wherein the seed layer material is selected from Cr, Au, Pt, Al or Ti; the hard mask is made of etching-resistant metal selected from Ni or Cu and has the thickness of 10 nanometers to 20 micrometers.
3. The method for optimizing the etching of lithium niobate material and the improvement of the sidewall angle as claimed in claim 2, wherein the dry etching of lithium niobate is performed by means of an inclined sample, and the inclination angle is 1°-89°
4. The optimization method for etching lithium niobate material and increasing the sidewall angle according to claim 3, wherein the specific tilt angle and the tilt etching time of the dry etching of lithium niobate are determined according to the etching rate and the target etching depth.
5. The optimization method for etching lithium niobate material and improving sidewall angle according to claim 1, wherein the sidewall correction is performed by blackening metal, and the process is as follows: growing metal on the surface of the etched sample, annealing at high temperature, and cleaning the blackened metal by using a corrosion solution; wherein, the metal used has higher chemical activity, can absorb oxygen atoms in the lithium niobate crystal and is selected from Mg, Zn, Al, Li or Cu; the annealing time is 1 minute to 100 hours, and the temperature is 100 ℃ to 800 ℃.
6. The optimization method for etching the lithium niobate material and improving the side wall angle according to claim 5, wherein the etching solution is an acidic solution or an alkaline solution, the acidic solution is hydrochloric acid, hydrofluoric acid or nitric acid, and the alkaline solution is sodium hydroxide or ammonia water.
7. The optimization method for etching the lithium niobate material and improving the side wall angle according to claim 5, wherein the etching solution is heated in a water bath at a temperature of 0-100 ℃ during the cleaning process.
CN202110059078.0A 2021-01-18 2021-01-18 Optimization method for etching lithium niobate material and improving side wall angle Active CN112768348B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110059078.0A CN112768348B (en) 2021-01-18 2021-01-18 Optimization method for etching lithium niobate material and improving side wall angle

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110059078.0A CN112768348B (en) 2021-01-18 2021-01-18 Optimization method for etching lithium niobate material and improving side wall angle

Publications (2)

Publication Number Publication Date
CN112768348A true CN112768348A (en) 2021-05-07
CN112768348B CN112768348B (en) 2022-05-20

Family

ID=75702320

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110059078.0A Active CN112768348B (en) 2021-01-18 2021-01-18 Optimization method for etching lithium niobate material and improving side wall angle

Country Status (1)

Country Link
CN (1) CN112768348B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113687466A (en) * 2021-08-03 2021-11-23 上海交通大学 Lithium niobate thin film photon chip based on metal hard mask and processing method thereof
CN114924341A (en) * 2022-05-06 2022-08-19 上海交通大学 Method and system for improving verticality of side wall of FIB etching ultra-shallow grating structure

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5106471A (en) * 1990-04-02 1992-04-21 Motorola, Inc. Reactive ion etch process for surface acoustic wave (SAW) device fabrication
WO1996008036A1 (en) * 1994-09-02 1996-03-14 Stichting Voor De Technische Wetenschappen Process for producing micromechanical structures by means of reactive ion etching
JP2006165228A (en) * 2004-12-07 2006-06-22 Toyama Prefecture Plasma etching method
CN102304767A (en) * 2011-08-25 2012-01-04 中国科学院半导体研究所 Method for preparing lithium niobate surface pattern
CN105048103A (en) * 2015-06-25 2015-11-11 电子科技大学 Preparing method for ultrathin metallic film for absorbing terahertz waves
CN106521633A (en) * 2016-12-26 2017-03-22 福建晶安光电有限公司 Blackening method of lithium tantalate crystal substrate
CN111061072A (en) * 2020-03-16 2020-04-24 南京南智先进光电集成技术研究院有限公司 Photoelectric device based on lithium niobate thin film and preparation method thereof
CN112125276A (en) * 2020-09-14 2020-12-25 中北大学 Patterned etching method of lithium niobate single crystal thin film for mechanical sensor

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5106471A (en) * 1990-04-02 1992-04-21 Motorola, Inc. Reactive ion etch process for surface acoustic wave (SAW) device fabrication
WO1996008036A1 (en) * 1994-09-02 1996-03-14 Stichting Voor De Technische Wetenschappen Process for producing micromechanical structures by means of reactive ion etching
JP2006165228A (en) * 2004-12-07 2006-06-22 Toyama Prefecture Plasma etching method
CN102304767A (en) * 2011-08-25 2012-01-04 中国科学院半导体研究所 Method for preparing lithium niobate surface pattern
CN105048103A (en) * 2015-06-25 2015-11-11 电子科技大学 Preparing method for ultrathin metallic film for absorbing terahertz waves
CN106521633A (en) * 2016-12-26 2017-03-22 福建晶安光电有限公司 Blackening method of lithium tantalate crystal substrate
CN111061072A (en) * 2020-03-16 2020-04-24 南京南智先进光电集成技术研究院有限公司 Photoelectric device based on lithium niobate thin film and preparation method thereof
CN112125276A (en) * 2020-09-14 2020-12-25 中北大学 Patterned etching method of lithium niobate single crystal thin film for mechanical sensor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113687466A (en) * 2021-08-03 2021-11-23 上海交通大学 Lithium niobate thin film photon chip based on metal hard mask and processing method thereof
CN114924341A (en) * 2022-05-06 2022-08-19 上海交通大学 Method and system for improving verticality of side wall of FIB etching ultra-shallow grating structure

Also Published As

Publication number Publication date
CN112768348B (en) 2022-05-20

Similar Documents

Publication Publication Date Title
CN112768348B (en) Optimization method for etching lithium niobate material and improving side wall angle
TWI716046B (en) Magnetic tunnel junction etching method
CN112125276A (en) Patterned etching method of lithium niobate single crystal thin film for mechanical sensor
JP2004295989A (en) Method for manufacturing magnetic recording medium, and magnetic recording medium
CN103084353A (en) Method Of Cleaning Aluminum Plasma Chamber Parts
TWI719642B (en) Etching method of magnetic tunnel junction
CN104681493B (en) The forming method of semiconductor structure
TWI631080B (en) Nickel cobalt sulfide synthesizing method and electrode
CN103137440B (en) Photoresist removing method
TWI499103B (en) Magnetoresistive random access memory device and method of making same
US20170155044A1 (en) Nonvolatile resistance random access memory device with low and reliable operating voltage and long-term stability and fabrication method thereof
CN109728096B (en) Ferroelectric field effect transistor based on aluminum oxide material embedded nanocrystalline and preparation method thereof
WO2022021619A1 (en) Manufacturing method for memory cell and manufacturing method for mram
CN117529216A (en) Wet etching method for preparing suspended three-dimensional resonant cavity quantum bit
JP4560652B2 (en) Substrate having anti-reflection layer and manufacturing method thereof
CN113215574B (en) Wet etching method for quantum chip of sapphire substrate aluminum-plated film
US20180130947A1 (en) Non-volatile resistive random-access memory device with reliable operation indicator, device-to-device uniformity, and multilevel cell storage, and method of manufacturing the same
CN107546284A (en) A kind of reverse wedge body light trapping structure and preparation method thereof
WO2022021620A1 (en) Method for preparing storage bit and method for preparing mram
CN102054780A (en) Method for improving performance of nonvolatile memory
CN109037040A (en) It improves dual damascene and etches time method of trench process window
CN114496804A (en) Etching method of lithium niobate nanometer device
JP5808441B2 (en) Reduction of adjacent track error in bit pattern media
CN113540284B (en) Aluminum nitride nanosheet array and manufacturing method thereof
CN114717639B (en) Method for positioning gallium oxide wafer surface defects based on photoelectrochemical etching process

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant