CN112758888B - Processing technology of silicon MEMS microstructure with through silicon via - Google Patents
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- CN112758888B CN112758888B CN202110193837.2A CN202110193837A CN112758888B CN 112758888 B CN112758888 B CN 112758888B CN 202110193837 A CN202110193837 A CN 202110193837A CN 112758888 B CN112758888 B CN 112758888B
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00523—Etching material
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00388—Etch mask forming
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00388—Etch mask forming
- B81C1/00396—Mask characterised by its composition, e.g. multilayer masks
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00523—Etching material
- B81C1/00531—Dry etching
Abstract
The invention provides a processing technology of a silicon MEMS microstructure with a silicon through hole, which is used for processing and forming a silicon groove and the silicon through hole in a silicon structure. In the invention, the adopted aluminum or titanium metal film has good adhesiveness with silicon and has high etching selection ratio in the silicon etching process; an etching pattern mask is manufactured on one side of a silicon-silicon structure wafer, an etching barrier layer is manufactured on the other side of the silicon-silicon structure wafer, and silicon etching is carried out from one side, so that the problems of abnormal etching rate and poor pattern straightness caused by the fact that the gas leakage rate of the back of the wafer is increased after through holes are etched and penetrated through can be avoided; the metal film is used as an etching barrier layer, so that the problem of bottom damage of an etching structure caused by charge accumulation at the bottom of the through hole can be avoided.
Description
Technical Field
The invention belongs to the technical field of micro-electro-mechanical systems (MEMS) manufacturing, and particularly relates to a processing technology of a silicon MEMS microstructure with through silicon vias.
Background
The MEMS device is a novel device developed in the last two decades, and is widely applied to various fields such as national defense, inertial navigation, seismic exploration, industry, medical treatment, automation, consumer electronics and the like due to the characteristics of low cost, small volume, low power consumption, large-scale production and the like. The MEMS device is processed by mainly adopting a semiconductor process technology to prepare various microstructures. Silicon grooves and through holes are processed on a silicon wafer through semiconductor photoetching and etching technologies, and a plurality of wafers are bonded through a wafer bonding technology to form a micro-channel structure. The micro-channel radiator is applied to consumer electronics, electrical equipment, laser weapons, radars and the like at present, liquid is pressed in from a liquid inlet of a micro-channel structure and is discharged from a liquid outlet, heat is taken away through heat exchange between the liquid and solid in the micro-channel where a heat dissipation element is pasted, and the temperature of the element to be dissipated is reduced. The processing of the silicon MEMS microgrooves with the silicon through holes is a main process link of the processing of the microchannel device.
In the MEMS microstructure processing process with silicon through holes and silicon grooves, after partial through holes are etched and penetrated, due to the problem of etching uniformity, etching needs to be continued so as to ensure that all through holes are etched and penetrated. However, the current processing methods have the following limitations:
firstly, a micro-groove structure with a through hole is etched and processed from the two sides of the wafer respectively. After part of the through holes are penetrated, helium gas used for heat dissipation on the back of the wafer leaks from the through holes, the wafer cannot be in close contact with the etching tray, heat dissipation is deteriorated, the temperature of the wafer is increased, the etching reaction process is influenced, and abnormal etching rate and structural straightness are deteriorated.
And secondly, an insulating layer such as silicon oxide or silicon nitride is used as an etching barrier layer, when part of through holes are etched and penetrated, electric charges carried by etching reaction gas are accumulated on the insulating layer, so that the moving direction of etching reaction gas ions is deflected to bombard the bottom of the side wall of an etching area, and the structure is damaged.
Disclosure of Invention
In order to overcome the defects in the prior art, the inventor of the invention carries out intensive research and provides a processing technology of a silicon MEMS microstructure with a through silicon via, which is used for solving the problems of abnormal etching rate, poor graph steepness and damage to the bottom of an etched structure caused by charge accumulation at the bottom of a through hole when etching uniformity needs to be continuously etched due to the increase of gas leakage rate at the back of a wafer after the through hole is etched and penetrated, which are caused by double-sided etching of the wafer.
The technical scheme provided by the invention is as follows:
a processing technology of a silicon MEMS microstructure with a through silicon via is used for processing and forming a silicon groove and the through silicon via in the silicon structure, and comprises the following steps:
the method comprises the following steps: preparing a first metal film on the front surface of the silicon structure wafer by adopting magnetron sputtering or electron beam evaporation;
step two: processing a first metal film on the front surface of the silicon structure wafer by adopting a photoetching process to form a photoresist pattern corresponding to the silicon groove and the silicon through hole pattern;
step three: processing the first metal film by using the photoresist pattern processed in the step two as a mask in a wet etching or dry etching mode to obtain a metal film pattern corresponding to the silicon groove and the silicon through hole pattern;
step four: removing the photoresist;
step five: preparing a second metal film on the back of the silicon structure wafer by adopting magnetron sputtering or electron beam evaporation;
step six: processing a first metal film on the front surface of the silicon structure wafer by adopting a photoetching process to form a photoresist pattern corresponding to the silicon through hole pattern;
step seven: taking the photoresist pattern processed in the step six as a mask, and etching the silicon structure by adopting a dry etching process to process a silicon through hole which is not etched completely;
step eight: removing the photoresist;
step nine: taking the metal film pattern processed in the third step as a mask, etching the silicon structure by adopting a dry etching process to form a silicon groove, and etching the silicon through hole completely;
step ten: and removing the first metal film and the second metal film on the front surface and the back surface of the wafer by wet etching, and cleaning and drying to obtain the silicon MEMS microstructure to be processed.
In one embodiment, the step five is adjusted to be before the step one as a new step one, and the original step one to the step four are continued, or adjusted to be after the step one as a new step two, and the original step two to the step four are continued, and then the new step three is adjusted to be: and coating photoresist on the second metal film on the back of the wafer for protection, and processing the first metal film on the front by adopting a photoetching process to form a photoresist pattern corresponding to the silicon groove and the silicon through hole pattern.
In one embodiment, the step five is adjusted to be before the step one as a new step one, and the original step one to the step four are continued, or adjusted to be after the step one as a new step two, and the original step two to the step four are continued, and at this time, the new step four is adjusted to be: and processing the first metal film by adopting the photoresist pattern processed in the third step as a mask and adopting a dry etching mode to form a metal film pattern corresponding to the silicon groove and the silicon through hole pattern.
According to the processing technology of the silicon MEMS microstructure with the through silicon via, the processing technology has the following beneficial effects:
(1) According to the processing technology of the silicon MEMS microstructure with the through silicon via, provided by the invention, an etching pattern mask is manufactured on one side of a silicon wafer, an etching barrier layer is prepared on the other side of the silicon wafer, and silicon etching is carried out from one side, so that the problems of abnormal etching rate and poor pattern steepness caused by the fact that the gas leakage rate is increased and the heat dissipation is poor on the back of the wafer after the through hole is etched and penetrated through can be avoided, and when etching uniformity needs to be continuously etched;
(2) According to the processing technology of the silicon MEMS microstructure with the through silicon via, the metal film is used as the etching barrier layer, so that charges carried by etching gas ions can be conducted away, and the problem of damage to the bottom of an etching structure caused by charge accumulation at the bottom of the through hole is avoided;
(3) According to the processing technology of the silicon MEMS microstructure with the through silicon via, the metal etching pattern mask and the etching barrier layer are made of aluminum or titanium metal, and the aluminum or titanium metal is active in property and is easy to combine with a natural oxide layer on the surface of silicon, so that the metal film and the silicon have good adhesion;
(4) According to the processing technology of the silicon MEMS microstructure with the through silicon via, provided by the invention, fluorine-based etching reaction gas adopted in the silicon etching process has a very slow etching rate on aluminum and titanium, a fast etching rate on silicon and a very high etching selection ratio, so that the aluminum and the titanium are good etching mask selections;
(5) According to the processing technology of the silicon MEMS microstructure with the through silicon holes, the through silicon holes with certain depths are processed in advance, then the silicon grooves and the through silicon holes are processed simultaneously, the method is adopted to prevent the silicon structure layer from penetrating through in advance, and the damage degree to a metal film at the bottom of each through hole is reduced;
(6) According to the processing technology of the silicon MEMS microstructure with the through silicon holes, when the prepared product is used for a micro-channel device, the technology can remarkably reduce the size of the micro-channel radiator, can process the micro-channel radiator to a micron level, can realize batch processing, and reduces the production cost; the selected monocrystalline silicon material has high heat conduction coefficient which can reach 130W/(m.K), is higher than most metals and most ceramics and is far higher than organic materials (the heat conductivity is less than 1W/(m.K)) commonly used by micro-channel devices such as polyimide and the like, the monocrystalline silicon micro-channel radiator can realize good heat radiation effect and meet the requirement of element heat radiation, the monocrystalline silicon has high Young modulus, and the processed device has high mechanical strength and can realize good reliability.
Drawings
FIG. 1 is a silicon MEMS microstructure with a mask schematic;
FIG. 2 is a schematic flow chart of the preparation of the silicon MEMS microstructure with through silicon vias according to the present invention;
FIG. 3 is a schematic longitudinal cross-sectional view of a micro flow channel device with a silicon MEMS micro-groove structure having through-silicon-vias according to an embodiment;
FIG. 4 is a photomicrograph of a silicon pillar structure under-etched severe structure of one embodiment processed by a conventional processing method;
FIG. 5 is a photomicrograph of a silicon pillar structure of an embodiment processed using the fabrication process of the present invention;
FIG. 6 is a photomicrograph of the side of a silicon pillar after the silicon pillar structure is pushed down by a probe according to the first embodiment of the present invention.
Description of the reference numerals
1-silicon structure; 2-silicon groove; 3-through silicon vias; 4-a second metal film; 5-a first metal film; 6-photoresist; 7-a glass sheet; 21-silicon column.
Detailed Description
The features and advantages of the present invention will become more apparent and appreciated from the following detailed description of the invention.
The invention provides a processing technology of a silicon MEMS microstructure with a through silicon via, which is used for processing and forming a silicon groove 2 and a through silicon via 3 in a silicon structure 1, and comprises the steps of manufacturing a photoresist 6 and a first metal film 5 on one side of a wafer of the silicon structure 1, respectively serving as an etching technology pattern mask of the through silicon via 3 and the silicon groove 2 after processing, and simultaneously depositing a second metal film 4 on the other side of the wafer of the silicon structure 1 as an etching barrier layer, as shown in figure 1. Specifically, the processing method comprises the following steps:
the method comprises the following steps: preparing a first metal film 5 on the front surface of the silicon structure 1 wafer by adopting magnetron sputtering or electron beam evaporation, as shown in fig. 2a;
step two: processing a first metal film 5 on the front surface of the wafer of the silicon structure 1 by adopting a photoetching process to form a photoresist pattern corresponding to the patterns of the silicon grooves 2 and the silicon through holes 3, as shown in a figure 2b;
step three: processing the first metal film 5 by using the photoresist pattern processed in the second step as a mask and adopting a wet etching or dry etching mode to obtain a metal film pattern corresponding to the patterns of the silicon grooves 2 and the silicon through holes 3, as shown in fig. 2c;
step four: removing the photoresist by using an oxygen plasma photoresist remover or sequentially performing ultrasonic cleaning on acetone, ethanol and deionized water, as shown in fig. 2d;
step five: preparing a second metal film 4 on the back surface of the silicon structure 1 wafer by adopting magnetron sputtering or electron beam evaporation, as shown in fig. 2e;
step six: processing and forming a photoresist 6 pattern corresponding to the silicon through hole 3 pattern on the first metal film 5 on the front surface of the wafer of the silicon structure 1 by adopting a photoetching process, as shown in fig. 2f;
step seven: taking the photoresist 6 graph processed in the sixth step as a mask, and etching the silicon structure by adopting a dry etching process to process a silicon through hole 3 which is not etched completely, as shown in a figure 2g;
step eight: removing the photoresist 6 by using an oxygen plasma photoresist remover or sequentially ultrasonically cleaning by using acetone, ethanol and deionized water, as shown in figure 2h;
step nine: taking the metal film pattern processed in the third step as a mask, etching the silicon structure by adopting a dry etching process to form a silicon groove 2, and etching the silicon through hole 3 completely, as shown in fig. 2i;
step ten: removing the first metal film 5 and the second metal film 4 on the front surface and the back surface of the wafer by wet etching, and cleaning and drying to obtain a silicon MEMS microstructure to be processed; as in figure 2j.
In a preferred embodiment, in the step one, the first metal film 5 is a titanium metal film or an aluminum metal film; in the fifth step, the second metal film 4 is a titanium metal film or an aluminum metal film.
In a preferred embodiment, in the third step, when the first metal film 5 is processed by dry etching, chlorine-based etching reaction gas is used; when the first metal film 5 is processed by wet etching, if the first metal film 5 is an aluminum metal film, the wet etching adopts phosphoric acid; if the first metal film 5 is a titanium metal film, the wet etching uses a buffered oxide etching solution (BOE) or other acidic solution containing hydrofluoric acid.
In the seventh step and the ninth step, fluorine-based etching reaction gas (such as SF) is used when the dry etching process is used for etching the silicon structure 6 ，CF 4 ，CF x +O 2 ). The fluorine-based etching reaction gas adopted in the silicon etching process has a very slow etching rate to aluminum and titanium, a fast etching rate to silicon and a very high etching selectivity ratio, so that the aluminum and the titanium are good etching masks.
In a preferred embodiment, step five can be adjusted to be before step one as new step one and the original step one to step four are forward-drawn, or step five is adjusted to be after step one as new step two and the original step two to step four are forward-drawn, that is, the adjusted new step one and step two are used to deposit metal films on both sides of the wafer in advance, and then the new step three (original step two) is adjusted to: and coating photoresist on the second metal film 4 on the back surface of the wafer for protection, and processing the first metal film 5 on the front surface by adopting a photoetching process to form a photoresist pattern corresponding to the patterns of the silicon slot 2 and the silicon through hole 3. In the new step three (original step two), a measure for coating photoresist on the second metal film 4 on the back surface of the wafer is added, otherwise, when the first metal film 5 on the front surface of the wafer is processed by wet etching in the new step four (original step three), the second metal film 4 on the back surface of the wafer is easily damaged.
In another preferred embodiment, step five can be adjusted to be before step one as new step one and the original step one to step four are continued, or step five is adjusted to be after step one as new step two and the original step two to step four are continued, at this time, the new step four (original step three) is adjusted to be: and processing the first metal film 5 by adopting the photoresist pattern processed in the third step as a mask and adopting a dry etching mode to form a metal film pattern corresponding to the patterns of the silicon groove 2 and the silicon through hole 3. In this way, no photoresist protection measure is applied to the second metal film 4 on the back surface of the wafer, and the first metal film 5 on the front surface of the wafer is processed in a corresponding new step four (original step three) without adopting a wet etching method.
In a preferred embodiment, in the seventh step, the depth of the non-etched part of the through silicon via 3 is less than the depth of the silicon groove 2 and greater than 40% of the depth of the silicon groove 2; preferably, the depth of the non-etched part of the through-silicon via 3 is less than 80% of the depth of the silicon trench 2 and greater than 60% of the depth of the silicon trench 2. And in the etching process of the step nine, etching the silicon groove and the silicon through hole simultaneously, wherein in order to ensure that the silicon groove reaches the required etching depth, the silicon through hole is etched and penetrated, and the depth of the part, which is not etched and penetrated, of the silicon through hole in the etching process of the step seven is required to be smaller than the depth of the silicon groove. In the etching process, the depth-to-width ratio of the etching area influences the etching rate, the size of the through silicon via is usually smaller than that of the silicon groove, and the depth of the through silicon via to be etched is deeper, so in the nine-step etching process, the etching rate of the through silicon via is usually smaller than that of the silicon groove, the depth of the part, which is not etched through, of the seven-step silicon groove is smaller than 80% of the depth of the silicon groove 2, and the effect is better. Be provided with aluminium or titanium metal membrane bottom the through-hole, after the through-silicon via etching break-through, can guarantee not break-through in the bottom, but the silicon etching also can damage aluminium or titanium metal membrane and the etching process generates heat, and the film probably breaks because of thermal stress, consequently too big should not set up too much to the volume of overetching, so the not etched depth of penetrating part of seven through-silicon vias 3 of step is greater than 60% of the silicon groove 2 degree of depth, and the effect is better.
In a preferred embodiment, the thickness of the silicon structure 1 is 300 μm to 1000 μm; the depth of the silicon groove 2 is not more than 80% of the thickness of the silicon structure, and the width of the silicon groove 2 is 50-1000 μm; the width of the silicon through hole 3 is 50-1000 μm. The thickness of the first metal film 5 is not less than 1% of the depth of the silicon groove 2, and the thickness of the photoresist 6 is not less than 1% of the difference between the thickness of the silicon structure and the depth of the silicon groove. The thicknesses of the metal film layer 5 and the photoresist 6 depend on the ratio of the patterns of the region to be etched to the depth-to-width ratio of the region to be etched, and the larger the ratio of the patterns of the region to be etched is, the larger the depth-to-width ratio of the region to be etched is, the larger the thicknesses of the metal film layer 5 and the photoresist 6 are required to be. According to the invention, through a large number of tests and gropes, the thicknesses of the first metal film 5 and the photoresist 6 are determined, and if the thicknesses are lower than the minimum value of the range, the metal film and the photoresist are easy to be insufficiently masked in the etching process of the through silicon via and silicon groove structures, so that etching damage is generated in a non-pattern area on a wafer.
In a preferred embodiment, the processed silicon MEMS microstructure can be used as a micro channel structure of a micro channel heat sink, and in this case, the selected silicon structure 1 is a single crystal silicon material.
Examples
Example one
FIG. 3 is a schematic longitudinal cross-sectional view of a micro-channel device with a silicon MEMS micro-groove structure having through-silicon-vias. And processing the silicon structure 1 to form a silicon groove 2 and a silicon through hole 3, wherein the silicon groove 2 contains an array of silicon pillars 21. The silicon structure 1 and the glass sheet 7 are bonded through a wafer to form a sealed micro-channel structure. The liquid enters from the through silicon hole 3 on one side and flows out from the through silicon hole 3 on the other side through the silicon groove 2. The thickness of the silicon structure 1 is 300 μm, the depth of the silicon groove is 200 μm, and the width of the through silicon via 3 is 1000 μm.
By adopting a traditional processing method, firstly, a through silicon via 3 which is not etched through is formed on the back surface of the silicon structure 1 by photoetching and etching processing, then, a silicon groove 2 is formed on the other side by photoetching and etching processing, and the through silicon via 3 is penetrated through. Due to the problem of etching uniformity, the etching rates of different areas are different, and after a part of through holes are penetrated, the through holes are continuously etched, so that the silicon through holes in all the areas are etched and penetrated. At the through part, the gas leakage rate at the back of the wafer is increased, the heat dissipation is deteriorated, the etching and undercutting of the silicon bottom are serious, and the bottom of the structure is broken, as shown in fig. 4, the original vertical triangular silicon pillar is etched into a nail shape and poured at the bottom of the silicon groove.
By adopting the processing method provided by the invention, the silicon groove 2 (containing the silicon column 21 inside) and the silicon through hole 3 are processed from the front side of the silicon structure 1, the photoresist 6 and the first metal film 5 are manufactured on one side of the silicon structure 1 wafer, the processed photoresist and the first metal film are respectively used as etching process graphic masks of the silicon through hole 3 and the silicon groove 2, meanwhile, the second metal film 4 is deposited on the other side of the silicon structure 1 wafer and is used as an etching barrier layer, and the processing process is shown in figure 2. The first metal film 5 and the second metal film 4 are aluminum metal films, the thickness of the aluminum metal film is 2.5 μm, and the thickness of the photoresist is 3.5 μm. The depth of the silicon through hole is 150 mu m in the seven processing steps, and the depth of the part, which is not etched, of the silicon through hole is 150 mu m.
The top view of the processed silicon pillar is shown in FIG. 5, and the processed silicon pillar has better steepness when the side of the silicon pillar is observed as shown in FIG. 6 after the silicon pillar is pushed down by using a probe.
The invention has been described in detail with reference to specific embodiments and illustrative examples, but the description is not intended to be construed in a limiting sense. Those skilled in the art will appreciate that various equivalent substitutions, modifications or improvements may be made to the embodiments and implementations of the invention without departing from the spirit and scope of the invention, and are within the scope of the invention. The scope of the invention is defined by the appended claims.
Those skilled in the art will appreciate that those matters not described in detail in the present specification are well known in the art.
Claims (7)
1. A processing technology of a silicon MEMS microstructure with a through silicon via is characterized in that the processing technology is used for processing and forming a silicon groove and the through silicon via in a silicon structure, and the thickness of the silicon structure is 300-1000 μm; the depth of the silicon groove is not more than 80% of the thickness of the silicon structure, and the width of the silicon groove is 50-1000 μm; the width of the silicon through hole is 50-1000 μm; the method comprises the following steps:
the method comprises the following steps: preparing a first metal film on the front surface of the silicon structure wafer by adopting magnetron sputtering or electron beam evaporation; the thickness of the first metal film is not less than 1% of the depth of the silicon groove;
step two: processing a first metal film on the front surface of the silicon structure wafer by adopting a photoetching process to form a photoresist pattern corresponding to the silicon groove and the silicon through hole pattern;
step three: processing the first metal film by using the photoresist pattern processed in the step two as a mask in a wet etching or dry etching mode to obtain a metal film pattern corresponding to the silicon groove and the silicon through hole pattern;
step four: removing the photoresist;
step five: preparing a second metal film on the back of the silicon structure wafer by adopting magnetron sputtering or electron beam evaporation;
step six: processing a first metal film on the front surface of the silicon structure wafer by adopting a photoetching process to form a photoresist pattern corresponding to the silicon through hole pattern; the thickness of the photoresist is not less than 1% of the difference between the thickness of the silicon structure and the depth of the silicon groove;
step seven: taking the photoresist pattern processed in the step six as a mask, and etching the silicon structure by adopting a dry etching process to process a silicon through hole which is not etched completely; the depth of the part of the silicon through hole which is not etched through is less than 80% of the depth of the silicon groove and more than 60% of the depth of the silicon groove;
step eight: removing the photoresist;
step nine: taking the metal film pattern processed in the third step as a mask, etching the silicon structure by adopting a dry etching process to form a silicon groove, and etching the silicon through hole completely;
step ten: and removing the first metal film and the second metal film on the front surface and the back surface of the wafer by wet etching, and cleaning and drying to obtain the silicon MEMS microstructure to be processed.
2. The processing technology of the silicon MEMS microstructure with through silicon via of claim 1, wherein in the first step, the first metal film is a titanium metal film or an aluminum metal film;
in the fifth step, the second metal film is a titanium metal film or an aluminum metal film.
3. The process for processing a silicon MEMS microstructure with through silicon vias as claimed in claim 2, wherein in step three, chlorine-based etching reaction gas is used when the first metal film is processed by dry etching; when the first metal film is processed by wet etching, if the first metal film is an aluminum metal film, phosphoric acid is adopted in the wet etching; if the first metal film is a titanium metal film, the wet etching adopts buffer oxide etching solution BOE or other acid solutions containing hydrofluoric acid.
4. The process of claim 1, wherein in steps seven and nine, fluorine-based etching reaction gas is used when etching the silicon structure by dry etching process.
5. The process for processing a silicon MEMS microstructure with through silicon vias as claimed in claim 1, wherein the processed silicon MEMS microstructure can be used as a micro-channel structure of a micro-channel heat sink.
6. The process of claim 1, wherein the step five is adjusted to be performed before the step one as a new step one and the step one to the step four are performed sequentially, or the step five is adjusted to be performed after the step one as a new step two and the step two to the step four are performed sequentially, and the new step three is adjusted to be performed: and coating photoresist on the second metal film on the back of the wafer for protection, and processing the first metal film on the front by adopting a photoetching process to form a photoresist pattern corresponding to the silicon slot and the silicon through hole pattern.
7. The process of claim 1, wherein step five is adjusted to be performed before step one as a new step one and then performed in steps one to four, or step five is adjusted to be performed after step one as a new step two and then performed in steps two to four, and then the new step four is adjusted to be performed: and processing the first metal film by adopting the photoresist pattern processed in the third step as a mask and adopting a dry etching mode to form a metal film pattern corresponding to the silicon groove and the silicon through hole pattern.
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| CN112758888A (en) | 2021-05-07 |
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